cxd2820r_t.c 9.4 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
/*
 * Sony CXD2820R demodulator driver
 *
 * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
 *
 *    This program is free software; you can redistribute it and/or modify
 *    it under the terms of the GNU General Public License as published by
 *    the Free Software Foundation; either version 2 of the License, or
 *    (at your option) any later version.
 *
 *    This program is distributed in the hope that it will be useful,
 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *    GNU General Public License for more details.
 *
 *    You should have received a copy of the GNU General Public License along
 *    with this program; if not, write to the Free Software Foundation, Inc.,
 *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 */


22 23
#include "cxd2820r_priv.h"

24
int cxd2820r_set_frontend_t(struct dvb_frontend *fe)
25 26 27
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
28
	int ret, i, bw_i;
29
	u32 if_freq, if_ctl;
30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56
	u64 num;
	u8 buf[3], bw_param;
	u8 bw_params1[][5] = {
		{ 0x17, 0xea, 0xaa, 0xaa, 0xaa }, /* 6 MHz */
		{ 0x14, 0x80, 0x00, 0x00, 0x00 }, /* 7 MHz */
		{ 0x11, 0xf0, 0x00, 0x00, 0x00 }, /* 8 MHz */
	};
	u8 bw_params2[][2] = {
		{ 0x1f, 0xdc }, /* 6 MHz */
		{ 0x12, 0xf8 }, /* 7 MHz */
		{ 0x01, 0xe0 }, /* 8 MHz */
	};
	struct reg_val_mask tab[] = {
		{ 0x00080, 0x00, 0xff },
		{ 0x00081, 0x03, 0xff },
		{ 0x00085, 0x07, 0xff },
		{ 0x00088, 0x01, 0xff },

		{ 0x00070, priv->cfg.ts_mode, 0xff },
		{ 0x000cb, priv->cfg.if_agc_polarity << 6, 0x40 },
		{ 0x000a5, 0x00, 0x01 },
		{ 0x00082, 0x20, 0x60 },
		{ 0x000c2, 0xc3, 0xff },
		{ 0x0016a, 0x50, 0xff },
		{ 0x00427, 0x41, 0xff },
	};

57 58
	dev_dbg(&priv->i2c->dev, "%s: frequency=%d bandwidth_hz=%d\n", __func__,
			c->frequency, c->bandwidth_hz);
59

60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76
	switch (c->bandwidth_hz) {
	case 6000000:
		bw_i = 0;
		bw_param = 2;
		break;
	case 7000000:
		bw_i = 1;
		bw_param = 1;
		break;
	case 8000000:
		bw_i = 2;
		bw_param = 0;
		break;
	default:
		return -EINVAL;
	}

77 78 79 80 81 82 83
	/* update GPIOs */
	ret = cxd2820r_gpio(fe);
	if (ret)
		goto error;

	/* program tuner */
	if (fe->ops.tuner_ops.set_params)
84
		fe->ops.tuner_ops.set_params(fe);
85 86 87 88 89 90 91 92 93 94 95 96 97

	if (priv->delivery_system != SYS_DVBT) {
		for (i = 0; i < ARRAY_SIZE(tab); i++) {
			ret = cxd2820r_wr_reg_mask(priv, tab[i].reg,
				tab[i].val, tab[i].mask);
			if (ret)
				goto error;
		}
	}

	priv->delivery_system = SYS_DVBT;
	priv->ber_running = 0; /* tune stops BER counter */

98 99 100 101 102 103 104 105
	/* program IF frequency */
	if (fe->ops.tuner_ops.get_if_frequency) {
		ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
		if (ret)
			goto error;
	} else
		if_freq = 0;

106
	dev_dbg(&priv->i2c->dev, "%s: if_freq=%d\n", __func__, if_freq);
107 108

	num = if_freq / 1000; /* Hz => kHz */
109 110 111 112 113 114 115 116 117 118
	num *= 0x1000000;
	if_ctl = cxd2820r_div_u64_round_closest(num, 41000);
	buf[0] = ((if_ctl >> 16) & 0xff);
	buf[1] = ((if_ctl >>  8) & 0xff);
	buf[2] = ((if_ctl >>  0) & 0xff);

	ret = cxd2820r_wr_regs(priv, 0x000b6, buf, 3);
	if (ret)
		goto error;

119
	ret = cxd2820r_wr_regs(priv, 0x0009f, bw_params1[bw_i], 5);
120 121 122 123 124 125 126
	if (ret)
		goto error;

	ret = cxd2820r_wr_reg_mask(priv, 0x000d7, bw_param << 6, 0xc0);
	if (ret)
		goto error;

127
	ret = cxd2820r_wr_regs(priv, 0x000d9, bw_params2[bw_i], 2);
128 129 130 131 132 133 134 135 136 137 138 139 140
	if (ret)
		goto error;

	ret = cxd2820r_wr_reg(priv, 0x000ff, 0x08);
	if (ret)
		goto error;

	ret = cxd2820r_wr_reg(priv, 0x000fe, 0x01);
	if (ret)
		goto error;

	return ret;
error:
141
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
142 143 144
	return ret;
}

145
int cxd2820r_get_frontend_t(struct dvb_frontend *fe)
146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
	int ret;
	u8 buf[2];

	ret = cxd2820r_rd_regs(priv, 0x0002f, buf, sizeof(buf));
	if (ret)
		goto error;

	switch ((buf[0] >> 6) & 0x03) {
	case 0:
		c->modulation = QPSK;
		break;
	case 1:
		c->modulation = QAM_16;
		break;
	case 2:
		c->modulation = QAM_64;
		break;
	}

	switch ((buf[1] >> 1) & 0x03) {
	case 0:
		c->transmission_mode = TRANSMISSION_MODE_2K;
		break;
	case 1:
		c->transmission_mode = TRANSMISSION_MODE_8K;
		break;
	}

	switch ((buf[1] >> 3) & 0x03) {
	case 0:
		c->guard_interval = GUARD_INTERVAL_1_32;
		break;
	case 1:
		c->guard_interval = GUARD_INTERVAL_1_16;
		break;
	case 2:
		c->guard_interval = GUARD_INTERVAL_1_8;
		break;
	case 3:
		c->guard_interval = GUARD_INTERVAL_1_4;
		break;
	}

	switch ((buf[0] >> 3) & 0x07) {
	case 0:
		c->hierarchy = HIERARCHY_NONE;
		break;
	case 1:
		c->hierarchy = HIERARCHY_1;
		break;
	case 2:
		c->hierarchy = HIERARCHY_2;
		break;
	case 3:
		c->hierarchy = HIERARCHY_4;
		break;
	}

	switch ((buf[0] >> 0) & 0x07) {
	case 0:
		c->code_rate_HP = FEC_1_2;
		break;
	case 1:
		c->code_rate_HP = FEC_2_3;
		break;
	case 2:
		c->code_rate_HP = FEC_3_4;
		break;
	case 3:
		c->code_rate_HP = FEC_5_6;
		break;
	case 4:
		c->code_rate_HP = FEC_7_8;
		break;
	}

	switch ((buf[1] >> 5) & 0x07) {
	case 0:
		c->code_rate_LP = FEC_1_2;
		break;
	case 1:
		c->code_rate_LP = FEC_2_3;
		break;
	case 2:
		c->code_rate_LP = FEC_3_4;
		break;
	case 3:
		c->code_rate_LP = FEC_5_6;
		break;
	case 4:
		c->code_rate_LP = FEC_7_8;
		break;
	}

	ret = cxd2820r_rd_reg(priv, 0x007c6, &buf[0]);
	if (ret)
		goto error;

	switch ((buf[0] >> 0) & 0x01) {
	case 0:
		c->inversion = INVERSION_OFF;
		break;
	case 1:
		c->inversion = INVERSION_ON;
		break;
	}

	return ret;
error:
258
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
259 260 261
	return ret;
}

262
int cxd2820r_read_ber_t(struct dvb_frontend *fe, u32 *ber)
263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	int ret;
	u8 buf[3], start_ber = 0;
	*ber = 0;

	if (priv->ber_running) {
		ret = cxd2820r_rd_regs(priv, 0x00076, buf, sizeof(buf));
		if (ret)
			goto error;

		if ((buf[2] >> 7) & 0x01 || (buf[2] >> 4) & 0x01) {
			*ber = (buf[2] & 0x0f) << 16 | buf[1] << 8 | buf[0];
			start_ber = 1;
		}
	} else {
		priv->ber_running = 1;
		start_ber = 1;
	}

	if (start_ber) {
		/* (re)start BER */
		ret = cxd2820r_wr_reg(priv, 0x00079, 0x01);
		if (ret)
			goto error;
	}

	return ret;
error:
292
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
293 294 295
	return ret;
}

296
int cxd2820r_read_signal_strength_t(struct dvb_frontend *fe,
297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315
	u16 *strength)
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	int ret;
	u8 buf[2];
	u16 tmp;

	ret = cxd2820r_rd_regs(priv, 0x00026, buf, sizeof(buf));
	if (ret)
		goto error;

	tmp = (buf[0] & 0x0f) << 8 | buf[1];
	tmp = ~tmp & 0x0fff;

	/* scale value to 0x0000-0xffff from 0x0000-0x0fff */
	*strength = tmp * 0xffff / 0x0fff;

	return ret;
error:
316
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
317 318 319
	return ret;
}

320
int cxd2820r_read_snr_t(struct dvb_frontend *fe, u16 *snr)
321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	int ret;
	u8 buf[2];
	u16 tmp;
	/* report SNR in dB * 10 */

	ret = cxd2820r_rd_regs(priv, 0x00028, buf, sizeof(buf));
	if (ret)
		goto error;

	tmp = (buf[0] & 0x1f) << 8 | buf[1];
	#define CXD2820R_LOG10_8_24 15151336 /* log10(8) << 24 */
	if (tmp)
		*snr = (intlog10(tmp) - CXD2820R_LOG10_8_24) / ((1 << 24)
			/ 100);
	else
		*snr = 0;

340 341
	dev_dbg(&priv->i2c->dev, "%s: dBx10=%d val=%04x\n", __func__, *snr,
			tmp);
342 343 344

	return ret;
error:
345
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
346 347 348
	return ret;
}

349
int cxd2820r_read_ucblocks_t(struct dvb_frontend *fe, u32 *ucblocks)
350 351 352 353 354 355
{
	*ucblocks = 0;
	/* no way to read ? */
	return 0;
}

356
int cxd2820r_read_status_t(struct dvb_frontend *fe, fe_status_t *status)
357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	int ret;
	u8 buf[4];
	*status = 0;

	ret = cxd2820r_rd_reg(priv, 0x00010, &buf[0]);
	if (ret)
		goto error;

	if ((buf[0] & 0x07) == 6) {
		ret = cxd2820r_rd_reg(priv, 0x00073, &buf[1]);
		if (ret)
			goto error;

		if (((buf[1] >> 3) & 0x01) == 1) {
			*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
				FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
		} else {
			*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
				FE_HAS_VITERBI | FE_HAS_SYNC;
		}
	} else {
		ret = cxd2820r_rd_reg(priv, 0x00014, &buf[2]);
		if (ret)
			goto error;

		if ((buf[2] & 0x0f) >= 4) {
			ret = cxd2820r_rd_reg(priv, 0x00a14, &buf[3]);
			if (ret)
				goto error;

			if (((buf[3] >> 4) & 0x01) == 1)
				*status |= FE_HAS_SIGNAL;
		}
	}

394
	dev_dbg(&priv->i2c->dev, "%s: lock=%*ph\n", __func__, 4, buf);
395 396 397

	return ret;
error:
398
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
399 400 401
	return ret;
}

402
int cxd2820r_init_t(struct dvb_frontend *fe)
403 404 405 406 407 408 409 410 411 412
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	int ret;

	ret = cxd2820r_wr_reg(priv, 0x00085, 0x07);
	if (ret)
		goto error;

	return ret;
error:
413
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
414 415 416
	return ret;
}

417
int cxd2820r_sleep_t(struct dvb_frontend *fe)
418 419 420 421 422 423 424 425 426 427 428
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	int ret, i;
	struct reg_val_mask tab[] = {
		{ 0x000ff, 0x1f, 0xff },
		{ 0x00085, 0x00, 0xff },
		{ 0x00088, 0x01, 0xff },
		{ 0x00081, 0x00, 0xff },
		{ 0x00080, 0x00, 0xff },
	};

429
	dev_dbg(&priv->i2c->dev, "%s\n", __func__);
430 431 432 433 434 435 436 437 438 439 440 441

	priv->delivery_system = SYS_UNDEFINED;

	for (i = 0; i < ARRAY_SIZE(tab); i++) {
		ret = cxd2820r_wr_reg_mask(priv, tab[i].reg, tab[i].val,
			tab[i].mask);
		if (ret)
			goto error;
	}

	return ret;
error:
442
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
443 444 445
	return ret;
}

446
int cxd2820r_get_tune_settings_t(struct dvb_frontend *fe,
447 448 449 450 451 452 453 454
	struct dvb_frontend_tune_settings *s)
{
	s->min_delay_ms = 500;
	s->step_size = fe->ops.info.frequency_stepsize * 2;
	s->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;

	return 0;
}