da8xx.h 5.1 KB
Newer Older
1 2 3 4 5
/*
 * Chip specific defines for DA8XX/OMAP L1XX SoC
 *
 * Author: Mark A. Greer <mgreer@mvista.com>
 *
6
 * 2007, 2009-2010 (c) MontaVista Software, Inc. This file is licensed under
7 8 9 10 11 12 13
 * the terms of the GNU General Public License version 2. This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 */
#ifndef __ASM_ARCH_DAVINCI_DA8XX_H
#define __ASM_ARCH_DAVINCI_DA8XX_H

14 15
#include <video/da8xx-fb.h>

16
#include <linux/platform_device.h>
17
#include <linux/davinci_emac.h>
18

19 20 21
#include <mach/serial.h>
#include <mach/edma.h>
#include <mach/i2c.h>
22
#include <mach/asp.h>
23
#include <mach/mmc.h>
24
#include <mach/usb.h>
25
#include <mach/pm.h>
26

27 28
extern void __iomem *da8xx_syscfg0_base;
extern void __iomem *da8xx_syscfg1_base;
29

30 31 32 33 34 35 36 37 38 39 40
/*
 * The cp_intc interrupt controller for the da8xx isn't in the same
 * chunk of physical memory space as the other registers (like it is
 * on the davincis) so it needs to be mapped separately.  It will be
 * mapped early on when the I/O space is mapped and we'll put it just
 * before the I/O space in the processor's virtual memory space.
 */
#define DA8XX_CP_INTC_BASE	0xfffee000
#define DA8XX_CP_INTC_SIZE	SZ_8K
#define DA8XX_CP_INTC_VIRT	(IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)

41 42
#define DA8XX_SYSCFG0_BASE	(IO_PHYS + 0x14000)
#define DA8XX_SYSCFG0_VIRT(x)	(da8xx_syscfg0_base + (x))
43
#define DA8XX_JTAG_ID_REG	0x18
44
#define DA8XX_CFGCHIP0_REG	0x17c
45
#define DA8XX_CFGCHIP2_REG	0x184
46
#define DA8XX_CFGCHIP3_REG	0x188
47

48 49
#define DA8XX_SYSCFG1_BASE	(IO_PHYS + 0x22C000)
#define DA8XX_SYSCFG1_VIRT(x)	(da8xx_syscfg1_base + (x))
50
#define DA8XX_DEEPSLEEP_REG	0x8
51

52 53 54 55 56 57
#define DA8XX_PSC0_BASE		0x01c10000
#define DA8XX_PLL0_BASE		0x01c11000
#define DA8XX_TIMER64P0_BASE	0x01c20000
#define DA8XX_TIMER64P1_BASE	0x01c21000
#define DA8XX_GPIO_BASE		0x01e26000
#define DA8XX_PSC1_BASE		0x01e27000
58
#define DA8XX_LCD_CNTRL_BASE	0x01e13000
59
#define DA8XX_PLL1_BASE		0x01e1a000
60
#define DA8XX_MMCSD0_BASE	0x01c40000
61
#define DA8XX_AEMIF_CS2_BASE	0x60000000
62 63
#define DA8XX_AEMIF_CS3_BASE	0x62000000
#define DA8XX_AEMIF_CTL_BASE	0x68000000
64
#define DA8XX_DDR2_CTL_BASE	0xb0000000
65
#define DA8XX_ARM_RAM_BASE	0xffff0000
66

67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87
#define PINMUX0			0x00
#define PINMUX1			0x04
#define PINMUX2			0x08
#define PINMUX3			0x0c
#define PINMUX4			0x10
#define PINMUX5			0x14
#define PINMUX6			0x18
#define PINMUX7			0x1c
#define PINMUX8			0x20
#define PINMUX9			0x24
#define PINMUX10		0x28
#define PINMUX11		0x2c
#define PINMUX12		0x30
#define PINMUX13		0x34
#define PINMUX14		0x38
#define PINMUX15		0x3c
#define PINMUX16		0x40
#define PINMUX17		0x44
#define PINMUX18		0x48
#define PINMUX19		0x4c

88
void __init da830_init(void);
89
void __init da850_init(void);
90 91 92 93

int da8xx_register_edma(void);
int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
int da8xx_register_watchdog(void);
94
int da8xx_register_usb20(unsigned mA, unsigned potpgt);
95
int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
96
int da8xx_register_emac(void);
97
int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
98
int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
99
void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
100
int da8xx_register_rtc(void);
101
int da850_register_cpufreq(void);
102
int da8xx_register_cpuidle(void);
103
void __iomem * __init da8xx_get_mem_ctlr(void);
104
int da850_register_pm(struct platform_device *pdev);
105 106 107

extern struct platform_device da8xx_serial_device;
extern struct emac_platform_data da8xx_emac_pdata;
108 109
extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135

extern const short da830_emif25_pins[];
extern const short da830_spi0_pins[];
extern const short da830_spi1_pins[];
extern const short da830_mmc_sd_pins[];
extern const short da830_uart0_pins[];
extern const short da830_uart1_pins[];
extern const short da830_uart2_pins[];
extern const short da830_usb20_pins[];
extern const short da830_usb11_pins[];
extern const short da830_uhpi_pins[];
extern const short da830_cpgmac_pins[];
extern const short da830_emif3c_pins[];
extern const short da830_mcasp0_pins[];
extern const short da830_mcasp1_pins[];
extern const short da830_mcasp2_pins[];
extern const short da830_i2c0_pins[];
extern const short da830_i2c1_pins[];
extern const short da830_lcdcntl_pins[];
extern const short da830_pwm_pins[];
extern const short da830_ecap0_pins[];
extern const short da830_ecap1_pins[];
extern const short da830_ecap2_pins[];
extern const short da830_eqep0_pins[];
extern const short da830_eqep1_pins[];

136 137 138 139 140
extern const short da850_uart0_pins[];
extern const short da850_uart1_pins[];
extern const short da850_uart2_pins[];
extern const short da850_i2c0_pins[];
extern const short da850_i2c1_pins[];
141
extern const short da850_cpgmac_pins[];
142
extern const short da850_rmii_pins[];
143
extern const short da850_mcasp_pins[];
144
extern const short da850_lcdcntl_pins[];
145
extern const short da850_mmcsd0_pins[];
146
extern const short da850_nand_pins[];
147
extern const short da850_nor_pins[];
148

149
#ifdef CONFIG_DAVINCI_MUX
150
int da8xx_pinmux_setup(const short pins[]);
151 152 153
#else
static inline int da8xx_pinmux_setup(const short pins[]) { return 0; }
#endif
154 155

#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */