ath.h 4.2 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
/*
 * Copyright (c) 2008-2009 Atheros Communications Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#ifndef ATH_H
#define ATH_H

#include <linux/skbuff.h>
21
#include <linux/if_ether.h>
22
#include <net/mac80211.h>
23

24 25 26 27 28 29 30 31 32 33
/*
 * The key cache is used for h/w cipher state and also for
 * tracking station state such as the current tx antenna.
 * We also setup a mapping table between key cache slot indices
 * and station state to short-circuit node lookups on rx.
 * Different parts have different size key caches.  We handle
 * up to ATH_KEYMAX entries (could dynamically allocate state).
 */
#define	ATH_KEYMAX	        128     /* max key cache size we handle */

34 35
static const u8 ath_bcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};

36 37 38 39 40 41 42 43 44
struct ath_ani {
	bool caldone;
	unsigned int longcal_timer;
	unsigned int shortcal_timer;
	unsigned int resetcal_timer;
	unsigned int checkani_timer;
	struct timer_list timer;
};

45 46 47 48 49
enum ath_device_state {
	ATH_HW_UNAVAILABLE,
	ATH_HW_INITIALIZED,
};

S
Sujith 已提交
50 51 52 53 54 55
enum ath_bus_type {
	ATH_PCI,
	ATH_AHB,
	ATH_USB,
};

56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72
struct reg_dmn_pair_mapping {
	u16 regDmnEnum;
	u16 reg_5ghz_ctl;
	u16 reg_2ghz_ctl;
};

struct ath_regulatory {
	char alpha2[2];
	u16 country_code;
	u16 max_power_level;
	u32 tp_scale;
	u16 current_rd;
	u16 current_rd_ext;
	int16_t power_limit;
	struct reg_dmn_pair_mapping *regpair;
};

73
enum ath_crypt_caps {
74 75
	ATH_CRYPT_CAP_CIPHER_AESCCM		= BIT(0),
	ATH_CRYPT_CAP_MIC_COMBINED		= BIT(1),
76 77
};

78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98
struct ath_keyval {
	u8 kv_type;
	u8 kv_pad;
	u16 kv_len;
	u8 kv_val[16]; /* TK */
	u8 kv_mic[8]; /* Michael MIC key */
	u8 kv_txmic[8]; /* Michael MIC TX key (used only if the hardware
			 * supports both MIC keys in the same key cache entry;
			 * in that case, kv_mic is the RX key) */
};

enum ath_cipher {
	ATH_CIPHER_WEP = 0,
	ATH_CIPHER_AES_OCB = 1,
	ATH_CIPHER_AES_CCM = 2,
	ATH_CIPHER_CKIP = 3,
	ATH_CIPHER_TKIP = 4,
	ATH_CIPHER_CLR = 5,
	ATH_CIPHER_MIC = 127
};

99 100 101 102 103 104
/**
 * struct ath_ops - Register read/write operations
 *
 * @read: Register read
 * @write: Register write
 * @enable_write_buffer: Enable multiple register writes
105
 * @write_flush: flush buffered register writes and disable buffering
106
 */
107 108
struct ath_ops {
	unsigned int (*read)(void *, u32 reg_offset);
109 110 111
	void (*write)(void *, u32 val, u32 reg_offset);
	void (*enable_write_buffer)(void *);
	void (*write_flush) (void *);
112 113
};

114 115 116
struct ath_common;

struct ath_bus_ops {
S
Sujith 已提交
117 118 119 120
	enum ath_bus_type ath_bus_type;
	void (*read_cachesize)(struct ath_common *common, int *csz);
	bool (*eeprom_read)(struct ath_common *common, u32 off, u16 *data);
	void (*bt_coex_prep)(struct ath_common *common);
121 122
};

123
struct ath_common {
124
	void *ah;
125
	void *priv;
126
	struct ieee80211_hw *hw;
127
	int debug_mask;
128
	enum ath_device_state state;
129

130 131
	struct ath_ani ani;

132
	u16 cachelsz;
133 134 135 136
	u16 curaid;
	u8 macaddr[ETH_ALEN];
	u8 curbssid[ETH_ALEN];
	u8 bssidmask[ETH_ALEN];
137

138 139 140
	u8 tx_chainmask;
	u8 rx_chainmask;

141 142
	u32 rx_bufsize;

143 144
	u32 keymax;
	DECLARE_BITMAP(keymap, ATH_KEYMAX);
145
	DECLARE_BITMAP(tkip_keymap, ATH_KEYMAX);
146
	enum ath_crypt_caps crypt_caps;
147

148
	struct ath_regulatory regulatory;
149
	const struct ath_ops *ops;
150
	const struct ath_bus_ops *bus_ops;
151 152 153 154 155 156
};

struct sk_buff *ath_rxbuf_alloc(struct ath_common *common,
				u32 len,
				gfp_t gfp_mask);

157
void ath_hw_setbssidmask(struct ath_common *common);
158 159 160 161 162 163
void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key);
int ath_key_config(struct ath_common *common,
			  struct ieee80211_vif *vif,
			  struct ieee80211_sta *sta,
			  struct ieee80211_key_conf *key);
bool ath_hw_keyreset(struct ath_common *common, u16 entry);
164

165
#endif /* ATH_H */