megaraid_sas_fp.c 40.4 KB
Newer Older
1 2 3
/*
 *  Linux MegaRAID driver for SAS based RAID controllers
 *
4 5
 *  Copyright (c) 2009-2013  LSI Corporation
 *  Copyright (c) 2013-2014  Avago Technologies
6 7 8 9 10 11 12 13 14 15 16 17
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version 2
 *  of the License, or (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
18
 *  along with this program.  If not, see <http://www.gnu.org/licenses/>.
19 20 21
 *
 *  FILE: megaraid_sas_fp.c
 *
22
 *  Authors: Avago Technologies
23 24 25
 *           Sumant Patro
 *           Varad Talamacki
 *           Manoj Jose
26 27
 *           Kashyap Desai <kashyap.desai@avagotech.com>
 *           Sumit Saxena <sumit.saxena@avagotech.com>
28
 *
29
 *  Send feedback to: megaraidlinux.pdl@avagotech.com
30
 *
31 32
 *  Mail to: Avago Technologies, 350 West Trimble Road, Building 90,
 *  San Jose, California 95131
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56
 */

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/list.h>
#include <linux/moduleparam.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/uio.h>
#include <linux/uaccess.h>
#include <linux/fs.h>
#include <linux/compat.h>
#include <linux/blkdev.h>
#include <linux/poll.h>

#include <scsi/scsi.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_device.h>
#include <scsi/scsi_host.h>

#include "megaraid_sas_fusion.h"
57
#include "megaraid_sas.h"
58 59
#include <asm/div64.h>

60 61 62 63 64 65 66
#define LB_PENDING_CMDS_DEFAULT 4
static unsigned int lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;
module_param(lb_pending_cmds, int, S_IRUGO);
MODULE_PARM_DESC(lb_pending_cmds, "Change raid-1 load balancing outstanding "
	"threshold. Valid Values are 1-128. Default: 4");


67 68
#define ABS_DIFF(a, b)   (((a) > (b)) ? ((a) - (b)) : ((b) - (a)))
#define MR_LD_STATE_OPTIMAL 3
69

70 71 72 73
#define SPAN_ROW_SIZE(map, ld, index_) (MR_LdSpanPtrGet(ld, index_, map)->spanRowSize)
#define SPAN_ROW_DATA_SIZE(map_, ld, index_)   (MR_LdSpanPtrGet(ld, index_, map)->spanRowDataSize)
#define SPAN_INVALID  0xff

74
/* Prototypes */
75
static void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
76 77 78
	PLD_SPAN_INFO ldSpanInfo);
static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
	u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
79
	struct RAID_CONTEXT *pRAID_Context, struct MR_DRV_RAID_MAP_ALL *map);
80
static u64 get_row_from_strip(struct megasas_instance *instance, u32 ld,
81
	u64 strip, struct MR_DRV_RAID_MAP_ALL *map);
82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114

u32 mega_mod64(u64 dividend, u32 divisor)
{
	u64 d;
	u32 remainder;

	if (!divisor)
		printk(KERN_ERR "megasas : DIVISOR is zero, in div fn\n");
	d = dividend;
	remainder = do_div(d, divisor);
	return remainder;
}

/**
 * @param dividend    : Dividend
 * @param divisor    : Divisor
 *
 * @return quotient
 **/
u64 mega_div64_32(uint64_t dividend, uint32_t divisor)
{
	u32 remainder;
	u64 d;

	if (!divisor)
		printk(KERN_ERR "megasas : DIVISOR is zero in mod fn\n");

	d = dividend;
	remainder = do_div(d, divisor);

	return d;
}

115
struct MR_LD_RAID *MR_LdRaidGet(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
116 117 118 119 120
{
	return &map->raidMap.ldSpanMap[ld].ldRaid;
}

static struct MR_SPAN_BLOCK_INFO *MR_LdSpanInfoGet(u32 ld,
121
						   struct MR_DRV_RAID_MAP_ALL
122 123 124 125 126
						   *map)
{
	return &map->raidMap.ldSpanMap[ld].spanBlock[0];
}

127
static u8 MR_LdDataArmGet(u32 ld, u32 armIdx, struct MR_DRV_RAID_MAP_ALL *map)
128 129 130 131
{
	return map->raidMap.ldSpanMap[ld].dataArmMap[armIdx];
}

132
u16 MR_ArPdGet(u32 ar, u32 arm, struct MR_DRV_RAID_MAP_ALL *map)
133
{
134
	return le16_to_cpu(map->raidMap.arMapInfo[ar].pd[arm]);
135 136
}

137
u16 MR_LdSpanArrayGet(u32 ld, u32 span, struct MR_DRV_RAID_MAP_ALL *map)
138
{
139
	return le16_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].span.arrayRef);
140 141
}

142
__le16 MR_PdDevHandleGet(u32 pd, struct MR_DRV_RAID_MAP_ALL *map)
143 144 145 146
{
	return map->raidMap.devHndlInfo[pd].curDevHdl;
}

147 148 149 150 151
static u8 MR_PdInterfaceTypeGet(u32 pd, struct MR_DRV_RAID_MAP_ALL *map)
{
	return map->raidMap.devHndlInfo[pd].interfaceType;
}

152
u16 MR_GetLDTgtId(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
153
{
154
	return le16_to_cpu(map->raidMap.ldSpanMap[ld].ldRaid.targetId);
155 156
}

157
u16 MR_TargetIdToLdGet(u32 ldTgtId, struct MR_DRV_RAID_MAP_ALL *map)
158
{
159
	return map->raidMap.ldTgtIdToLd[ldTgtId];
160 161 162
}

static struct MR_LD_SPAN *MR_LdSpanPtrGet(u32 ld, u32 span,
163
					  struct MR_DRV_RAID_MAP_ALL *map)
164 165 166 167
{
	return &map->raidMap.ldSpanMap[ld].spanBlock[span].span;
}

168 169 170
/*
 * This function will Populate Driver Map using firmware raid map
 */
171
static int MR_PopulateDrvRaidMap(struct megasas_instance *instance)
172 173 174 175
{
	struct fusion_context *fusion = instance->ctrl_context;
	struct MR_FW_RAID_MAP_ALL     *fw_map_old    = NULL;
	struct MR_FW_RAID_MAP         *pFwRaidMap    = NULL;
176
	int i, j;
177
	u16 ld_count;
178 179 180
	struct MR_FW_RAID_MAP_DYNAMIC *fw_map_dyn;
	struct MR_FW_RAID_MAP_EXT *fw_map_ext;
	struct MR_RAID_MAP_DESC_TABLE *desc_table;
181 182 183 184 185


	struct MR_DRV_RAID_MAP_ALL *drv_map =
			fusion->ld_drv_map[(instance->map_id & 1)];
	struct MR_DRV_RAID_MAP *pDrvRaidMap = &drv_map->raidMap;
186 187 188 189
	void *raid_map_data = NULL;

	memset(drv_map, 0, fusion->drv_map_sz);
	memset(pDrvRaidMap->ldTgtIdToLd,
190
	       0xff, (sizeof(u16) * MAX_LOGICAL_DRIVES_DYN));
191 192 193 194 195 196 197 198 199 200 201 202 203

	if (instance->max_raid_mapsize) {
		fw_map_dyn = fusion->ld_map[(instance->map_id & 1)];
		desc_table =
		(struct MR_RAID_MAP_DESC_TABLE *)((void *)fw_map_dyn + le32_to_cpu(fw_map_dyn->desc_table_offset));
		if (desc_table != fw_map_dyn->raid_map_desc_table)
			dev_dbg(&instance->pdev->dev, "offsets of desc table are not matching desc %p original %p\n",
				desc_table, fw_map_dyn->raid_map_desc_table);

		ld_count = (u16)le16_to_cpu(fw_map_dyn->ld_count);
		pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
		pDrvRaidMap->fpPdIoTimeoutSec =
			fw_map_dyn->fp_pd_io_timeout_sec;
204 205
		pDrvRaidMap->totalSize =
			cpu_to_le32(sizeof(struct MR_DRV_RAID_MAP_ALL));
206 207 208 209 210 211 212 213 214 215 216
		/* point to actual data starting point*/
		raid_map_data = (void *)fw_map_dyn +
			le32_to_cpu(fw_map_dyn->desc_table_offset) +
			le32_to_cpu(fw_map_dyn->desc_table_size);

		for (i = 0; i < le32_to_cpu(fw_map_dyn->desc_table_num_elements); ++i) {
			switch (le32_to_cpu(desc_table->raid_map_desc_type)) {
			case RAID_MAP_DESC_TYPE_DEVHDL_INFO:
				fw_map_dyn->dev_hndl_info =
				(struct MR_DEV_HANDLE_INFO *)(raid_map_data + le32_to_cpu(desc_table->raid_map_desc_offset));
				memcpy(pDrvRaidMap->devHndlInfo,
217 218 219
					fw_map_dyn->dev_hndl_info,
					sizeof(struct MR_DEV_HANDLE_INFO) *
					le32_to_cpu(desc_table->raid_map_desc_elements));
220 221 222
			break;
			case RAID_MAP_DESC_TYPE_TGTID_INFO:
				fw_map_dyn->ld_tgt_id_to_ld =
223 224 225 226 227 228
					(u16 *)(raid_map_data +
					le32_to_cpu(desc_table->raid_map_desc_offset));
				for (j = 0; j < le32_to_cpu(desc_table->raid_map_desc_elements); j++) {
					pDrvRaidMap->ldTgtIdToLd[j] =
						le16_to_cpu(fw_map_dyn->ld_tgt_id_to_ld[j]);
				}
229 230 231
			break;
			case RAID_MAP_DESC_TYPE_ARRAY_INFO:
				fw_map_dyn->ar_map_info =
232 233
					(struct MR_ARRAY_INFO *)
					(raid_map_data + le32_to_cpu(desc_table->raid_map_desc_offset));
234
				memcpy(pDrvRaidMap->arMapInfo,
235 236 237
				       fw_map_dyn->ar_map_info,
				       sizeof(struct MR_ARRAY_INFO) *
				       le32_to_cpu(desc_table->raid_map_desc_elements));
238 239 240
			break;
			case RAID_MAP_DESC_TYPE_SPAN_INFO:
				fw_map_dyn->ld_span_map =
241 242 243
					(struct MR_LD_SPAN_MAP *)
					(raid_map_data +
					le32_to_cpu(desc_table->raid_map_desc_offset));
244
				memcpy(pDrvRaidMap->ldSpanMap,
245 246 247
				       fw_map_dyn->ld_span_map,
				       sizeof(struct MR_LD_SPAN_MAP) *
				       le32_to_cpu(desc_table->raid_map_desc_elements));
248 249 250 251 252 253 254 255 256 257
			break;
			default:
				dev_dbg(&instance->pdev->dev, "wrong number of desctableElements %d\n",
					fw_map_dyn->desc_table_num_elements);
			}
			++desc_table;
		}

	} else if (instance->supportmax256vd) {
		fw_map_ext =
258
			(struct MR_FW_RAID_MAP_EXT *)fusion->ld_map[(instance->map_id & 1)];
259 260 261
		ld_count = (u16)le16_to_cpu(fw_map_ext->ldCount);
		if (ld_count > MAX_LOGICAL_DRIVES_EXT) {
			dev_dbg(&instance->pdev->dev, "megaraid_sas: LD count exposed in RAID map in not valid\n");
262
			return 1;
263 264 265 266 267 268 269 270
		}

		pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
		pDrvRaidMap->fpPdIoTimeoutSec = fw_map_ext->fpPdIoTimeoutSec;
		for (i = 0; i < (MAX_LOGICAL_DRIVES_EXT); i++)
			pDrvRaidMap->ldTgtIdToLd[i] =
				(u16)fw_map_ext->ldTgtIdToLd[i];
		memcpy(pDrvRaidMap->ldSpanMap, fw_map_ext->ldSpanMap,
271
		       sizeof(struct MR_LD_SPAN_MAP) * ld_count);
272
		memcpy(pDrvRaidMap->arMapInfo, fw_map_ext->arMapInfo,
273
		       sizeof(struct MR_ARRAY_INFO) * MAX_API_ARRAYS_EXT);
274
		memcpy(pDrvRaidMap->devHndlInfo, fw_map_ext->devHndlInfo,
275 276
		       sizeof(struct MR_DEV_HANDLE_INFO) *
		       MAX_RAIDMAP_PHYSICAL_DEVICES);
277 278 279 280

		/* New Raid map will not set totalSize, so keep expected value
		 * for legacy code in ValidateMapInfo
		 */
281 282
		pDrvRaidMap->totalSize =
			cpu_to_le32(sizeof(struct MR_FW_RAID_MAP_EXT));
283 284 285 286
	} else {
		fw_map_old = (struct MR_FW_RAID_MAP_ALL *)
			fusion->ld_map[(instance->map_id & 1)];
		pFwRaidMap = &fw_map_old->raidMap;
287
		ld_count = (u16)le32_to_cpu(pFwRaidMap->ldCount);
288 289 290 291 292 293
		if (ld_count > MAX_LOGICAL_DRIVES) {
			dev_dbg(&instance->pdev->dev,
				"LD count exposed in RAID map in not valid\n");
			return 1;
		}

294
		pDrvRaidMap->totalSize = pFwRaidMap->totalSize;
295
		pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
296 297 298 299
		pDrvRaidMap->fpPdIoTimeoutSec = pFwRaidMap->fpPdIoTimeoutSec;
		for (i = 0; i < MAX_RAIDMAP_LOGICAL_DRIVES + MAX_RAIDMAP_VIEWS; i++)
			pDrvRaidMap->ldTgtIdToLd[i] =
				(u8)pFwRaidMap->ldTgtIdToLd[i];
300
		for (i = 0; i < ld_count; i++) {
301 302 303 304 305 306 307 308
			pDrvRaidMap->ldSpanMap[i] = pFwRaidMap->ldSpanMap[i];
		}
		memcpy(pDrvRaidMap->arMapInfo, pFwRaidMap->arMapInfo,
			sizeof(struct MR_ARRAY_INFO) * MAX_RAIDMAP_ARRAYS);
		memcpy(pDrvRaidMap->devHndlInfo, pFwRaidMap->devHndlInfo,
			sizeof(struct MR_DEV_HANDLE_INFO) *
			MAX_RAIDMAP_PHYSICAL_DEVICES);
	}
309 310

	return 0;
311 312
}

313 314 315
/*
 * This function will validate Map info data provided by FW
 */
316
u8 MR_ValidateMapInfo(struct megasas_instance *instance)
317
{
318 319 320 321 322
	struct fusion_context *fusion;
	struct MR_DRV_RAID_MAP_ALL *drv_map;
	struct MR_DRV_RAID_MAP *pDrvRaidMap;
	struct LD_LOAD_BALANCE_INFO *lbInfo;
	PLD_SPAN_INFO ldSpanInfo;
323
	struct MR_LD_RAID         *raid;
324
	u16 num_lds, i;
325
	u16 ld;
326
	u32 expected_size;
327

328 329
	if (MR_PopulateDrvRaidMap(instance))
		return 0;
330 331 332 333 334 335 336 337

	fusion = instance->ctrl_context;
	drv_map = fusion->ld_drv_map[(instance->map_id & 1)];
	pDrvRaidMap = &drv_map->raidMap;

	lbInfo = fusion->load_balance_info;
	ldSpanInfo = fusion->log_to_span;

338 339 340
	if (instance->max_raid_mapsize)
		expected_size = sizeof(struct MR_DRV_RAID_MAP_ALL);
	else if (instance->supportmax256vd)
341 342 343 344
		expected_size = sizeof(struct MR_FW_RAID_MAP_EXT);
	else
		expected_size =
			(sizeof(struct MR_FW_RAID_MAP) - sizeof(struct MR_LD_SPAN_MAP) +
345
			(sizeof(struct MR_LD_SPAN_MAP) * le16_to_cpu(pDrvRaidMap->ldCount)));
346 347

	if (le32_to_cpu(pDrvRaidMap->totalSize) != expected_size) {
348 349 350
		dev_dbg(&instance->pdev->dev, "megasas: map info structure size 0x%x",
			le32_to_cpu(pDrvRaidMap->totalSize));
		dev_dbg(&instance->pdev->dev, "is not matching expected size 0x%x\n",
351
			(unsigned int)expected_size);
352 353 354
		dev_err(&instance->pdev->dev, "megasas: span map %x, pDrvRaidMap->totalSize : %x\n",
			(unsigned int)sizeof(struct MR_LD_SPAN_MAP),
			le32_to_cpu(pDrvRaidMap->totalSize));
355 356 357
		return 0;
	}

358
	if (instance->UnevenSpanSupport)
359
		mr_update_span_set(drv_map, ldSpanInfo);
360

361 362
	if (lbInfo)
		mr_update_load_balance_params(drv_map, lbInfo);
363

364
	num_lds = le16_to_cpu(drv_map->raidMap.ldCount);
365 366

	/*Convert Raid capability values to CPU arch */
367 368 369 370 371 372 373
	for (i = 0; (num_lds > 0) && (i < MAX_LOGICAL_DRIVES_EXT); i++) {
		ld = MR_TargetIdToLdGet(i, drv_map);

		/* For non existing VDs, iterate to next VD*/
		if (ld >= (MAX_LOGICAL_DRIVES_EXT - 1))
			continue;

374
		raid = MR_LdRaidGet(ld, drv_map);
375
		le32_to_cpus((u32 *)&raid->capability);
376 377

		num_lds--;
378 379
	}

380 381 382 383
	return 1;
}

u32 MR_GetSpanBlock(u32 ld, u64 row, u64 *span_blk,
384
		    struct MR_DRV_RAID_MAP_ALL *map)
385 386 387 388 389 390 391 392
{
	struct MR_SPAN_BLOCK_INFO *pSpanBlock = MR_LdSpanInfoGet(ld, map);
	struct MR_QUAD_ELEMENT    *quad;
	struct MR_LD_RAID         *raid = MR_LdRaidGet(ld, map);
	u32                span, j;

	for (span = 0; span < raid->spanDepth; span++, pSpanBlock++) {

393
		for (j = 0; j < le32_to_cpu(pSpanBlock->block_span_info.noElements); j++) {
394 395
			quad = &pSpanBlock->block_span_info.quad[j];

396
			if (le32_to_cpu(quad->diff) == 0)
397
				return SPAN_INVALID;
398 399 400
			if (le64_to_cpu(quad->logStart) <= row && row <=
				le64_to_cpu(quad->logEnd) && (mega_mod64(row - le64_to_cpu(quad->logStart),
				le32_to_cpu(quad->diff))) == 0) {
401 402
				if (span_blk != NULL) {
					u64  blk, debugBlk;
403
					blk =  mega_div64_32((row-le64_to_cpu(quad->logStart)), le32_to_cpu(quad->diff));
404 405
					debugBlk = blk;

406
					blk = (blk + le64_to_cpu(quad->offsetInSpan)) << raid->stripeShift;
407 408 409 410 411 412
					*span_blk = blk;
				}
				return span;
			}
		}
	}
413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434
	return SPAN_INVALID;
}

/*
******************************************************************************
*
* This routine calculates the Span block for given row using spanset.
*
* Inputs :
*    instance - HBA instance
*    ld   - Logical drive number
*    row        - Row number
*    map    - LD map
*
* Outputs :
*
*    span          - Span number
*    block         - Absolute Block number in the physical disk
*    div_error	   - Devide error code.
*/

u32 mr_spanset_get_span_block(struct megasas_instance *instance,
435
		u32 ld, u64 row, u64 *span_blk, struct MR_DRV_RAID_MAP_ALL *map)
436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453
{
	struct fusion_context *fusion = instance->ctrl_context;
	struct MR_LD_RAID         *raid = MR_LdRaidGet(ld, map);
	LD_SPAN_SET *span_set;
	struct MR_QUAD_ELEMENT    *quad;
	u32    span, info;
	PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;

	for (info = 0; info < MAX_QUAD_DEPTH; info++) {
		span_set = &(ldSpanInfo[ld].span_set[info]);

		if (span_set->span_row_data_width == 0)
			break;

		if (row > span_set->data_row_end)
			continue;

		for (span = 0; span < raid->spanDepth; span++)
454 455
			if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
				block_span_info.noElements) >= info+1) {
456 457 458
				quad = &map->raidMap.ldSpanMap[ld].
					spanBlock[span].
					block_span_info.quad[info];
459
				if (le32_to_cpu(quad->diff) == 0)
460
					return SPAN_INVALID;
461 462 463 464
				if (le64_to_cpu(quad->logStart) <= row  &&
					row <= le64_to_cpu(quad->logEnd)  &&
					(mega_mod64(row - le64_to_cpu(quad->logStart),
						le32_to_cpu(quad->diff))) == 0) {
465 466 467
					if (span_blk != NULL) {
						u64  blk;
						blk = mega_div64_32
468 469 470
						    ((row - le64_to_cpu(quad->logStart)),
						    le32_to_cpu(quad->diff));
						blk = (blk + le64_to_cpu(quad->offsetInSpan))
471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497
							 << raid->stripeShift;
						*span_blk = blk;
					}
					return span;
				}
			}
	}
	return SPAN_INVALID;
}

/*
******************************************************************************
*
* This routine calculates the row for given strip using spanset.
*
* Inputs :
*    instance - HBA instance
*    ld   - Logical drive number
*    Strip        - Strip
*    map    - LD map
*
* Outputs :
*
*    row         - row associated with strip
*/

static u64  get_row_from_strip(struct megasas_instance *instance,
498
	u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520
{
	struct fusion_context *fusion = instance->ctrl_context;
	struct MR_LD_RAID	*raid = MR_LdRaidGet(ld, map);
	LD_SPAN_SET	*span_set;
	PLD_SPAN_INFO	ldSpanInfo = fusion->log_to_span;
	u32		info, strip_offset, span, span_offset;
	u64		span_set_Strip, span_set_Row, retval;

	for (info = 0; info < MAX_QUAD_DEPTH; info++) {
		span_set = &(ldSpanInfo[ld].span_set[info]);

		if (span_set->span_row_data_width == 0)
			break;
		if (strip > span_set->data_strip_end)
			continue;

		span_set_Strip = strip - span_set->data_strip_start;
		strip_offset = mega_mod64(span_set_Strip,
				span_set->span_row_data_width);
		span_set_Row = mega_div64_32(span_set_Strip,
				span_set->span_row_data_width) * span_set->diff;
		for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
521
			if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
522
				block_span_info.noElements) >= info+1) {
523 524 525 526 527 528
				if (strip_offset >=
					span_set->strip_offset[span])
					span_offset++;
				else
					break;
			}
529

530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554
		retval = (span_set->data_row_start + span_set_Row +
				(span_offset - 1));
		return retval;
	}
	return -1LLU;
}


/*
******************************************************************************
*
* This routine calculates the Start Strip for given row using spanset.
*
* Inputs :
*    instance - HBA instance
*    ld   - Logical drive number
*    row        - Row number
*    map    - LD map
*
* Outputs :
*
*    Strip         - Start strip associated with row
*/

static u64 get_strip_from_row(struct megasas_instance *instance,
555
		u32 ld, u64 row, struct MR_DRV_RAID_MAP_ALL *map)
556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573
{
	struct fusion_context *fusion = instance->ctrl_context;
	struct MR_LD_RAID         *raid = MR_LdRaidGet(ld, map);
	LD_SPAN_SET *span_set;
	struct MR_QUAD_ELEMENT    *quad;
	PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
	u32    span, info;
	u64  strip;

	for (info = 0; info < MAX_QUAD_DEPTH; info++) {
		span_set = &(ldSpanInfo[ld].span_set[info]);

		if (span_set->span_row_data_width == 0)
			break;
		if (row > span_set->data_row_end)
			continue;

		for (span = 0; span < raid->spanDepth; span++)
574 575
			if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
				block_span_info.noElements) >= info+1) {
576 577
				quad = &map->raidMap.ldSpanMap[ld].
					spanBlock[span].block_span_info.quad[info];
578 579 580 581
				if (le64_to_cpu(quad->logStart) <= row  &&
					row <= le64_to_cpu(quad->logEnd)  &&
					mega_mod64((row - le64_to_cpu(quad->logStart)),
					le32_to_cpu(quad->diff)) == 0) {
582 583
					strip = mega_div64_32
						(((row - span_set->data_row_start)
584 585
							- le64_to_cpu(quad->logStart)),
							le32_to_cpu(quad->diff));
586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615
					strip *= span_set->span_row_data_width;
					strip += span_set->data_strip_start;
					strip += span_set->strip_offset[span];
					return strip;
				}
			}
	}
	dev_err(&instance->pdev->dev, "get_strip_from_row"
		"returns invalid strip for ld=%x, row=%lx\n",
		ld, (long unsigned int)row);
	return -1;
}

/*
******************************************************************************
*
* This routine calculates the Physical Arm for given strip using spanset.
*
* Inputs :
*    instance - HBA instance
*    ld   - Logical drive number
*    strip      - Strip
*    map    - LD map
*
* Outputs :
*
*    Phys Arm         - Phys Arm associated with strip
*/

static u32 get_arm_from_strip(struct megasas_instance *instance,
616
	u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636
{
	struct fusion_context *fusion = instance->ctrl_context;
	struct MR_LD_RAID         *raid = MR_LdRaidGet(ld, map);
	LD_SPAN_SET *span_set;
	PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
	u32    info, strip_offset, span, span_offset, retval;

	for (info = 0 ; info < MAX_QUAD_DEPTH; info++) {
		span_set = &(ldSpanInfo[ld].span_set[info]);

		if (span_set->span_row_data_width == 0)
			break;
		if (strip > span_set->data_strip_end)
			continue;

		strip_offset = (uint)mega_mod64
				((strip - span_set->data_strip_start),
				span_set->span_row_data_width);

		for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
637 638
			if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
				block_span_info.noElements) >= info+1) {
639 640 641 642 643 644 645
				if (strip_offset >=
					span_set->strip_offset[span])
					span_offset =
						span_set->strip_offset[span];
				else
					break;
			}
646

647 648 649 650 651 652 653 654 655 656 657 658 659
		retval = (strip_offset - span_offset);
		return retval;
	}

	dev_err(&instance->pdev->dev, "get_arm_from_strip"
		"returns invalid arm for ld=%x strip=%lx\n",
		ld, (long unsigned int)strip);

	return -1;
}

/* This Function will return Phys arm */
u8 get_arm(struct megasas_instance *instance, u32 ld, u8 span, u64 stripe,
660
		struct MR_DRV_RAID_MAP_ALL *map)
661 662 663 664 665 666 667 668 669 670 671 672 673 674
{
	struct MR_LD_RAID  *raid = MR_LdRaidGet(ld, map);
	/* Need to check correct default value */
	u32    arm = 0;

	switch (raid->level) {
	case 0:
	case 5:
	case 6:
		arm = mega_mod64(stripe, SPAN_ROW_SIZE(map, ld, span));
		break;
	case 1:
		/* start with logical arm */
		arm = get_arm_from_strip(instance, ld, stripe, map);
675
		if (arm != -1U)
676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703
			arm *= 2;
		break;
	}

	return arm;
}


/*
******************************************************************************
*
* This routine calculates the arm, span and block for the specified stripe and
* reference in stripe using spanset
*
* Inputs :
*
*    ld   - Logical drive number
*    stripRow        - Stripe number
*    stripRef    - Reference in stripe
*
* Outputs :
*
*    span          - Span number
*    block         - Absolute Block number in the physical disk
*/
static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
		u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
		struct RAID_CONTEXT *pRAID_Context,
704
		struct MR_DRV_RAID_MAP_ALL *map)
705 706
{
	struct MR_LD_RAID  *raid = MR_LdRaidGet(ld, map);
707
	u32     pd, arRef, r1_alt_pd;
708 709
	u8      physArm, span;
	u64     row;
710
	u8	retval = true;
711
	u64	*pdBlock = &io_info->pdBlock;
712
	__le16	*pDevHandle = &io_info->devHandle;
713
	u8	*pPdInterface = &io_info->pd_interface;
714
	u32	logArm, rowMod, armQ, arm;
715
	struct fusion_context *fusion;
716

717
	fusion = instance->ctrl_context;
718
	*pDevHandle = cpu_to_le16(MR_DEVHANDLE_INVALID);
719 720 721 722 723 724 725 726

	/*Get row and span from io_info for Uneven Span IO.*/
	row	    = io_info->start_row;
	span	    = io_info->start_span;


	if (raid->level == 6) {
		logArm = get_arm_from_strip(instance, ld, stripRow, map);
727
		if (logArm == -1U)
728
			return false;
729 730 731 732 733 734 735 736 737 738
		rowMod = mega_mod64(row, SPAN_ROW_SIZE(map, ld, span));
		armQ = SPAN_ROW_SIZE(map, ld, span) - 1 - rowMod;
		arm = armQ + 1 + logArm;
		if (arm >= SPAN_ROW_SIZE(map, ld, span))
			arm -= SPAN_ROW_SIZE(map, ld, span);
		physArm = (u8)arm;
	} else
		/* Calculate the arm */
		physArm = get_arm(instance, ld, span, stripRow, map);
	if (physArm == 0xFF)
739
		return false;
740 741 742 743

	arRef       = MR_LdSpanArrayGet(ld, span, map);
	pd          = MR_ArPdGet(arRef, physArm, map);

744
	if (pd != MR_PD_INVALID) {
745
		*pDevHandle = MR_PdDevHandleGet(pd, map);
746
		*pPdInterface = MR_PdInterfaceTypeGet(pd, map);
747
		/* get second pd also for raid 1/10 fast path writes*/
748
		if ((instance->adapter_type == VENTURA_SERIES) &&
749 750
		    (raid->level == 1) &&
		    !io_info->isRead) {
751 752 753 754 755 756
			r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map);
			if (r1_alt_pd != MR_PD_INVALID)
				io_info->r1_alt_dev_handle =
				MR_PdDevHandleGet(r1_alt_pd, map);
		}
	} else {
757
		if ((raid->level >= 5) &&
758 759
			((instance->adapter_type == THUNDERBOLT_SERIES)  ||
			((instance->adapter_type == INVADER_SERIES) &&
760
			(raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
761
			pRAID_Context->reg_lock_flags = REGION_TYPE_EXCLUSIVE;
762
		else if (raid->level == 1) {
763 764
			physArm = physArm + 1;
			pd = MR_ArPdGet(arRef, physArm, map);
765
			if (pd != MR_PD_INVALID) {
766
				*pDevHandle = MR_PdDevHandleGet(pd, map);
767 768
				*pPdInterface = MR_PdInterfaceTypeGet(pd, map);
			}
769 770 771
		}
	}

772
	*pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
773
	if (instance->adapter_type == VENTURA_SERIES) {
774
		((struct RAID_CONTEXT_G35 *)pRAID_Context)->span_arm =
775 776 777 778 779 780 781 782
			(span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
		io_info->span_arm =
			(span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
	} else {
		pRAID_Context->span_arm =
			(span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
		io_info->span_arm = pRAID_Context->span_arm;
	}
783
	io_info->pd_after_lb = pd;
784
	return retval;
785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803
}

/*
******************************************************************************
*
* This routine calculates the arm, span and block for the specified stripe and
* reference in stripe.
*
* Inputs :
*
*    ld   - Logical drive number
*    stripRow        - Stripe number
*    stripRef    - Reference in stripe
*
* Outputs :
*
*    span          - Span number
*    block         - Absolute Block number in the physical disk
*/
804
u8 MR_GetPhyParams(struct megasas_instance *instance, u32 ld, u64 stripRow,
805 806
		u16 stripRef, struct IO_REQUEST_INFO *io_info,
		struct RAID_CONTEXT *pRAID_Context,
807
		struct MR_DRV_RAID_MAP_ALL *map)
808 809
{
	struct MR_LD_RAID  *raid = MR_LdRaidGet(ld, map);
810
	u32         pd, arRef, r1_alt_pd;
811 812
	u8          physArm, span;
	u64         row;
813
	u8	    retval = true;
814
	u64	    *pdBlock = &io_info->pdBlock;
815
	__le16	    *pDevHandle = &io_info->devHandle;
816
	u8	    *pPdInterface = &io_info->pd_interface;
817 818 819
	struct fusion_context *fusion;

	fusion = instance->ctrl_context;
820
	*pDevHandle = cpu_to_le16(MR_DEVHANDLE_INVALID);
821 822 823 824 825 826 827 828 829

	row =  mega_div64_32(stripRow, raid->rowDataSize);

	if (raid->level == 6) {
		/* logical arm within row */
		u32 logArm =  mega_mod64(stripRow, raid->rowDataSize);
		u32 rowMod, armQ, arm;

		if (raid->rowSize == 0)
830
			return false;
831 832 833 834 835 836 837 838 839
		/* get logical row mod */
		rowMod = mega_mod64(row, raid->rowSize);
		armQ = raid->rowSize-1-rowMod; /* index of Q drive */
		arm = armQ+1+logArm; /* data always logically follows Q */
		if (arm >= raid->rowSize) /* handle wrap condition */
			arm -= raid->rowSize;
		physArm = (u8)arm;
	} else  {
		if (raid->modFactor == 0)
840
			return false;
841 842 843 844 845 846 847 848 849
		physArm = MR_LdDataArmGet(ld,  mega_mod64(stripRow,
							  raid->modFactor),
					  map);
	}

	if (raid->spanDepth == 1) {
		span = 0;
		*pdBlock = row << raid->stripeShift;
	} else {
850 851
		span = (u8)MR_GetSpanBlock(ld, row, pdBlock, map);
		if (span == SPAN_INVALID)
852
			return false;
853 854 855 856 857 858
	}

	/* Get the array on which this span is present */
	arRef       = MR_LdSpanArrayGet(ld, span, map);
	pd          = MR_ArPdGet(arRef, physArm, map); /* Get the pd */

859
	if (pd != MR_PD_INVALID) {
860 861
		/* Get dev handle from Pd. */
		*pDevHandle = MR_PdDevHandleGet(pd, map);
862
		*pPdInterface = MR_PdInterfaceTypeGet(pd, map);
863
		/* get second pd also for raid 1/10 fast path writes*/
864
		if ((instance->adapter_type == VENTURA_SERIES) &&
865 866
		    (raid->level == 1) &&
		    !io_info->isRead) {
867 868 869
			r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map);
			if (r1_alt_pd != MR_PD_INVALID)
				io_info->r1_alt_dev_handle =
870
					MR_PdDevHandleGet(r1_alt_pd, map);
871 872
		}
	} else {
873
		if ((raid->level >= 5) &&
874 875
			((instance->adapter_type == THUNDERBOLT_SERIES)  ||
			((instance->adapter_type == INVADER_SERIES) &&
876
			(raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
877
			pRAID_Context->reg_lock_flags = REGION_TYPE_EXCLUSIVE;
878 879
		else if (raid->level == 1) {
			/* Get alternate Pd. */
880 881
			physArm = physArm + 1;
			pd = MR_ArPdGet(arRef, physArm, map);
882
			if (pd != MR_PD_INVALID) {
883 884
				/* Get dev handle from Pd */
				*pDevHandle = MR_PdDevHandleGet(pd, map);
885 886
				*pPdInterface = MR_PdInterfaceTypeGet(pd, map);
			}
887 888 889
		}
	}

890
	*pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
891
	if (instance->adapter_type == VENTURA_SERIES) {
892
		((struct RAID_CONTEXT_G35 *)pRAID_Context)->span_arm =
893 894 895 896 897 898 899 900
				(span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
		io_info->span_arm =
				(span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
	} else {
		pRAID_Context->span_arm =
			(span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
		io_info->span_arm = pRAID_Context->span_arm;
	}
901
	io_info->pd_after_lb = pd;
902 903 904 905 906 907 908 909 910 911 912 913 914
	return retval;
}

/*
******************************************************************************
*
* MR_BuildRaidContext function
*
* This function will initiate command processing.  The start/end row and strip
* information is calculated then the lock is acquired.
* This function will return 0 if region lock was acquired OR return num strips
*/
u8
915 916
MR_BuildRaidContext(struct megasas_instance *instance,
		    struct IO_REQUEST_INFO *io_info,
917
		    struct RAID_CONTEXT *pRAID_Context,
918
		    struct MR_DRV_RAID_MAP_ALL *map, u8 **raidLUN)
919
{
920
	struct fusion_context *fusion;
921
	struct MR_LD_RAID  *raid;
922
	u32         stripSize, stripe_mask;
923 924 925 926 927 928 929 930 931
	u64         endLba, endStrip, endRow, start_row, start_strip;
	u64         regStart;
	u32         regSize;
	u8          num_strips, numRows;
	u16         ref_in_start_stripe, ref_in_end_stripe;
	u64         ldStartBlock;
	u32         numBlocks, ldTgtId;
	u8          isRead;
	u8	    retval = 0;
932 933
	u8	    startlba_span = SPAN_INVALID;
	u64 *pdBlock = &io_info->pdBlock;
934
	u16	    ld;
935 936 937 938 939

	ldStartBlock = io_info->ldStartBlock;
	numBlocks = io_info->numBlocks;
	ldTgtId = io_info->ldTgtId;
	isRead = io_info->isRead;
940 941
	io_info->IoforUnevenSpan = 0;
	io_info->start_span	= SPAN_INVALID;
942
	fusion = instance->ctrl_context;
943 944 945

	ld = MR_TargetIdToLdGet(ldTgtId, map);
	raid = MR_LdRaidGet(ld, map);
946 947
	/*check read ahead bit*/
	io_info->ra_capable = raid->capability.ra_capable;
948

949 950 951 952 953 954
	/*
	 * if rowDataSize @RAID map and spanRowDataSize @SPAN INFO are zero
	 * return FALSE
	 */
	if (raid->rowDataSize == 0) {
		if (MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize == 0)
955
			return false;
956 957 958 959 960 961 962 963
		else if (instance->UnevenSpanSupport) {
			io_info->IoforUnevenSpan = 1;
		} else {
			dev_info(&instance->pdev->dev,
				"raid->rowDataSize is 0, but has SPAN[0]"
				"rowDataSize = 0x%0x,"
				"but there is _NO_ UnevenSpanSupport\n",
				MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize);
964
			return false;
965 966 967
		}
	}

968 969
	stripSize = 1 << raid->stripeShift;
	stripe_mask = stripSize-1;
970 971


972 973 974 975 976 977 978 979 980
	/*
	 * calculate starting row and stripe, and number of strips and rows
	 */
	start_strip         = ldStartBlock >> raid->stripeShift;
	ref_in_start_stripe = (u16)(ldStartBlock & stripe_mask);
	endLba              = ldStartBlock + numBlocks - 1;
	ref_in_end_stripe   = (u16)(endLba & stripe_mask);
	endStrip            = endLba >> raid->stripeShift;
	num_strips          = (u8)(endStrip - start_strip + 1); /* End strip */
981 982 983 984 985 986 987 988

	if (io_info->IoforUnevenSpan) {
		start_row = get_row_from_strip(instance, ld, start_strip, map);
		endRow	  = get_row_from_strip(instance, ld, endStrip, map);
		if (start_row == -1ULL || endRow == -1ULL) {
			dev_info(&instance->pdev->dev, "return from %s %d."
				"Send IO w/o region lock.\n",
				__func__, __LINE__);
989
			return false;
990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004
		}

		if (raid->spanDepth == 1) {
			startlba_span = 0;
			*pdBlock = start_row << raid->stripeShift;
		} else
			startlba_span = (u8)mr_spanset_get_span_block(instance,
						ld, start_row, pdBlock, map);
		if (startlba_span == SPAN_INVALID) {
			dev_info(&instance->pdev->dev, "return from %s %d"
				"for row 0x%llx,start strip %llx"
				"endSrip %llx\n", __func__, __LINE__,
				(unsigned long long)start_row,
				(unsigned long long)start_strip,
				(unsigned long long)endStrip);
1005
			return false;
1006 1007 1008 1009 1010 1011 1012 1013
		}
		io_info->start_span	= startlba_span;
		io_info->start_row	= start_row;
	} else {
		start_row = mega_div64_32(start_strip, raid->rowDataSize);
		endRow    = mega_div64_32(endStrip, raid->rowDataSize);
	}
	numRows = (u8)(endRow - start_row + 1);
1014 1015 1016 1017 1018 1019 1020 1021 1022 1023

	/*
	 * calculate region info.
	 */

	/* assume region is at the start of the first row */
	regStart            = start_row << raid->stripeShift;
	/* assume this IO needs the full row - we'll adjust if not true */
	regSize             = stripSize;

1024 1025
	io_info->do_fp_rlbypass = raid->capability.fpBypassRegionLock;

1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038
	/* Check if we can send this I/O via FastPath */
	if (raid->capability.fpCapable) {
		if (isRead)
			io_info->fpOkForIo = (raid->capability.fpReadCapable &&
					      ((num_strips == 1) ||
					       raid->capability.
					       fpReadAcrossStripe));
		else
			io_info->fpOkForIo = (raid->capability.fpWriteCapable &&
					      ((num_strips == 1) ||
					       raid->capability.
					       fpWriteAcrossStripe));
	} else
1039
		io_info->fpOkForIo = false;
1040 1041 1042 1043 1044 1045 1046 1047

	if (numRows == 1) {
		/* single-strip IOs can always lock only the data needed */
		if (num_strips == 1) {
			regStart += ref_in_start_stripe;
			regSize = numBlocks;
		}
		/* multi-strip IOs always need to full stripe locked */
1048 1049 1050 1051 1052
	} else if (io_info->IoforUnevenSpan == 0) {
		/*
		 * For Even span region lock optimization.
		 * If the start strip is the last in the start row
		 */
1053 1054 1055 1056
		if (start_strip == (start_row + 1) * raid->rowDataSize - 1) {
			regStart += ref_in_start_stripe;
			/* initialize count to sectors from startref to end
			   of strip */
1057
			regSize = stripSize - ref_in_start_stripe;
1058 1059
		}

1060
		/* add complete rows in the middle of the transfer */
1061 1062 1063
		if (numRows > 2)
			regSize += (numRows-2) << raid->stripeShift;

1064
		/* if IO ends within first strip of last row*/
1065 1066 1067 1068
		if (endStrip == endRow*raid->rowDataSize)
			regSize += ref_in_end_stripe+1;
		else
			regSize += stripSize;
1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092
	} else {
		/*
		 * For Uneven span region lock optimization.
		 * If the start strip is the last in the start row
		 */
		if (start_strip == (get_strip_from_row(instance, ld, start_row, map) +
				SPAN_ROW_DATA_SIZE(map, ld, startlba_span) - 1)) {
			regStart += ref_in_start_stripe;
			/* initialize count to sectors from
			 * startRef to end of strip
			 */
			regSize = stripSize - ref_in_start_stripe;
		}
		/* Add complete rows in the middle of the transfer*/

		if (numRows > 2)
			/* Add complete rows in the middle of the transfer*/
			regSize += (numRows-2) << raid->stripeShift;

		/* if IO ends within first strip of last row */
		if (endStrip == get_strip_from_row(instance, ld, endRow, map))
			regSize += ref_in_end_stripe + 1;
		else
			regSize += stripSize;
1093 1094
	}

1095
	pRAID_Context->timeout_value =
1096 1097 1098
		cpu_to_le16(raid->fpIoTimeoutForLd ?
			    raid->fpIoTimeoutForLd :
			    map->raidMap.fpPdIoTimeoutSec);
1099
	if (instance->adapter_type == INVADER_SERIES)
1100
		pRAID_Context->reg_lock_flags = (isRead) ?
1101
			raid->regTypeReqOnRead : raid->regTypeReqOnWrite;
1102
	else if (instance->adapter_type == THUNDERBOLT_SERIES)
1103
		pRAID_Context->reg_lock_flags = (isRead) ?
1104
			REGION_TYPE_SHARED_READ : raid->regTypeReqOnWrite;
1105 1106 1107 1108
	pRAID_Context->virtual_disk_tgt_id = raid->targetId;
	pRAID_Context->reg_lock_row_lba    = cpu_to_le64(regStart);
	pRAID_Context->reg_lock_length    = cpu_to_le32(regSize);
	pRAID_Context->config_seq_num	= raid->seqNum;
1109 1110 1111
	/* save pointer to raid->LUN array */
	*raidLUN = raid->LUN;

1112 1113 1114 1115

	/*Get Phy Params only if FP capable, or else leave it to MR firmware
	  to do the calculation.*/
	if (io_info->fpOkForIo) {
1116 1117 1118 1119 1120 1121 1122 1123
		retval = io_info->IoforUnevenSpan ?
				mr_spanset_get_phy_params(instance, ld,
					start_strip, ref_in_start_stripe,
					io_info, pRAID_Context, map) :
				MR_GetPhyParams(instance, ld, start_strip,
					ref_in_start_stripe, io_info,
					pRAID_Context, map);
		/* If IO on an invalid Pd, then FP is not possible.*/
1124
		if (io_info->devHandle == MR_DEVHANDLE_INVALID)
1125
			io_info->fpOkForIo = false;
1126 1127 1128 1129
		return retval;
	} else if (isRead) {
		uint stripIdx;
		for (stripIdx = 0; stripIdx < num_strips; stripIdx++) {
1130 1131 1132 1133 1134 1135 1136 1137 1138
			retval = io_info->IoforUnevenSpan ?
				mr_spanset_get_phy_params(instance, ld,
				    start_strip + stripIdx,
				    ref_in_start_stripe, io_info,
				    pRAID_Context, map) :
				MR_GetPhyParams(instance, ld,
				    start_strip + stripIdx, ref_in_start_stripe,
				    io_info, pRAID_Context, map);
			if (!retval)
1139
				return true;
1140 1141
		}
	}
1142
	return true;
1143 1144
}

1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155
/*
******************************************************************************
*
* This routine pepare spanset info from Valid Raid map and store it into
* local copy of ldSpanInfo per instance data structure.
*
* Inputs :
* map    - LD map
* ldSpanInfo - ldSpanInfo per HBA instance
*
*/
1156
void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
1157
	PLD_SPAN_INFO ldSpanInfo)
1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168
{
	u8   span, count;
	u32  element, span_row_width;
	u64  span_row;
	struct MR_LD_RAID *raid;
	LD_SPAN_SET *span_set, *span_set_prev;
	struct MR_QUAD_ELEMENT    *quad;
	int ldCount;
	u16 ld;


1169
	for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
1170
		ld = MR_TargetIdToLdGet(ldCount, map);
1171
		if (ld >= (MAX_LOGICAL_DRIVES_EXT - 1))
1172 1173 1174 1175
			continue;
		raid = MR_LdRaidGet(ld, map);
		for (element = 0; element < MAX_QUAD_DEPTH; element++) {
			for (span = 0; span < raid->spanDepth; span++) {
1176 1177
				if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
					block_span_info.noElements) <
1178 1179 1180 1181 1182 1183 1184
					element + 1)
					continue;
				span_set = &(ldSpanInfo[ld].span_set[element]);
				quad = &map->raidMap.ldSpanMap[ld].
					spanBlock[span].block_span_info.
					quad[element];

1185
				span_set->diff = le32_to_cpu(quad->diff);
1186 1187 1188

				for (count = 0, span_row_width = 0;
					count < raid->spanDepth; count++) {
1189
					if (le32_to_cpu(map->raidMap.ldSpanMap[ld].
1190 1191
						spanBlock[count].
						block_span_info.
1192
						noElements) >= element + 1) {
1193 1194 1195 1196 1197 1198 1199 1200 1201
						span_set->strip_offset[count] =
							span_row_width;
						span_row_width +=
							MR_LdSpanPtrGet
							(ld, count, map)->spanRowDataSize;
					}
				}

				span_set->span_row_data_width = span_row_width;
1202 1203 1204
				span_row = mega_div64_32(((le64_to_cpu(quad->logEnd) -
					le64_to_cpu(quad->logStart)) + le32_to_cpu(quad->diff)),
					le32_to_cpu(quad->diff));
1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220

				if (element == 0) {
					span_set->log_start_lba = 0;
					span_set->log_end_lba =
						((span_row << raid->stripeShift)
						* span_row_width) - 1;

					span_set->span_row_start = 0;
					span_set->span_row_end = span_row - 1;

					span_set->data_strip_start = 0;
					span_set->data_strip_end =
						(span_row * span_row_width) - 1;

					span_set->data_row_start = 0;
					span_set->data_row_end =
1221
						(span_row * le32_to_cpu(quad->diff)) - 1;
1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246
				} else {
					span_set_prev = &(ldSpanInfo[ld].
							span_set[element - 1]);
					span_set->log_start_lba =
						span_set_prev->log_end_lba + 1;
					span_set->log_end_lba =
						span_set->log_start_lba +
						((span_row << raid->stripeShift)
						* span_row_width) - 1;

					span_set->span_row_start =
						span_set_prev->span_row_end + 1;
					span_set->span_row_end =
					span_set->span_row_start + span_row - 1;

					span_set->data_strip_start =
					span_set_prev->data_strip_end + 1;
					span_set->data_strip_end =
						span_set->data_strip_start +
						(span_row * span_row_width) - 1;

					span_set->data_row_start =
						span_set_prev->data_row_end + 1;
					span_set->data_row_end =
						span_set->data_row_start +
1247
						(span_row * le32_to_cpu(quad->diff)) - 1;
1248 1249 1250 1251 1252 1253 1254 1255 1256
				}
				break;
		}
		if (span == raid->spanDepth)
			break;
	    }
	}
}

1257 1258
void mr_update_load_balance_params(struct MR_DRV_RAID_MAP_ALL *drv_map,
	struct LD_LOAD_BALANCE_INFO *lbInfo)
1259 1260 1261 1262 1263
{
	int ldCount;
	u16 ld;
	struct MR_LD_RAID *raid;

1264 1265 1266
	if (lb_pending_cmds > 128 || lb_pending_cmds < 1)
		lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;

1267
	for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
1268
		ld = MR_TargetIdToLdGet(ldCount, drv_map);
1269
		if (ld >= MAX_LOGICAL_DRIVES_EXT) {
1270 1271 1272 1273
			lbInfo[ldCount].loadBalanceFlag = 0;
			continue;
		}

1274 1275 1276
		raid = MR_LdRaidGet(ld, drv_map);
		if ((raid->level != 1) ||
			(raid->ldState != MR_LD_STATE_OPTIMAL)) {
1277
			lbInfo[ldCount].loadBalanceFlag = 0;
1278 1279 1280
			continue;
		}
		lbInfo[ldCount].loadBalanceFlag = 1;
1281 1282 1283
	}
}

1284
u8 megasas_get_best_arm_pd(struct megasas_instance *instance,
1285 1286 1287
			   struct LD_LOAD_BALANCE_INFO *lbInfo,
			   struct IO_REQUEST_INFO *io_info,
			   struct MR_DRV_RAID_MAP_ALL *drv_map)
1288
{
1289
	struct MR_LD_RAID  *raid;
1290
	u16	pd1_dev_handle;
1291
	u16     pend0, pend1, ld;
1292
	u64     diff0, diff1;
1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311
	u8      bestArm, pd0, pd1, span, arm;
	u32     arRef, span_row_size;

	u64 block = io_info->ldStartBlock;
	u32 count = io_info->numBlocks;

	span = ((io_info->span_arm & RAID_CTX_SPANARM_SPAN_MASK)
			>> RAID_CTX_SPANARM_SPAN_SHIFT);
	arm = (io_info->span_arm & RAID_CTX_SPANARM_ARM_MASK);

	ld = MR_TargetIdToLdGet(io_info->ldTgtId, drv_map);
	raid = MR_LdRaidGet(ld, drv_map);
	span_row_size = instance->UnevenSpanSupport ?
			SPAN_ROW_SIZE(drv_map, ld, span) : raid->rowSize;

	arRef = MR_LdSpanArrayGet(ld, span, drv_map);
	pd0 = MR_ArPdGet(arRef, arm, drv_map);
	pd1 = MR_ArPdGet(arRef, (arm + 1) >= span_row_size ?
		(arm + 1 - span_row_size) : arm + 1, drv_map);
1312

1313 1314 1315 1316
	/* Get PD1 Dev Handle */

	pd1_dev_handle = MR_PdDevHandleGet(pd1, drv_map);

1317
	if (pd1_dev_handle == MR_DEVHANDLE_INVALID) {
1318 1319 1320 1321 1322
		bestArm = arm;
	} else {
		/* get the pending cmds for the data and mirror arms */
		pend0 = atomic_read(&lbInfo->scsi_pending_cmds[pd0]);
		pend1 = atomic_read(&lbInfo->scsi_pending_cmds[pd1]);
1323

1324 1325 1326 1327
		/* Determine the disk whose head is nearer to the req. block */
		diff0 = ABS_DIFF(block, lbInfo->last_accessed_block[pd0]);
		diff1 = ABS_DIFF(block, lbInfo->last_accessed_block[pd1]);
		bestArm = (diff0 <= diff1 ? arm : arm ^ 1);
1328

1329 1330 1331 1332
		/* Make balance count from 16 to 4 to
		 *  keep driver in sync with Firmware
		 */
		if ((bestArm == arm && pend0 > pend1 + lb_pending_cmds)  ||
1333
		    (bestArm != arm && pend1 > pend0 + lb_pending_cmds))
1334 1335 1336 1337 1338 1339 1340
			bestArm ^= 1;

		/* Update the last accessed block on the correct pd */
		io_info->span_arm =
			(span << RAID_CTX_SPANARM_SPAN_SHIFT) | bestArm;
		io_info->pd_after_lb = (bestArm == arm) ? pd0 : pd1;
	}
1341

1342 1343
	lbInfo->last_accessed_block[io_info->pd_after_lb] = block + count - 1;
	return io_info->pd_after_lb;
1344 1345
}

1346
__le16 get_updated_dev_handle(struct megasas_instance *instance,
1347 1348 1349
			      struct LD_LOAD_BALANCE_INFO *lbInfo,
			      struct IO_REQUEST_INFO *io_info,
			      struct MR_DRV_RAID_MAP_ALL *drv_map)
1350
{
1351
	u8 arm_pd;
1352
	__le16 devHandle;
1353

1354
	/* get best new arm (PD ID) */
1355
	arm_pd  = megasas_get_best_arm_pd(instance, lbInfo, io_info, drv_map);
1356
	devHandle = MR_PdDevHandleGet(arm_pd, drv_map);
1357
	io_info->pd_interface = MR_PdInterfaceTypeGet(arm_pd, drv_map);
1358
	atomic_inc(&lbInfo->scsi_pending_cmds[arm_pd]);
1359

1360 1361
	return devHandle;
}