Kconfig.cpu 12.9 KB
Newer Older
1 2 3 4 5
# Put here option for CPU selection and depending optimization
if !X86_ELAN

choice
	prompt "Processor family"
6 7
	default M686 if X86_32
	default GENERIC_CPU if X86_64
8 9 10

config M386
	bool "386"
11
	depends on X86_32 && !UML
12 13 14 15 16 17 18 19 20 21 22 23
	---help---
	  This is the processor type of your CPU. This information is used for
	  optimizing purposes. In order to compile a kernel that can run on
	  all x86 CPU types (albeit not optimally fast), you can specify
	  "386" here.

	  The kernel will not necessarily run on earlier architectures than
	  the one you have chosen, e.g. a Pentium optimized kernel will run on
	  a PPro, but not necessarily on a i486.

	  Here are the settings recommended for greatest speed:
	  - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
D
Dmitri Vorobiev 已提交
24 25
	  486DLC/DLC2, and UMC 486SX-S.  Only "386" kernels will run on a 386
	  class machine.
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
	  - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
	  SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
	  - "586" for generic Pentium CPUs lacking the TSC
	  (time stamp counter) register.
	  - "Pentium-Classic" for the Intel Pentium.
	  - "Pentium-MMX" for the Intel Pentium MMX.
	  - "Pentium-Pro" for the Intel Pentium Pro.
	  - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
	  - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
	  - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
	  - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
	  - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
	  - "Crusoe" for the Transmeta Crusoe series.
	  - "Efficeon" for the Transmeta Efficeon series.
	  - "Winchip-C6" for original IDT Winchip.
	  - "Winchip-2" for IDT Winchip 2.
	  - "Winchip-2A" for IDT Winchips with 3dNow! capabilities.
	  - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
44
	  - "Geode GX/LX" For AMD Geode GX and LX processors.
45
	  - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
E
Egry Gabor 已提交
46
	  - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
47
	  - "VIA C7" for VIA C7.
48 49 50 51 52

	  If you don't know what to do, choose "386".

config M486
	bool "486"
53
	depends on X86_32
54 55 56 57 58 59 60 61
	help
	  Select this for a 486 series processor, either Intel or one of the
	  compatible processors from AMD, Cyrix, IBM, or Intel.  Includes DX,
	  DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
	  U5S.

config M586
	bool "586/K5/5x86/6x86/6x86MX"
62
	depends on X86_32
63 64 65 66 67 68 69
	help
	  Select this for an 586 or 686 series processor such as the AMD K5,
	  the Cyrix 5x86, 6x86 and 6x86MX.  This choice does not
	  assume the RDTSC (Read Time Stamp Counter) instruction.

config M586TSC
	bool "Pentium-Classic"
70
	depends on X86_32
71 72 73 74 75 76
	help
	  Select this for a Pentium Classic processor with the RDTSC (Read
	  Time Stamp Counter) instruction for benchmarking.

config M586MMX
	bool "Pentium-MMX"
77
	depends on X86_32
78 79 80 81 82 83
	help
	  Select this for a Pentium with the MMX graphics/multimedia
	  extended instructions.

config M686
	bool "Pentium-Pro"
84
	depends on X86_32
85 86 87 88 89 90 91
	help
	  Select this for Intel Pentium Pro chips.  This enables the use of
	  Pentium Pro extended instructions, and disables the init-time guard
	  against the f00f bug found in earlier Pentiums.

config MPENTIUMII
	bool "Pentium-II/Celeron(pre-Coppermine)"
92
	depends on X86_32
93 94 95 96 97 98 99 100 101
	help
	  Select this for Intel chips based on the Pentium-II and
	  pre-Coppermine Celeron core.  This option enables an unaligned
	  copy optimization, compiles the kernel with optimization flags
	  tailored for the chip, and applies any applicable Pentium Pro
	  optimizations.

config MPENTIUMIII
	bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
102
	depends on X86_32
103 104 105 106 107 108 109 110
	help
	  Select this for Intel chips based on the Pentium-III and
	  Celeron-Coppermine core.  This option enables use of some
	  extended prefetch instructions in addition to the Pentium II
	  extensions.

config MPENTIUMM
	bool "Pentium M"
111
	depends on X86_32
112 113 114 115 116
	help
	  Select this for Intel Pentium M (not Pentium-4 M)
	  notebook chips.

config MPENTIUM4
117
	bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
118
	depends on X86_32
119 120
	help
	  Select this for Intel Pentium 4 chips.  This includes the
121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150
	  Pentium 4, Pentium D, P4-based Celeron and Xeon, and
	  Pentium-4 M (not Pentium M) chips.  This option enables compile
	  flags optimized for the chip, uses the correct cache line size, and
	  applies any applicable optimizations.

	  CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )

	  Select this for:
	    Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
		-Willamette
		-Northwood
		-Mobile Pentium 4
		-Mobile Pentium 4 M
		-Extreme Edition (Gallatin)
		-Prescott
		-Prescott 2M
		-Cedar Mill
		-Presler
		-Smithfiled
	    Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
		-Foster
		-Prestonia
		-Gallatin
		-Nocona
		-Irwindale
		-Cranford
		-Potomac
		-Paxville
		-Dempsey

151 152 153

config MK6
	bool "K6/K6-II/K6-III"
154
	depends on X86_32
155 156 157 158 159 160 161
	help
	  Select this for an AMD K6-family processor.  Enables use of
	  some extended instructions, and passes appropriate optimization
	  flags to GCC.

config MK7
	bool "Athlon/Duron/K7"
162
	depends on X86_32
163 164 165 166 167 168 169 170 171 172 173 174 175 176
	help
	  Select this for an AMD Athlon K7-family processor.  Enables use of
	  some extended instructions, and passes appropriate optimization
	  flags to GCC.

config MK8
	bool "Opteron/Athlon64/Hammer/K8"
	help
	  Select this for an AMD Opteron or Athlon64 Hammer-family processor.  Enables
	  use of some extended instructions, and passes appropriate optimization
	  flags to GCC.

config MCRUSOE
	bool "Crusoe"
177
	depends on X86_32
178 179 180 181 182 183 184
	help
	  Select this for a Transmeta Crusoe processor.  Treats the processor
	  like a 586 with TSC, and sets some GCC optimization flags (like a
	  Pentium Pro with no alignment requirements).

config MEFFICEON
	bool "Efficeon"
185
	depends on X86_32
186 187 188 189 190
	help
	  Select this for a Transmeta Efficeon processor.

config MWINCHIPC6
	bool "Winchip-C6"
191
	depends on X86_32
192 193 194 195 196 197 198
	help
	  Select this for an IDT Winchip C6 chip.  Linux and GCC
	  treat this chip as a 586TSC with some extended instructions
	  and alignment requirements.

config MWINCHIP2
	bool "Winchip-2"
199
	depends on X86_32
200 201 202 203 204 205 206
	help
	  Select this for an IDT Winchip-2.  Linux and GCC
	  treat this chip as a 586TSC with some extended instructions
	  and alignment requirements.

config MWINCHIP3D
	bool "Winchip-2A/Winchip-3"
207
	depends on X86_32
208 209 210
	help
	  Select this for an IDT Winchip-2A or 3.  Linux and GCC
	  treat this chip as a 586TSC with some extended instructions
211
	  and alignment requirements.  Also enable out of order memory
212 213 214 215 216
	  stores for this CPU, which can increase performance of some
	  operations.

config MGEODEGX1
	bool "GeodeGX1"
217
	depends on X86_32
218 219 220
	help
	  Select this for a Geode GX1 (Cyrix MediaGX) chip.

221
config MGEODE_LX
222
	bool "Geode GX/LX"
223
	depends on X86_32
224 225
	help
	  Select this for AMD Geode GX and LX processors.
226

227 228
config MCYRIXIII
	bool "CyrixIII/VIA-C3"
229
	depends on X86_32
230 231 232 233 234 235 236 237 238 239 240
	help
	  Select this for a Cyrix III or C3 chip.  Presently Linux and GCC
	  treat this chip as a generic 586. Whilst the CPU is 686 class,
	  it lacks the cmov extension which gcc assumes is present when
	  generating 686 code.
	  Note that Nehemiah (Model 9) and above will not boot with this
	  kernel due to them lacking the 3DNow! instructions used in earlier
	  incarnations of the CPU.

config MVIAC3_2
	bool "VIA C3-2 (Nehemiah)"
241
	depends on X86_32
242 243 244 245 246
	help
	  Select this for a VIA C3 "Nehemiah". Selecting this enables usage
	  of SSE and tells gcc to treat the CPU as a 686.
	  Note, this kernel will not boot on older (pre model 9) C3s.

247 248
config MVIAC7
	bool "VIA C7"
249
	depends on X86_32
250 251 252 253
	help
	  Select this for a VIA C7.  Selecting this uses the correct cache
	  shift and tells gcc to treat the CPU as a 686.

254 255 256 257 258 259 260
config MPSC
	bool "Intel P4 / older Netburst based Xeon"
	depends on X86_64
	help
	  Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
	  Xeon CPUs with Intel 64bit which is compatible with x86-64.
	  Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
261
	  Netburst core and shouldn't use this option. You can distinguish them
262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278
	  using the cpu family field
	  in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.

config MCORE2
	bool "Core 2/newer Xeon"
	help
	  Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx)
	  CPUs. You can distinguish newer from older Xeons by the CPU family
	  in /proc/cpuinfo. Newer ones have 6 and older ones 15 (not a typo)

config GENERIC_CPU
	bool "Generic-x86-64"
	depends on X86_64
	help
	  Generic x86-64 CPU.
	  Run equally well on all x86-64 CPUs.

279 280 281
endchoice

config X86_GENERIC
282 283 284
	bool "Generic x86 support"
	depends on X86_32
	help
285 286 287 288 289 290 291 292 293 294
	  Instead of just including optimizations for the selected
	  x86 variant (e.g. PII, Crusoe or Athlon), include some more
	  generic optimizations as well. This will make the kernel
	  perform better on x86 CPUs other than that selected.

	  This is really intended for distributors who need more
	  generic optimizations.

endif

I
Ingo Molnar 已提交
295 296 297 298 299
config X86_CPU
	def_bool y
	select GENERIC_FIND_FIRST_BIT
	select GENERIC_FIND_NEXT_BIT

300 301
#
# Define implied options from the CPU selection here
302 303 304 305 306 307 308 309 310 311 312 313
config X86_L1_CACHE_BYTES
	int
	default "128" if GENERIC_CPU || MPSC
	default "64" if MK8 || MCORE2
	depends on X86_64

config X86_INTERNODE_CACHE_BYTES
	int
	default "4096" if X86_VSMP
	default X86_L1_CACHE_BYTES if !X86_VSMP
	depends on X86_64

314
config X86_CMPXCHG
315
	def_bool X86_64 || (X86_32 && !M386)
316 317 318

config X86_L1_CACHE_SHIFT
	int
319
	default "7" if MPENTIUM4 || X86_GENERIC || GENERIC_CPU || MPSC
320 321
	default "4" if X86_ELAN || M486 || M386 || MGEODEGX1
	default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
322
	default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MVIAC7
323

324
config X86_XADD
325
	def_bool y
326
	depends on X86_32 && !M386
327 328

config X86_PPRO_FENCE
329
	bool "PentiumPro memory ordering errata workaround"
330
	depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
331 332 333 334 335 336 337 338 339
	help
	  Old PentiumPro multiprocessor systems had errata that could cause memory
	  operations to violate the x86 ordering standard in rare cases. Enabling this
	  option will attempt to work around some (but not all) occurances of
	  this problem, at the cost of much heavier spinlock and memory barrier
	  operations.

	  If unsure, say n here. Even distro kernels should think twice before enabling
	  this: there are few systems, and an unlikely bug.
340 341

config X86_F00F_BUG
342
	def_bool y
343 344 345
	depends on M586MMX || M586TSC || M586 || M486 || M386

config X86_WP_WORKS_OK
346
	def_bool y
347
	depends on X86_32 && !M386
348 349

config X86_INVLPG
350
	def_bool y
351
	depends on X86_32 && !M386
352 353

config X86_BSWAP
354
	def_bool y
355
	depends on X86_32 && !M386
356 357

config X86_POPAD_OK
358
	def_bool y
359
	depends on X86_32 && !M386
360 361

config X86_ALIGNMENT_16
362
	def_bool y
363 364 365
	depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || X86_ELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1

config X86_GOOD_APIC
366
	def_bool y
367
	depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON || MCORE2 || MVIAC7 || X86_64
368 369

config X86_INTEL_USERCOPY
370
	def_bool y
371
	depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
372 373

config X86_USE_PPRO_CHECKSUM
374
	def_bool y
375
	depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX || MCORE2
376 377

config X86_USE_3DNOW
378
	def_bool y
379
	depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
380 381

config X86_OOSTORE
382
	def_bool y
383 384
	depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR

385 386 387 388 389 390 391 392 393
#
# P6_NOPs are a relatively minor optimization that require a family >=
# 6 processor, except that it is broken on certain VIA chips.
# Furthermore, AMD chips prefer a totally different sequence of NOPs
# (which work on all CPUs).  As a result, disallow these if we're
# compiling X86_GENERIC but not X86_64 (these NOPs do work on all
# x86-64 capable chips); the list of processors in the right-hand clause
# are the cores that benefit from this optimization.
#
394 395
config X86_P6_NOP
	def_bool y
H
Hugh Dickins 已提交
396
	depends on (X86_64 || !X86_GENERIC) && (M686 || MPENTIUMII || MPENTIUMIII || MPENTIUMM || MCORE2 || MPENTIUM4 || MPSC)
397

398
config X86_TSC
399
	def_bool y
400
	depends on ((MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ) || X86_64
401

402 403 404 405
config X86_CMPXCHG64
	def_bool y
	depends on X86_PAE || X86_64

406 407 408
# this should be set for all -march=.. options where the compiler
# generates cmov.
config X86_CMOV
409
	def_bool y
410
	depends on (MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || X86_64)
411

412
config X86_MINIMUM_CPU_FAMILY
413
	int
414
	default "64" if X86_64
415
	default "6" if X86_32 && X86_P6_NOP
416
	default "4" if X86_32 && (X86_XADD || X86_CMPXCHG || X86_BSWAP || X86_WP_WORKS_OK)
417
	default "3"
418

R
Roland McGrath 已提交
419
config X86_DEBUGCTLMSR
420
	def_bool y
R
Roland McGrath 已提交
421
	depends on !(M586MMX || M586TSC || M586 || M486 || M386)