dm9000.c 32.7 KB
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/*
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 *      Davicom DM9000 Fast Ethernet driver for Linux.
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 * 	Copyright (C) 1997  Sten Wang
 *
 * 	This program is free software; you can redistribute it and/or
 * 	modify it under the terms of the GNU General Public License
 * 	as published by the Free Software Foundation; either version 2
 * 	of the License, or (at your option) any later version.
 *
 * 	This program is distributed in the hope that it will be useful,
 * 	but WITHOUT ANY WARRANTY; without even the implied warranty of
 * 	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * 	GNU General Public License for more details.
 *
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 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
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 *
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 * Additional updates, Copyright:
 *	Ben Dooks <ben@simtec.co.uk>
 *	Sascha Hauer <s.hauer@pengutronix.de>
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 */

#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/init.h>
#include <linux/skbuff.h>
#include <linux/spinlock.h>
#include <linux/crc32.h>
#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/dm9000.h>
#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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#include <asm/delay.h>
#include <asm/irq.h>
#include <asm/io.h>

#include "dm9000.h"

/* Board/System/Debug information/definition ---------------- */

#define DM9000_PHY		0x40	/* PHY address 0x01 */

#define CARDNAME "dm9000"
#define PFX CARDNAME ": "
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#define DRV_VERSION	"1.30"
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#ifdef CONFIG_BLACKFIN
#define readsb	insb
#define readsw	insw
#define readsl	insl
#define writesb	outsb
#define writesw	outsw
#define writesl	outsl
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#define DEFAULT_TRIGGER IRQF_TRIGGER_HIGH
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#else
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#define DEFAULT_TRIGGER (0)
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#endif

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/*
 * Transmit timeout, default 5 seconds.
 */
static int watchdog = 5000;
module_param(watchdog, int, 0400);
MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");

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/* DM9000 register address locking.
 *
 * The DM9000 uses an address register to control where data written
 * to the data register goes. This means that the address register
 * must be preserved over interrupts or similar calls.
 *
 * During interrupt and other critical calls, a spinlock is used to
 * protect the system, but the calls themselves save the address
 * in the address register in case they are interrupting another
 * access to the device.
 *
 * For general accesses a lock is provided so that calls which are
 * allowed to sleep are serialised so that the address register does
 * not need to be saved. This lock also serves to serialise access
 * to the EEPROM and PHY access registers which are shared between
 * these two devices.
 */

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/* Structure/enum declaration ------------------------------- */
typedef struct board_info {

	void __iomem *io_addr;	/* Register I/O base address */
	void __iomem *io_data;	/* Data I/O address */
	u16 irq;		/* IRQ */

	u16 tx_pkt_cnt;
	u16 queue_pkt_len;
	u16 queue_start_addr;
	u16 dbug_cnt;
	u8 io_mode;		/* 0:word, 2:byte */
	u8 phy_addr;
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	unsigned int flags;
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	unsigned int in_suspend :1;
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	int debug_level;

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	void (*inblk)(void __iomem *port, void *data, int length);
	void (*outblk)(void __iomem *port, void *data, int length);
	void (*dumpblk)(void __iomem *port, int length);

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	struct device	*dev;	     /* parent device */

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	struct resource	*addr_res;   /* resources found */
	struct resource *data_res;
	struct resource	*addr_req;   /* resources requested */
	struct resource *data_req;
	struct resource *irq_res;

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	struct mutex	 addr_lock;	/* phy and eeprom access lock */

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	struct delayed_work phy_poll;
	struct net_device  *ndev;

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	spinlock_t lock;

	struct mii_if_info mii;
	u32 msg_enable;
} board_info_t;

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/* debug code */

#define dm9000_dbg(db, lev, msg...) do {		\
	if ((lev) < CONFIG_DM9000_DEBUGLEVEL &&		\
	    (lev) < db->debug_level) {			\
		dev_dbg(db->dev, msg);			\
	}						\
} while (0)

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static inline board_info_t *to_dm9000_board(struct net_device *dev)
{
	return dev->priv;
}

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/* function declaration ------------------------------------- */
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static int dm9000_probe(struct platform_device *);
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static int dm9000_open(struct net_device *);
static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
static int dm9000_stop(struct net_device *);
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static int dm9000_ioctl(struct net_device *dev, struct ifreq *req, int cmd);
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static void dm9000_init_dm9000(struct net_device *);

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static irqreturn_t dm9000_interrupt(int, void *);
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static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
			   int value);
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static void dm9000_read_eeprom(board_info_t *, int addr, u8 *to);
static void dm9000_write_eeprom(board_info_t *, int addr, u8 *dp);
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static void dm9000_rx(struct net_device *);
static void dm9000_hash_table(struct net_device *);

/* DM9000 network board routine ---------------------------- */

static void
dm9000_reset(board_info_t * db)
{
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	dev_dbg(db->dev, "resetting device\n");

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	/* RESET device */
	writeb(DM9000_NCR, db->io_addr);
	udelay(200);
	writeb(NCR_RST, db->io_data);
	udelay(200);
}

/*
 *   Read a byte from I/O port
 */
static u8
ior(board_info_t * db, int reg)
{
	writeb(reg, db->io_addr);
	return readb(db->io_data);
}

/*
 *   Write a byte to I/O port
 */

static void
iow(board_info_t * db, int reg, int value)
{
	writeb(reg, db->io_addr);
	writeb(value, db->io_data);
}

/* routines for sending block to chip */

static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
{
	writesb(reg, data, count);
}

static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
{
	writesw(reg, data, (count+1) >> 1);
}

static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
{
	writesl(reg, data, (count+3) >> 2);
}

/* input block from chip to memory */

static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
{
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	readsb(reg, data, count);
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}


static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
{
	readsw(reg, data, (count+1) >> 1);
}

static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
{
	readsl(reg, data, (count+3) >> 2);
}

/* dump block from chip to null */

static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
{
	int i;
	int tmp;

	for (i = 0; i < count; i++)
		tmp = readb(reg);
}

static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
{
	int i;
	int tmp;

	count = (count + 1) >> 1;

	for (i = 0; i < count; i++)
		tmp = readw(reg);
}

static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
{
	int i;
	int tmp;

	count = (count + 3) >> 2;

	for (i = 0; i < count; i++)
		tmp = readl(reg);
}

/* dm9000_set_io
 *
 * select the specified set of io routines to use with the
 * device
 */

static void dm9000_set_io(struct board_info *db, int byte_width)
{
	/* use the size of the data resource to work out what IO
	 * routines we want to use
	 */

	switch (byte_width) {
	case 1:
		db->dumpblk = dm9000_dumpblk_8bit;
		db->outblk  = dm9000_outblk_8bit;
		db->inblk   = dm9000_inblk_8bit;
		break;


	case 3:
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		dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
	case 2:
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		db->dumpblk = dm9000_dumpblk_16bit;
		db->outblk  = dm9000_outblk_16bit;
		db->inblk   = dm9000_inblk_16bit;
		break;

	case 4:
	default:
		db->dumpblk = dm9000_dumpblk_32bit;
		db->outblk  = dm9000_outblk_32bit;
		db->inblk   = dm9000_inblk_32bit;
		break;
	}
}

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static void dm9000_schedule_poll(board_info_t *db)
{
	schedule_delayed_work(&db->phy_poll, HZ * 2);
}
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/* Our watchdog timed out. Called by the networking layer */
static void dm9000_timeout(struct net_device *dev)
{
	board_info_t *db = (board_info_t *) dev->priv;
	u8 reg_save;
	unsigned long flags;

	/* Save previous register address */
	reg_save = readb(db->io_addr);
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	spin_lock_irqsave(&db->lock,flags);
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	netif_stop_queue(dev);
	dm9000_reset(db);
	dm9000_init_dm9000(dev);
	/* We can accept TX packets again */
	dev->trans_start = jiffies;
	netif_wake_queue(dev);

	/* Restore previous register address */
	writeb(reg_save, db->io_addr);
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	spin_unlock_irqrestore(&db->lock,flags);
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}

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#ifdef CONFIG_NET_POLL_CONTROLLER
/*
 *Used by netconsole
 */
static void dm9000_poll_controller(struct net_device *dev)
{
	disable_irq(dev->irq);
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	dm9000_interrupt(dev->irq,dev);
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	enable_irq(dev->irq);
}
#endif
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static int dm9000_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
{
	board_info_t *dm = to_dm9000_board(dev);

	if (!netif_running(dev))
		return -EINVAL;

	return generic_mii_ioctl(&dm->mii, if_mii(req), cmd, NULL);
}

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/* ethtool ops */

static void dm9000_get_drvinfo(struct net_device *dev,
			       struct ethtool_drvinfo *info)
{
	board_info_t *dm = to_dm9000_board(dev);

	strcpy(info->driver, CARDNAME);
	strcpy(info->version, DRV_VERSION);
	strcpy(info->bus_info, to_platform_device(dm->dev)->name);
}

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static u32 dm9000_get_msglevel(struct net_device *dev)
{
	board_info_t *dm = to_dm9000_board(dev);

	return dm->msg_enable;
}

static void dm9000_set_msglevel(struct net_device *dev, u32 value)
{
	board_info_t *dm = to_dm9000_board(dev);

	dm->msg_enable = value;
}

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static int dm9000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
	board_info_t *dm = to_dm9000_board(dev);

	mii_ethtool_gset(&dm->mii, cmd);
	return 0;
}

static int dm9000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
	board_info_t *dm = to_dm9000_board(dev);

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	return mii_ethtool_sset(&dm->mii, cmd);
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}

static int dm9000_nway_reset(struct net_device *dev)
{
	board_info_t *dm = to_dm9000_board(dev);
	return mii_nway_restart(&dm->mii);
}

static u32 dm9000_get_link(struct net_device *dev)
{
	board_info_t *dm = to_dm9000_board(dev);
	return mii_link_ok(&dm->mii);
}

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#define DM_EEPROM_MAGIC		(0x444D394B)

static int dm9000_get_eeprom_len(struct net_device *dev)
{
	return 128;
}

static int dm9000_get_eeprom(struct net_device *dev,
			     struct ethtool_eeprom *ee, u8 *data)
{
	board_info_t *dm = to_dm9000_board(dev);
	int offset = ee->offset;
	int len = ee->len;
	int i;

	/* EEPROM access is aligned to two bytes */

	if ((len & 1) != 0 || (offset & 1) != 0)
		return -EINVAL;

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	if (dm->flags & DM9000_PLATF_NO_EEPROM)
		return -ENOENT;

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	ee->magic = DM_EEPROM_MAGIC;

	for (i = 0; i < len; i += 2)
		dm9000_read_eeprom(dm, (offset + i) / 2, data + i);

	return 0;
}

static int dm9000_set_eeprom(struct net_device *dev,
			     struct ethtool_eeprom *ee, u8 *data)
{
	board_info_t *dm = to_dm9000_board(dev);
	int offset = ee->offset;
	int len = ee->len;
	int i;

	/* EEPROM access is aligned to two bytes */

	if ((len & 1) != 0 || (offset & 1) != 0)
		return -EINVAL;

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	if (dm->flags & DM9000_PLATF_NO_EEPROM)
		return -ENOENT;

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	if (ee->magic != DM_EEPROM_MAGIC)
		return -EINVAL;

	for (i = 0; i < len; i += 2)
		dm9000_write_eeprom(dm, (offset + i) / 2, data + i);

	return 0;
}

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static const struct ethtool_ops dm9000_ethtool_ops = {
	.get_drvinfo		= dm9000_get_drvinfo,
	.get_settings		= dm9000_get_settings,
	.set_settings		= dm9000_set_settings,
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	.get_msglevel		= dm9000_get_msglevel,
	.set_msglevel		= dm9000_set_msglevel,
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	.nway_reset		= dm9000_nway_reset,
	.get_link		= dm9000_get_link,
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 	.get_eeprom_len		= dm9000_get_eeprom_len,
 	.get_eeprom		= dm9000_get_eeprom,
 	.set_eeprom		= dm9000_set_eeprom,
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};

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static void
dm9000_poll_work(struct work_struct *w)
{
	struct delayed_work *dw = container_of(w, struct delayed_work, work);
	board_info_t *db = container_of(dw, board_info_t, phy_poll);

	mii_check_media(&db->mii, netif_msg_link(db), 0);
	
	if (netif_running(db->ndev))
		dm9000_schedule_poll(db);
}
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/* dm9000_release_board
 *
 * release a board, and any mapped resources
 */

static void
dm9000_release_board(struct platform_device *pdev, struct board_info *db)
{
	if (db->data_res == NULL) {
		if (db->addr_res != NULL)
			release_mem_region((unsigned long)db->io_addr, 4);
		return;
	}

	/* unmap our resources */

	iounmap(db->io_addr);
	iounmap(db->io_data);

	/* release the resources */

	if (db->data_req != NULL) {
		release_resource(db->data_req);
		kfree(db->data_req);
	}

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	if (db->addr_req != NULL) {
		release_resource(db->addr_req);
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		kfree(db->addr_req);
	}
}

#define res_size(_r) (((_r)->end - (_r)->start) + 1)

/*
 * Search DM9000 board, allocate space and register it
 */
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static int __devinit
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dm9000_probe(struct platform_device *pdev)
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{
	struct dm9000_plat_data *pdata = pdev->dev.platform_data;
	struct board_info *db;	/* Point a board information structure */
	struct net_device *ndev;
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	const unsigned char *mac_src;
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	unsigned long base;
	int ret = 0;
	int iosize;
	int i;
	u32 id_val;

	/* Init network device */
	ndev = alloc_etherdev(sizeof (struct board_info));
	if (!ndev) {
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		dev_err(&pdev->dev, "could not allocate device.\n");
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		return -ENOMEM;
	}

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	SET_NETDEV_DEV(ndev, &pdev->dev);
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	dev_dbg(&pdev->dev, "dm9000_probe()\n");
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	/* setup board info structure */
	db = (struct board_info *) ndev->priv;
	memset(db, 0, sizeof (*db));

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	db->dev = &pdev->dev;
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	db->ndev = ndev;
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	spin_lock_init(&db->lock);
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	mutex_init(&db->addr_lock);
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	INIT_DELAYED_WORK(&db->phy_poll, dm9000_poll_work);


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	if (pdev->num_resources < 2) {
		ret = -ENODEV;
		goto out;
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	} else if (pdev->num_resources == 2) {
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		base = pdev->resource[0].start;

		if (!request_mem_region(base, 4, ndev->name)) {
			ret = -EBUSY;
			goto out;
		}

		ndev->base_addr = base;
		ndev->irq = pdev->resource[1].start;
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		db->io_addr = (void __iomem *)base;
		db->io_data = (void __iomem *)(base + 4);
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		/* ensure at least we have a default set of IO routines */
		dm9000_set_io(db, 2);

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	} else {
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		db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
		db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
		db->irq_res  = platform_get_resource(pdev, IORESOURCE_IRQ, 0);

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		if (db->addr_res == NULL || db->data_res == NULL ||
		    db->irq_res == NULL) {
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			dev_err(db->dev, "insufficient resources\n");
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			ret = -ENOENT;
			goto out;
		}

		i = res_size(db->addr_res);
		db->addr_req = request_mem_region(db->addr_res->start, i,
						  pdev->name);

		if (db->addr_req == NULL) {
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			dev_err(db->dev, "cannot claim address reg area\n");
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			ret = -EIO;
			goto out;
		}

		db->io_addr = ioremap(db->addr_res->start, i);

		if (db->io_addr == NULL) {
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			dev_err(db->dev, "failed to ioremap address reg\n");
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			ret = -EINVAL;
			goto out;
		}

		iosize = res_size(db->data_res);
		db->data_req = request_mem_region(db->data_res->start, iosize,
						  pdev->name);

		if (db->data_req == NULL) {
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			dev_err(db->dev, "cannot claim data reg area\n");
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			ret = -EIO;
			goto out;
		}

		db->io_data = ioremap(db->data_res->start, iosize);

		if (db->io_data == NULL) {
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			dev_err(db->dev,"failed to ioremap data reg\n");
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			ret = -EINVAL;
			goto out;
		}

		/* fill in parameters for net-dev structure */

		ndev->base_addr = (unsigned long)db->io_addr;
		ndev->irq	= db->irq_res->start;

		/* ensure at least we have a default set of IO routines */
		dm9000_set_io(db, iosize);
	}

	/* check to see if anything is being over-ridden */
	if (pdata != NULL) {
		/* check to see if the driver wants to over-ride the
		 * default IO width */

		if (pdata->flags & DM9000_PLATF_8BITONLY)
			dm9000_set_io(db, 1);

		if (pdata->flags & DM9000_PLATF_16BITONLY)
			dm9000_set_io(db, 2);

		if (pdata->flags & DM9000_PLATF_32BITONLY)
			dm9000_set_io(db, 4);

		/* check to see if there are any IO routine
		 * over-rides */

		if (pdata->inblk != NULL)
			db->inblk = pdata->inblk;

		if (pdata->outblk != NULL)
			db->outblk = pdata->outblk;

		if (pdata->dumpblk != NULL)
			db->dumpblk = pdata->dumpblk;
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		db->flags = pdata->flags;
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	}

	dm9000_reset(db);

	/* try two times, DM9000 sometimes gets the first read wrong */
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	for (i = 0; i < 8; i++) {
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		id_val  = ior(db, DM9000_VIDL);
		id_val |= (u32)ior(db, DM9000_VIDH) << 8;
		id_val |= (u32)ior(db, DM9000_PIDL) << 16;
		id_val |= (u32)ior(db, DM9000_PIDH) << 24;

		if (id_val == DM9000_ID)
			break;
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		dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
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	}

	if (id_val != DM9000_ID) {
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		dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
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		ret = -ENODEV;
		goto out;
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	}

	/* from this point we assume that we have found a DM9000 */

	/* driver system function */
	ether_setup(ndev);

	ndev->open		 = &dm9000_open;
	ndev->hard_start_xmit    = &dm9000_start_xmit;
	ndev->tx_timeout         = &dm9000_timeout;
	ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
	ndev->stop		 = &dm9000_stop;
	ndev->set_multicast_list = &dm9000_hash_table;
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	ndev->ethtool_ops	 = &dm9000_ethtool_ops;
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	ndev->do_ioctl		 = &dm9000_ioctl;
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#ifdef CONFIG_NET_POLL_CONTROLLER
	ndev->poll_controller	 = &dm9000_poll_controller;
#endif
703 704 705 706 707 708 709 710 711 712

	db->msg_enable       = NETIF_MSG_LINK;
	db->mii.phy_id_mask  = 0x1f;
	db->mii.reg_num_mask = 0x1f;
	db->mii.force_media  = 0;
	db->mii.full_duplex  = 0;
	db->mii.dev	     = ndev;
	db->mii.mdio_read    = dm9000_phy_read;
	db->mii.mdio_write   = dm9000_phy_write;

713 714
	mac_src = "eeprom";

715 716 717
	/* try reading the node address from the attached EEPROM */
	for (i = 0; i < 6; i += 2)
		dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);
718

719 720
	if (!is_valid_ether_addr(ndev->dev_addr)) {
		/* try reading from mac */
721

722
		mac_src = "chip";
723 724 725 726
		for (i = 0; i < 6; i++)
			ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
	}

727
	if (!is_valid_ether_addr(ndev->dev_addr))
728 729
		dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
			 "set using ifconfig\n", ndev->name);
730

731
	platform_set_drvdata(pdev, ndev);
732 733 734
	ret = register_netdev(ndev);

	if (ret == 0) {
735
		DECLARE_MAC_BUF(mac);
736
		printk("%s: dm9000 at %p,%p IRQ %d MAC: %s (%s)\n",
737
		       ndev->name,  db->io_addr, db->io_data, ndev->irq,
738
		       print_mac(mac, ndev->dev_addr), mac_src);
739 740 741
	}
	return 0;

M
Mike Rapoport 已提交
742
out:
743
	dev_err(db->dev, "not found (%d).\n", ret);
744 745

	dm9000_release_board(pdev, db);
746
	free_netdev(ndev);
747 748 749 750 751 752 753 754 755 756 757 758

	return ret;
}

/*
 *  Open the interface.
 *  The interface is opened whenever "ifconfig" actives it.
 */
static int
dm9000_open(struct net_device *dev)
{
	board_info_t *db = (board_info_t *) dev->priv;
759
	unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK;
760

761 762
	if (netif_msg_ifup(db))
		dev_dbg(db->dev, "enabling %s\n", dev->name);
763

764 765 766 767 768 769 770
	/* If there is no IRQ type specified, default to something that
	 * may work, and tell the user that this is a problem */

	if (irqflags == IRQF_TRIGGER_NONE) {
		dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
		irqflags = DEFAULT_TRIGGER;
	}
771

772 773 774
	irqflags |= IRQF_SHARED;

	if (request_irq(dev->irq, &dm9000_interrupt, irqflags, dev->name, dev))
775 776 777 778 779 780 781 782 783 784 785
		return -EAGAIN;

	/* Initialize DM9000 board */
	dm9000_reset(db);
	dm9000_init_dm9000(dev);

	/* Init driver variable */
	db->dbug_cnt = 0;

	mii_check_media(&db->mii, netif_msg_link(db), 1);
	netif_start_queue(dev);
786 787
	
	dm9000_schedule_poll(db);
788 789 790 791 792 793 794 795 796 797 798 799

	return 0;
}

/*
 * Initilize dm9000 board
 */
static void
dm9000_init_dm9000(struct net_device *dev)
{
	board_info_t *db = (board_info_t *) dev->priv;

800
	dm9000_dbg(db, 1, "entering %s\n", __func__);
801 802 803 804 805 806 807 808 809

	/* I/O mode */
	db->io_mode = ior(db, DM9000_ISR) >> 6;	/* ISR bit7:6 keeps I/O mode */

	/* GPIO0 on pre-activate PHY */
	iow(db, DM9000_GPR, 0);	/* REG_1F bit0 activate phyxcer */
	iow(db, DM9000_GPCR, GPCR_GEP_CNTL);	/* Let GPIO0 output */
	iow(db, DM9000_GPR, 0);	/* Enable PHY */

810 811 812
	if (db->flags & DM9000_PLATF_EXT_PHY)
		iow(db, DM9000_NCR, NCR_EXT_PHY);

813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840
	/* Program operating register */
	iow(db, DM9000_TCR, 0);	        /* TX Polling clear */
	iow(db, DM9000_BPTR, 0x3f);	/* Less 3Kb, 200us */
	iow(db, DM9000_FCR, 0xff);	/* Flow Control */
	iow(db, DM9000_SMCR, 0);        /* Special Mode */
	/* clear TX status */
	iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
	iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */

	/* Set address filter table */
	dm9000_hash_table(dev);

	/* Enable TX/RX interrupt mask */
	iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);

	/* Init Driver variable */
	db->tx_pkt_cnt = 0;
	db->queue_pkt_len = 0;
	dev->trans_start = 0;
}

/*
 *  Hardware start transmission.
 *  Send a packet to media from the upper layer.
 */
static int
dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
841
	unsigned long flags;
842 843
	board_info_t *db = (board_info_t *) dev->priv;

844
	dm9000_dbg(db, 3, "%s:\n", __func__);
845 846 847 848

	if (db->tx_pkt_cnt > 1)
		return 1;

849
	spin_lock_irqsave(&db->lock, flags);
850 851 852 853 854

	/* Move data to DM9000 TX RAM */
	writeb(DM9000_MWCMD, db->io_addr);

	(db->outblk)(db->io_data, skb->data, skb->len);
855
	dev->stats.tx_bytes += skb->len;
856

857
	db->tx_pkt_cnt++;
858
	/* TX control: First packet immediately send, second packet queue */
859
	if (db->tx_pkt_cnt == 1) {
860
		/* Set TX length to DM9000 */
861 862
		iow(db, DM9000_TXPLL, skb->len);
		iow(db, DM9000_TXPLH, skb->len >> 8);
863 864 865 866 867 868 869 870

		/* Issue TX polling command */
		iow(db, DM9000_TCR, TCR_TXREQ);	/* Cleared after TX complete */

		dev->trans_start = jiffies;	/* save the time stamp */
	} else {
		/* Second packet */
		db->queue_pkt_len = skb->len;
871
		netif_stop_queue(dev);
872 873
	}

874 875
	spin_unlock_irqrestore(&db->lock, flags);

876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902
	/* free this SKB */
	dev_kfree_skb(skb);

	return 0;
}

static void
dm9000_shutdown(struct net_device *dev)
{
	board_info_t *db = (board_info_t *) dev->priv;

	/* RESET device */
	dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET);	/* PHY RESET */
	iow(db, DM9000_GPR, 0x01);	/* Power-Down PHY */
	iow(db, DM9000_IMR, IMR_PAR);	/* Disable all interrupt */
	iow(db, DM9000_RCR, 0x00);	/* Disable RX */
}

/*
 * Stop the interface.
 * The interface is stopped when it is brought.
 */
static int
dm9000_stop(struct net_device *ndev)
{
	board_info_t *db = (board_info_t *) ndev->priv;

903 904
	if (netif_msg_ifdown(db))
		dev_dbg(db->dev, "shutting down %s\n", ndev->name);
905

906 907
	cancel_delayed_work(&db->phy_poll);

908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923
	netif_stop_queue(ndev);
	netif_carrier_off(ndev);

	/* free interrupt */
	free_irq(ndev->irq, ndev);

	dm9000_shutdown(ndev);

	return 0;
}

/*
 * DM9000 interrupt handler
 * receive the packet to upper layer, free the transmitted packet
 */

924
static void
925 926 927 928 929 930 931
dm9000_tx_done(struct net_device *dev, board_info_t * db)
{
	int tx_status = ior(db, DM9000_NSR);	/* Got TX status */

	if (tx_status & (NSR_TX2END | NSR_TX1END)) {
		/* One packet sent complete */
		db->tx_pkt_cnt--;
932
		dev->stats.tx_packets++;
933

934 935 936
		if (netif_msg_tx_done(db))
			dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status);

937 938
		/* Queue packet check & send */
		if (db->tx_pkt_cnt > 0) {
939 940
			iow(db, DM9000_TXPLL, db->queue_pkt_len);
			iow(db, DM9000_TXPLH, db->queue_pkt_len >> 8);
941 942 943 944 945 946 947 948
			iow(db, DM9000_TCR, TCR_TXREQ);
			dev->trans_start = jiffies;
		}
		netif_wake_queue(dev);
	}
}

static irqreturn_t
949
dm9000_interrupt(int irq, void *dev_id)
950 951
{
	struct net_device *dev = dev_id;
952
	board_info_t *db = (board_info_t *) dev->priv;
953 954 955
	int int_status;
	u8 reg_save;

956
	dm9000_dbg(db, 3, "entering %s\n", __func__);
957 958

	/* A real interrupt coming */
959

960 961 962 963 964 965 966 967 968 969 970 971
	spin_lock(&db->lock);

	/* Save previous register address */
	reg_save = readb(db->io_addr);

	/* Disable all interrupts */
	iow(db, DM9000_IMR, IMR_PAR);

	/* Got DM9000 interrupt status */
	int_status = ior(db, DM9000_ISR);	/* Got ISR */
	iow(db, DM9000_ISR, int_status);	/* Clear ISR status */

972 973 974
	if (netif_msg_intr(db))
		dev_dbg(db->dev, "interrupt status %02x\n", int_status);

975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994
	/* Received the coming packet */
	if (int_status & ISR_PRS)
		dm9000_rx(dev);

	/* Trnasmit Interrupt check */
	if (int_status & ISR_PTS)
		dm9000_tx_done(dev, db);

	/* Re-enable interrupt mask */
	iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);

	/* Restore previous register address */
	writeb(reg_save, db->io_addr);

	spin_unlock(&db->lock);

	return IRQ_HANDLED;
}

struct dm9000_rxhdr {
995 996
	u8	RxPktReady;
	u8	RxStatus;
A
Al Viro 已提交
997
	__le16	RxLen;
998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009
} __attribute__((__packed__));

/*
 *  Received a packet and pass to upper layer
 */
static void
dm9000_rx(struct net_device *dev)
{
	board_info_t *db = (board_info_t *) dev->priv;
	struct dm9000_rxhdr rxhdr;
	struct sk_buff *skb;
	u8 rxbyte, *rdptr;
1010
	bool GoodPacket;
1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021
	int RxLen;

	/* Check packet ready or not */
	do {
		ior(db, DM9000_MRCMDX);	/* Dummy read */

		/* Get most updated data */
		rxbyte = readb(db->io_data);

		/* Status check: this byte must be 0 or 1 */
		if (rxbyte > DM9000_PKT_RDY) {
1022
			dev_warn(db->dev, "status check fail: %d\n", rxbyte);
1023 1024 1025 1026 1027 1028 1029 1030 1031
			iow(db, DM9000_RCR, 0x00);	/* Stop Device */
			iow(db, DM9000_ISR, IMR_PAR);	/* Stop INT request */
			return;
		}

		if (rxbyte != DM9000_PKT_RDY)
			return;

		/* A packet ready now  & Get status/length */
1032
		GoodPacket = true;
1033 1034 1035 1036
		writeb(DM9000_MRCMD, db->io_addr);

		(db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));

1037
		RxLen = le16_to_cpu(rxhdr.RxLen);
1038

1039 1040 1041 1042
		if (netif_msg_rx_status(db))
			dev_dbg(db->dev, "RX: status %02x, length %04x\n",
				rxhdr.RxStatus, RxLen);

1043 1044
		/* Packet Status check */
		if (RxLen < 0x40) {
1045
			GoodPacket = false;
1046 1047
			if (netif_msg_rx_err(db))
				dev_dbg(db->dev, "RX: Bad Packet (runt)\n");
1048 1049 1050
		}

		if (RxLen > DM9000_PKT_MAX) {
1051
			dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
1052 1053
		}

1054
		if (rxhdr.RxStatus & 0xbf) {
1055
			GoodPacket = false;
1056
			if (rxhdr.RxStatus & 0x01) {
1057 1058
				if (netif_msg_rx_err(db))
					dev_dbg(db->dev, "fifo error\n");
1059
				dev->stats.rx_fifo_errors++;
1060
			}
1061
			if (rxhdr.RxStatus & 0x02) {
1062 1063
				if (netif_msg_rx_err(db))
					dev_dbg(db->dev, "crc error\n");
1064
				dev->stats.rx_crc_errors++;
1065
			}
1066
			if (rxhdr.RxStatus & 0x80) {
1067 1068
				if (netif_msg_rx_err(db))
					dev_dbg(db->dev, "length error\n");
1069
				dev->stats.rx_length_errors++;
1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081
			}
		}

		/* Move data from DM9000 */
		if (GoodPacket
		    && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
			skb_reserve(skb, 2);
			rdptr = (u8 *) skb_put(skb, RxLen - 4);

			/* Read received packet from RX SRAM */

			(db->inblk)(db->io_data, rdptr, RxLen);
1082
			dev->stats.rx_bytes += RxLen;
1083 1084 1085 1086

			/* Pass to upper layer */
			skb->protocol = eth_type_trans(skb, dev);
			netif_rx(skb);
1087
			dev->stats.rx_packets++;
1088 1089 1090 1091 1092 1093 1094 1095 1096

		} else {
			/* need to dump the packet's data */

			(db->dumpblk)(db->io_data, RxLen);
		}
	} while (rxbyte == DM9000_PKT_RDY);
}

1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117
static unsigned int
dm9000_read_locked(board_info_t *db, int reg)
{
	unsigned long flags;
	unsigned int ret;

	spin_lock_irqsave(&db->lock, flags);
	ret = ior(db, reg);
	spin_unlock_irqrestore(&db->lock, flags);

	return ret;
}

static int dm9000_wait_eeprom(board_info_t *db)
{
	unsigned int status;
	int timeout = 8;	/* wait max 8msec */

	/* The DM9000 data sheets say we should be able to
	 * poll the ERRE bit in EPCR to wait for the EEPROM
	 * operation. From testing several chips, this bit
1118
	 * does not seem to work.
1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140
	 *
	 * We attempt to use the bit, but fall back to the
	 * timeout (which is why we do not return an error
	 * on expiry) to say that the EEPROM operation has
	 * completed.
	 */

	while (1) {
		status = dm9000_read_locked(db, DM9000_EPCR);

		if ((status & EPCR_ERRE) == 0)
			break;

		if (timeout-- < 0) {
			dev_dbg(db->dev, "timeout waiting EEPROM\n");
			break;
		}
	}

	return 0;
}

1141
/*
1142
 *  Read a word data from EEPROM
1143
 */
1144
static void
1145
dm9000_read_eeprom(board_info_t *db, int offset, u8 *to)
1146
{
1147 1148
	unsigned long flags;

1149 1150 1151 1152 1153 1154
	if (db->flags & DM9000_PLATF_NO_EEPROM) {
		to[0] = 0xff;
		to[1] = 0xff;
		return;
	}

1155 1156
	mutex_lock(&db->addr_lock);

1157 1158
	spin_lock_irqsave(&db->lock, flags);

1159 1160
	iow(db, DM9000_EPAR, offset);
	iow(db, DM9000_EPCR, EPCR_ERPRR);
1161 1162 1163

	spin_unlock_irqrestore(&db->lock, flags);

1164 1165 1166 1167
	dm9000_wait_eeprom(db);

	/* delay for at-least 150uS */
	msleep(1);
1168 1169 1170

	spin_lock_irqsave(&db->lock, flags);

1171
	iow(db, DM9000_EPCR, 0x0);
1172 1173 1174

	to[0] = ior(db, DM9000_EPDRL);
	to[1] = ior(db, DM9000_EPDRH);
1175

1176 1177
	spin_unlock_irqrestore(&db->lock, flags);

1178
	mutex_unlock(&db->addr_lock);
1179 1180 1181 1182 1183 1184
}

/*
 * Write a word data to SROM
 */
static void
1185
dm9000_write_eeprom(board_info_t *db, int offset, u8 *data)
1186
{
1187 1188
	unsigned long flags;

1189 1190 1191
	if (db->flags & DM9000_PLATF_NO_EEPROM)
		return;

1192 1193
	mutex_lock(&db->addr_lock);

1194
	spin_lock_irqsave(&db->lock, flags);
1195
	iow(db, DM9000_EPAR, offset);
1196 1197
	iow(db, DM9000_EPDRH, data[1]);
	iow(db, DM9000_EPDRL, data[0]);
1198
	iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
1199 1200
	spin_unlock_irqrestore(&db->lock, flags);

1201 1202 1203
	dm9000_wait_eeprom(db);

	mdelay(1);	/* wait at least 150uS to clear */
1204 1205

	spin_lock_irqsave(&db->lock, flags);
1206
	iow(db, DM9000_EPCR, 0);
1207
	spin_unlock_irqrestore(&db->lock, flags);
1208 1209

	mutex_unlock(&db->addr_lock);
1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220
}

/*
 *  Set DM9000 multicast address
 */
static void
dm9000_hash_table(struct net_device *dev)
{
	board_info_t *db = (board_info_t *) dev->priv;
	struct dev_mc_list *mcptr = dev->mc_list;
	int mc_cnt = dev->mc_count;
1221
	int i, oft;
1222
	u32 hash_val;
1223
	u16 hash_table[4];
1224
	u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
1225 1226
	unsigned long flags;

1227
	dm9000_dbg(db, 1, "entering %s\n", __func__);
1228

1229
	spin_lock_irqsave(&db->lock, flags);
1230

1231
	for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
1232 1233 1234 1235 1236 1237 1238 1239 1240
		iow(db, oft, dev->dev_addr[i]);

	/* Clear Hash Table */
	for (i = 0; i < 4; i++)
		hash_table[i] = 0x0;

	/* broadcast address */
	hash_table[3] = 0x8000;

1241 1242 1243 1244 1245 1246
	if (dev->flags & IFF_PROMISC)
		rcr |= RCR_PRMSC;

	if (dev->flags & IFF_ALLMULTI)
		rcr |= RCR_ALL;

1247 1248
	/* the multicast address in Hash Table : 64 bits */
	for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
1249
		hash_val = ether_crc_le(6, mcptr->dmi_addr) & 0x3f;
1250 1251 1252 1253
		hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
	}

	/* Write the hash table to MAC MD table */
1254 1255 1256
	for (i = 0, oft = DM9000_MAR; i < 4; i++) {
		iow(db, oft++, hash_table[i]);
		iow(db, oft++, hash_table[i] >> 8);
1257 1258
	}

1259
	iow(db, DM9000_RCR, rcr);
1260
	spin_unlock_irqrestore(&db->lock, flags);
1261 1262 1263
}


1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275
/*
 * Sleep, either by using msleep() or if we are suspending, then
 * use mdelay() to sleep.
 */
static void dm9000_msleep(board_info_t *db, unsigned int ms)
{
	if (db->in_suspend)
		mdelay(ms);
	else
		msleep(ms);
}

1276 1277 1278 1279 1280 1281 1282 1283
/*
 *   Read a word from phyxcer
 */
static int
dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
{
	board_info_t *db = (board_info_t *) dev->priv;
	unsigned long flags;
1284
	unsigned int reg_save;
1285 1286
	int ret;

1287 1288
	mutex_lock(&db->addr_lock);

1289
	spin_lock_irqsave(&db->lock,flags);
1290 1291 1292 1293

	/* Save previous register address */
	reg_save = readb(db->io_addr);

1294 1295 1296 1297
	/* Fill the phyxcer register into REG_0C */
	iow(db, DM9000_EPAR, DM9000_PHY | reg);

	iow(db, DM9000_EPCR, 0xc);	/* Issue phyxcer read command */
1298 1299 1300 1301

	writeb(reg_save, db->io_addr);
	spin_unlock_irqrestore(&db->lock,flags);

1302
	dm9000_msleep(db, 1);		/* Wait read complete */
1303 1304 1305 1306

	spin_lock_irqsave(&db->lock,flags);
	reg_save = readb(db->io_addr);

1307 1308 1309 1310 1311
	iow(db, DM9000_EPCR, 0x0);	/* Clear phyxcer read command */

	/* The read data keeps on REG_0D & REG_0E */
	ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);

1312 1313
	/* restore the previous address */
	writeb(reg_save, db->io_addr);
1314 1315
	spin_unlock_irqrestore(&db->lock,flags);

1316
	mutex_unlock(&db->addr_lock);
1317 1318

	dm9000_dbg(db, 5, "phy_read[%02x] -> %04x\n", reg, ret);
1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329
	return ret;
}

/*
 *   Write a word to phyxcer
 */
static void
dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
{
	board_info_t *db = (board_info_t *) dev->priv;
	unsigned long flags;
1330
	unsigned long reg_save;
1331

1332
	dm9000_dbg(db, 5, "phy_write[%02x] = %04x\n", reg, value);
1333 1334
	mutex_lock(&db->addr_lock);

1335 1336
	spin_lock_irqsave(&db->lock,flags);

1337 1338 1339
	/* Save previous register address */
	reg_save = readb(db->io_addr);

1340 1341 1342 1343
	/* Fill the phyxcer register into REG_0C */
	iow(db, DM9000_EPAR, DM9000_PHY | reg);

	/* Fill the written data into REG_0D & REG_0E */
1344 1345
	iow(db, DM9000_EPDRL, value);
	iow(db, DM9000_EPDRH, value >> 8);
1346 1347

	iow(db, DM9000_EPCR, 0xa);	/* Issue phyxcer write command */
1348 1349

	writeb(reg_save, db->io_addr);
1350
	spin_unlock_irqrestore(&db->lock, flags);
1351

1352
	dm9000_msleep(db, 1);		/* Wait write complete */
1353 1354 1355 1356

	spin_lock_irqsave(&db->lock,flags);
	reg_save = readb(db->io_addr);

1357 1358
	iow(db, DM9000_EPCR, 0x0);	/* Clear phyxcer write command */

1359 1360 1361
	/* restore the previous address */
	writeb(reg_save, db->io_addr);

1362 1363
	spin_unlock_irqrestore(&db->lock, flags);
	mutex_unlock(&db->addr_lock);
1364 1365 1366
}

static int
1367
dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
1368
{
1369
	struct net_device *ndev = platform_get_drvdata(dev);
1370
	board_info_t *db;
1371

1372
	if (ndev) {
1373 1374 1375
		db = (board_info_t *) ndev->priv;
		db->in_suspend = 1;

1376 1377 1378 1379 1380 1381 1382 1383 1384
		if (netif_running(ndev)) {
			netif_device_detach(ndev);
			dm9000_shutdown(ndev);
		}
	}
	return 0;
}

static int
1385
dm9000_drv_resume(struct platform_device *dev)
1386
{
1387
	struct net_device *ndev = platform_get_drvdata(dev);
1388 1389
	board_info_t *db = (board_info_t *) ndev->priv;

1390
	if (ndev) {
1391 1392 1393 1394 1395 1396 1397

		if (netif_running(ndev)) {
			dm9000_reset(db);
			dm9000_init_dm9000(ndev);

			netif_device_attach(ndev);
		}
1398 1399

		db->in_suspend = 0;
1400 1401 1402 1403
	}
	return 0;
}

1404
static int __devexit
1405
dm9000_drv_remove(struct platform_device *pdev)
1406
{
1407
	struct net_device *ndev = platform_get_drvdata(pdev);
1408

1409
	platform_set_drvdata(pdev, NULL);
1410 1411 1412

	unregister_netdev(ndev);
	dm9000_release_board(pdev, (board_info_t *) ndev->priv);
1413
	free_netdev(ndev);		/* free device structure */
1414

1415
	dev_dbg(&pdev->dev, "released and freed device\n");
1416 1417 1418
	return 0;
}

1419
static struct platform_driver dm9000_driver = {
1420 1421 1422 1423
	.driver	= {
		.name    = "dm9000",
		.owner	 = THIS_MODULE,
	},
1424
	.probe   = dm9000_probe,
1425
	.remove  = __devexit_p(dm9000_drv_remove),
1426 1427 1428 1429 1430 1431 1432
	.suspend = dm9000_drv_suspend,
	.resume  = dm9000_drv_resume,
};

static int __init
dm9000_init(void)
{
1433
	printk(KERN_INFO "%s Ethernet Driver, V%s\n", CARDNAME, DRV_VERSION);
1434

1435
	return platform_driver_register(&dm9000_driver);	/* search board and register */
1436 1437 1438 1439 1440
}

static void __exit
dm9000_cleanup(void)
{
1441
	platform_driver_unregister(&dm9000_driver);
1442 1443 1444 1445 1446 1447 1448 1449
}

module_init(dm9000_init);
module_exit(dm9000_cleanup);

MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
MODULE_DESCRIPTION("Davicom DM9000 network driver");
MODULE_LICENSE("GPL");
1450
MODULE_ALIAS("platform:dm9000");