jz4740.dtsi

#include <dt-bindings/clock/jz4740-cgu.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "ingenic,jz4740";

	cpuintc: interrupt-controller {
		#address-cells = <0>;
		#interrupt-cells = <1>;
		interrupt-controller;
		compatible = "mti,cpu-interrupt-controller";
	};

	intc: interrupt-controller@10001000 {
		compatible = "ingenic,jz4740-intc";
		reg = <0x10001000 0x14>;

		interrupt-controller;
		#interrupt-cells = <1>;

		interrupt-parent = <&cpuintc>;
		interrupts = <2>;
	};

	ext: ext {
		compatible = "fixed-clock";
		#clock-cells = <0>;
	};

	rtc: rtc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <32768>;
	};

	cgu: jz4740-cgu@10000000 {
		compatible = "ingenic,jz4740-cgu";
		reg = <0x10000000 0x100>;

		clocks = <&ext>, <&rtc>;
		clock-names = "ext", "rtc";

		#clock-cells = <1>;
	};

	uart0: serial@10030000 {
		compatible = "ingenic,jz4740-uart";
		reg = <0x10030000 0x100>;

		interrupt-parent = <&intc>;
		interrupts = <9>;

		clocks = <&ext>, <&cgu JZ4740_CLK_UART0>;
		clock-names = "baud", "module";
	};

	uart1: serial@10031000 {
		compatible = "ingenic,jz4740-uart";
		reg = <0x10031000 0x100>;

		interrupt-parent = <&intc>;
		interrupts = <8>;

		clocks = <&ext>, <&cgu JZ4740_CLK_UART1>;
		clock-names = "baud", "module";
	};

	uhc: uhc@13030000 {
		compatible = "ingenic,jz4740-ohci", "generic-ohci";
		reg = <0x13030000 0x1000>;

		clocks = <&cgu JZ4740_CLK_UHC>;
		assigned-clocks = <&cgu JZ4740_CLK_UHC>;
		assigned-clock-rates = <48000000>;

		interrupt-parent = <&intc>;
		interrupts = <3>;

		status = "disabled";
	};
};