vgpu.c 15.8 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
/*
 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 *
 * Authors:
 *    Eddie Dong <eddie.dong@intel.com>
 *    Kevin Tian <kevin.tian@intel.com>
 *
 * Contributors:
 *    Ping Gao <ping.a.gao@intel.com>
 *    Zhi Wang <zhi.a.wang@intel.com>
 *    Bing Niu <bing.niu@intel.com>
 *
 */

#include "i915_drv.h"
35 36
#include "gvt.h"
#include "i915_pvinfo.h"
37

38
void populate_pvinfo_page(struct intel_vgpu *vgpu)
39 40 41 42 43 44 45
{
	/* setup the ballooning information */
	vgpu_vreg64(vgpu, vgtif_reg(magic)) = VGT_MAGIC;
	vgpu_vreg(vgpu, vgtif_reg(version_major)) = 1;
	vgpu_vreg(vgpu, vgtif_reg(version_minor)) = 0;
	vgpu_vreg(vgpu, vgtif_reg(display_ready)) = 0;
	vgpu_vreg(vgpu, vgtif_reg(vgt_id)) = vgpu->id;
46

47
	vgpu_vreg(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_48BIT_PPGTT;
48 49
	vgpu_vreg(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HWSP_EMULATION;

50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70
	vgpu_vreg(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) =
		vgpu_aperture_gmadr_base(vgpu);
	vgpu_vreg(vgpu, vgtif_reg(avail_rs.mappable_gmadr.size)) =
		vgpu_aperture_sz(vgpu);
	vgpu_vreg(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.base)) =
		vgpu_hidden_gmadr_base(vgpu);
	vgpu_vreg(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.size)) =
		vgpu_hidden_sz(vgpu);

	vgpu_vreg(vgpu, vgtif_reg(avail_rs.fence_num)) = vgpu_fence_sz(vgpu);

	gvt_dbg_core("Populate PVINFO PAGE for vGPU %d\n", vgpu->id);
	gvt_dbg_core("aperture base [GMADR] 0x%llx size 0x%llx\n",
		vgpu_aperture_gmadr_base(vgpu), vgpu_aperture_sz(vgpu));
	gvt_dbg_core("hidden base [GMADR] 0x%llx size=0x%llx\n",
		vgpu_hidden_gmadr_base(vgpu), vgpu_hidden_sz(vgpu));
	gvt_dbg_core("fence size %d\n", vgpu_fence_sz(vgpu));

	WARN_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
}

71 72 73 74
#define VGPU_MAX_WEIGHT 16
#define VGPU_WEIGHT(vgpu_num)	\
	(VGPU_MAX_WEIGHT / (vgpu_num))

75 76 77 78
static struct {
	unsigned int low_mm;
	unsigned int high_mm;
	unsigned int fence;
79 80 81 82 83 84

	/* A vGPU with a weight of 8 will get twice as much GPU as a vGPU
	 * with a weight of 4 on a contended host, different vGPU type has
	 * different weight set. Legal weights range from 1 to 16.
	 */
	unsigned int weight;
85
	enum intel_vgpu_edid edid;
86 87 88
	char *name;
} vgpu_types[] = {
/* Fixed vGPU type table */
89 90 91 92
	{ MB_TO_BYTES(64), MB_TO_BYTES(384), 4, VGPU_WEIGHT(8), GVT_EDID_1024_768, "8" },
	{ MB_TO_BYTES(128), MB_TO_BYTES(512), 4, VGPU_WEIGHT(4), GVT_EDID_1920_1200, "4" },
	{ MB_TO_BYTES(256), MB_TO_BYTES(1024), 4, VGPU_WEIGHT(2), GVT_EDID_1920_1200, "2" },
	{ MB_TO_BYTES(512), MB_TO_BYTES(2048), 4, VGPU_WEIGHT(1), GVT_EDID_1920_1200, "1" },
93 94
};

95 96 97 98 99 100 101 102 103 104
/**
 * intel_gvt_init_vgpu_types - initialize vGPU type list
 * @gvt : GVT device
 *
 * Initialize vGPU type list based on available resource.
 *
 */
int intel_gvt_init_vgpu_types(struct intel_gvt *gvt)
{
	unsigned int num_types;
105
	unsigned int i, low_avail, high_avail;
106 107 108
	unsigned int min_low;

	/* vGPU type name is defined as GVTg_Vx_y which contains
109 110
	 * physical GPU generation type (e.g V4 as BDW server, V5 as
	 * SKL server).
111 112 113 114 115 116 117 118 119
	 *
	 * Depend on physical SKU resource, might see vGPU types like
	 * GVTg_V4_8, GVTg_V4_4, GVTg_V4_2, etc. We can create
	 * different types of vGPU on same physical GPU depending on
	 * available resource. Each vGPU type will have "avail_instance"
	 * to indicate how many vGPU instance can be created for this
	 * type.
	 *
	 */
120 121
	low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE;
	high_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE;
122
	num_types = sizeof(vgpu_types) / sizeof(vgpu_types[0]);
123 124 125 126 127 128 129 130

	gvt->types = kzalloc(num_types * sizeof(struct intel_vgpu_type),
			     GFP_KERNEL);
	if (!gvt->types)
		return -ENOMEM;

	min_low = MB_TO_BYTES(32);
	for (i = 0; i < num_types; ++i) {
131
		if (low_avail / vgpu_types[i].low_mm == 0)
132
			break;
133 134 135 136

		gvt->types[i].low_gm_size = vgpu_types[i].low_mm;
		gvt->types[i].high_gm_size = vgpu_types[i].high_mm;
		gvt->types[i].fence = vgpu_types[i].fence;
137 138 139 140 141 142

		if (vgpu_types[i].weight < 1 ||
					vgpu_types[i].weight > VGPU_MAX_WEIGHT)
			return -EINVAL;

		gvt->types[i].weight = vgpu_types[i].weight;
143
		gvt->types[i].resolution = vgpu_types[i].edid;
144 145
		gvt->types[i].avail_instance = min(low_avail / vgpu_types[i].low_mm,
						   high_avail / vgpu_types[i].high_mm);
146 147

		if (IS_GEN8(gvt->dev_priv))
148 149
			sprintf(gvt->types[i].name, "GVTg_V4_%s",
						vgpu_types[i].name);
150
		else if (IS_GEN9(gvt->dev_priv))
151 152
			sprintf(gvt->types[i].name, "GVTg_V5_%s",
						vgpu_types[i].name);
153

154
		gvt_dbg_core("type[%d]: %s avail %u low %u high %u fence %u weight %u res %s\n",
155
			     i, gvt->types[i].name,
156 157
			     gvt->types[i].avail_instance,
			     gvt->types[i].low_gm_size,
158
			     gvt->types[i].high_gm_size, gvt->types[i].fence,
159
			     gvt->types[i].weight,
160
			     vgpu_edid_str(gvt->types[i].resolution));
161 162 163 164 165 166 167 168 169 170 171 172 173 174 175
	}

	gvt->num_types = i;
	return 0;
}

void intel_gvt_clean_vgpu_types(struct intel_gvt *gvt)
{
	kfree(gvt->types);
}

static void intel_gvt_update_vgpu_types(struct intel_gvt *gvt)
{
	int i;
	unsigned int low_gm_avail, high_gm_avail, fence_avail;
176
	unsigned int low_gm_min, high_gm_min, fence_min;
177 178 179 180

	/* Need to depend on maxium hw resource size but keep on
	 * static config for now.
	 */
181
	low_gm_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE -
182
		gvt->gm.vgpu_allocated_low_gm_size;
183
	high_gm_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE -
184 185 186 187 188 189 190 191
		gvt->gm.vgpu_allocated_high_gm_size;
	fence_avail = gvt_fence_sz(gvt) - HOST_FENCE -
		gvt->fence.vgpu_allocated_fence_num;

	for (i = 0; i < gvt->num_types; i++) {
		low_gm_min = low_gm_avail / gvt->types[i].low_gm_size;
		high_gm_min = high_gm_avail / gvt->types[i].high_gm_size;
		fence_min = fence_avail / gvt->types[i].fence;
192 193
		gvt->types[i].avail_instance = min(min(low_gm_min, high_gm_min),
						   fence_min);
194

195 196
		gvt_dbg_core("update type[%d]: %s avail %u low %u high %u fence %u\n",
		       i, gvt->types[i].name,
197 198 199 200 201
		       gvt->types[i].avail_instance, gvt->types[i].low_gm_size,
		       gvt->types[i].high_gm_size, gvt->types[i].fence);
	}
}

202
/**
203
 * intel_gvt_active_vgpu - activate a virtual GPU
204 205
 * @vgpu: virtual GPU
 *
206
 * This function is called when user wants to activate a virtual GPU.
207 208
 *
 */
209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224
void intel_gvt_activate_vgpu(struct intel_vgpu *vgpu)
{
	mutex_lock(&vgpu->gvt->lock);
	vgpu->active = true;
	mutex_unlock(&vgpu->gvt->lock);
}

/**
 * intel_gvt_deactive_vgpu - deactivate a virtual GPU
 * @vgpu: virtual GPU
 *
 * This function is called when user wants to deactivate a virtual GPU.
 * All virtual GPU runtime information will be destroyed.
 *
 */
void intel_gvt_deactivate_vgpu(struct intel_vgpu *vgpu)
225 226 227 228 229 230 231
{
	struct intel_gvt *gvt = vgpu->gvt;

	mutex_lock(&gvt->lock);

	vgpu->active = false;

232
	if (atomic_read(&vgpu->submission.running_workload_num)) {
233 234 235 236 237 238
		mutex_unlock(&gvt->lock);
		intel_gvt_wait_vgpu_idle(vgpu);
		mutex_lock(&gvt->lock);
	}

	intel_vgpu_stop_schedule(vgpu);
239
	intel_vgpu_dmabuf_cleanup(vgpu);
240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258

	mutex_unlock(&gvt->lock);
}

/**
 * intel_gvt_destroy_vgpu - destroy a virtual GPU
 * @vgpu: virtual GPU
 *
 * This function is called when user wants to destroy a virtual GPU.
 *
 */
void intel_gvt_destroy_vgpu(struct intel_vgpu *vgpu)
{
	struct intel_gvt *gvt = vgpu->gvt;

	mutex_lock(&gvt->lock);

	WARN(vgpu->active, "vGPU is still active!\n");

259
	intel_gvt_debugfs_remove_vgpu(vgpu);
260
	idr_remove(&gvt->vgpu_idr, vgpu->id);
261
	intel_vgpu_clean_sched_policy(vgpu);
262
	intel_vgpu_clean_submission(vgpu);
263
	intel_vgpu_clean_display(vgpu);
264
	intel_vgpu_clean_opregion(vgpu);
265
	intel_vgpu_clean_gtt(vgpu);
266 267
	intel_gvt_hypervisor_detach_vgpu(vgpu);
	intel_vgpu_free_resource(vgpu);
268
	intel_vgpu_clean_mmio(vgpu);
269
	intel_vgpu_dmabuf_cleanup(vgpu);
270 271
	vfree(vgpu);

272
	intel_gvt_update_vgpu_types(gvt);
273 274 275
	mutex_unlock(&gvt->lock);
}

P
Ping Gao 已提交
276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300
#define IDLE_VGPU_IDR 0

/**
 * intel_gvt_create_idle_vgpu - create an idle virtual GPU
 * @gvt: GVT device
 *
 * This function is called when user wants to create an idle virtual GPU.
 *
 * Returns:
 * pointer to intel_vgpu, error pointer if failed.
 */
struct intel_vgpu *intel_gvt_create_idle_vgpu(struct intel_gvt *gvt)
{
	struct intel_vgpu *vgpu;
	enum intel_engine_id i;
	int ret;

	vgpu = vzalloc(sizeof(*vgpu));
	if (!vgpu)
		return ERR_PTR(-ENOMEM);

	vgpu->id = IDLE_VGPU_IDR;
	vgpu->gvt = gvt;

	for (i = 0; i < I915_NUM_ENGINES; i++)
301
		INIT_LIST_HEAD(&vgpu->submission.workload_q_head[i]);
P
Ping Gao 已提交
302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328

	ret = intel_vgpu_init_sched_policy(vgpu);
	if (ret)
		goto out_free_vgpu;

	vgpu->active = false;

	return vgpu;

out_free_vgpu:
	vfree(vgpu);
	return ERR_PTR(ret);
}

/**
 * intel_gvt_destroy_vgpu - destroy an idle virtual GPU
 * @vgpu: virtual GPU
 *
 * This function is called when user wants to destroy an idle virtual GPU.
 *
 */
void intel_gvt_destroy_idle_vgpu(struct intel_vgpu *vgpu)
{
	intel_vgpu_clean_sched_policy(vgpu);
	vfree(vgpu);
}

329
static struct intel_vgpu *__intel_gvt_create_vgpu(struct intel_gvt *gvt,
330 331 332 333 334 335 336 337 338 339 340 341 342 343 344
		struct intel_vgpu_creation_params *param)
{
	struct intel_vgpu *vgpu;
	int ret;

	gvt_dbg_core("handle %llu low %llu MB high %llu MB fence %llu\n",
			param->handle, param->low_gm_sz, param->high_gm_sz,
			param->fence_sz);

	vgpu = vzalloc(sizeof(*vgpu));
	if (!vgpu)
		return ERR_PTR(-ENOMEM);

	mutex_lock(&gvt->lock);

P
Ping Gao 已提交
345 346
	ret = idr_alloc(&gvt->vgpu_idr, vgpu, IDLE_VGPU_IDR + 1, GVT_MAX_VGPU,
		GFP_KERNEL);
347 348 349 350 351 352
	if (ret < 0)
		goto out_free_vgpu;

	vgpu->id = ret;
	vgpu->handle = param->handle;
	vgpu->gvt = gvt;
353
	vgpu->sched_ctl.weight = param->weight;
354 355
	INIT_LIST_HEAD(&vgpu->dmabuf_obj_list_head);
	idr_init(&vgpu->object_idr);
356
	intel_vgpu_init_cfg_space(vgpu, param->primary);
357

358
	ret = intel_vgpu_init_mmio(vgpu);
359
	if (ret)
360
		goto out_clean_idr;
361 362 363 364 365 366 367 368 369 370 371

	ret = intel_vgpu_alloc_resource(vgpu, param);
	if (ret)
		goto out_clean_vgpu_mmio;

	populate_pvinfo_page(vgpu);

	ret = intel_gvt_hypervisor_attach_vgpu(vgpu);
	if (ret)
		goto out_clean_vgpu_resource;

372 373 374 375
	ret = intel_vgpu_init_gtt(vgpu);
	if (ret)
		goto out_detach_hypervisor_vgpu;

376
	ret = intel_vgpu_init_opregion(vgpu);
377
	if (ret)
378
		goto out_clean_gtt;
379

380 381 382 383
	ret = intel_vgpu_init_display(vgpu, param->resolution);
	if (ret)
		goto out_clean_opregion;

384
	ret = intel_vgpu_setup_submission(vgpu);
Z
Zhi Wang 已提交
385
	if (ret)
386
		goto out_clean_display;
Z
Zhi Wang 已提交
387

388 389
	ret = intel_vgpu_init_sched_policy(vgpu);
	if (ret)
390
		goto out_clean_submission;
391

392 393 394 395
	ret = intel_gvt_debugfs_add_vgpu(vgpu);
	if (ret)
		goto out_clean_sched_policy;

T
Tina Zhang 已提交
396 397 398 399
	ret = intel_gvt_hypervisor_set_opregion(vgpu);
	if (ret)
		goto out_clean_sched_policy;

400 401 402 403
	mutex_unlock(&gvt->lock);

	return vgpu;

404 405
out_clean_sched_policy:
	intel_vgpu_clean_sched_policy(vgpu);
406
out_clean_submission:
407
	intel_vgpu_clean_submission(vgpu);
408 409
out_clean_display:
	intel_vgpu_clean_display(vgpu);
410 411
out_clean_opregion:
	intel_vgpu_clean_opregion(vgpu);
412 413
out_clean_gtt:
	intel_vgpu_clean_gtt(vgpu);
414 415
out_detach_hypervisor_vgpu:
	intel_gvt_hypervisor_detach_vgpu(vgpu);
416 417 418
out_clean_vgpu_resource:
	intel_vgpu_free_resource(vgpu);
out_clean_vgpu_mmio:
419
	intel_vgpu_clean_mmio(vgpu);
420 421
out_clean_idr:
	idr_remove(&gvt->vgpu_idr, vgpu->id);
422 423 424 425 426
out_free_vgpu:
	vfree(vgpu);
	mutex_unlock(&gvt->lock);
	return ERR_PTR(ret);
}
427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444

/**
 * intel_gvt_create_vgpu - create a virtual GPU
 * @gvt: GVT device
 * @type: type of the vGPU to create
 *
 * This function is called when user wants to create a virtual GPU.
 *
 * Returns:
 * pointer to intel_vgpu, error pointer if failed.
 */
struct intel_vgpu *intel_gvt_create_vgpu(struct intel_gvt *gvt,
				struct intel_vgpu_type *type)
{
	struct intel_vgpu_creation_params param;
	struct intel_vgpu *vgpu;

	param.handle = 0;
445
	param.primary = 1;
446 447 448
	param.low_gm_sz = type->low_gm_size;
	param.high_gm_sz = type->high_gm_size;
	param.fence_sz = type->fence;
449
	param.weight = type->weight;
450
	param.resolution = type->resolution;
451 452 453 454 455 456 457 458 459 460 461 462 463 464

	/* XXX current param based on MB */
	param.low_gm_sz = BYTES_TO_MB(param.low_gm_sz);
	param.high_gm_sz = BYTES_TO_MB(param.high_gm_sz);

	vgpu = __intel_gvt_create_vgpu(gvt, &param);
	if (IS_ERR(vgpu))
		return vgpu;

	/* calculate left instance change for types */
	intel_gvt_update_vgpu_types(gvt);

	return vgpu;
}
465 466

/**
467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498
 * intel_gvt_reset_vgpu_locked - reset a virtual GPU by DMLR or GT reset
 * @vgpu: virtual GPU
 * @dmlr: vGPU Device Model Level Reset or GT Reset
 * @engine_mask: engines to reset for GT reset
 *
 * This function is called when user wants to reset a virtual GPU through
 * device model reset or GT reset. The caller should hold the gvt lock.
 *
 * vGPU Device Model Level Reset (DMLR) simulates the PCI level reset to reset
 * the whole vGPU to default state as when it is created. This vGPU function
 * is required both for functionary and security concerns.The ultimate goal
 * of vGPU FLR is that reuse a vGPU instance by virtual machines. When we
 * assign a vGPU to a virtual machine we must isse such reset first.
 *
 * Full GT Reset and Per-Engine GT Reset are soft reset flow for GPU engines
 * (Render, Blitter, Video, Video Enhancement). It is defined by GPU Spec.
 * Unlike the FLR, GT reset only reset particular resource of a vGPU per
 * the reset request. Guest driver can issue a GT reset by programming the
 * virtual GDRST register to reset specific virtual GPU engine or all
 * engines.
 *
 * The parameter dev_level is to identify if we will do DMLR or GT reset.
 * The parameter engine_mask is to specific the engines that need to be
 * resetted. If value ALL_ENGINES is given for engine_mask, it means
 * the caller requests a full GT reset that we will reset all virtual
 * GPU engines. For FLR, engine_mask is ignored.
 */
void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr,
				 unsigned int engine_mask)
{
	struct intel_gvt *gvt = vgpu->gvt;
	struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
499
	unsigned int resetting_eng = dmlr ? ALL_ENGINES : engine_mask;
500 501 502 503

	gvt_dbg_core("------------------------------------------\n");
	gvt_dbg_core("resseting vgpu%d, dmlr %d, engine_mask %08x\n",
		     vgpu->id, dmlr, engine_mask);
504 505

	vgpu->resetting_eng = resetting_eng;
506 507 508 509 510 511 512 513 514 515 516 517

	intel_vgpu_stop_schedule(vgpu);
	/*
	 * The current_vgpu will set to NULL after stopping the
	 * scheduler when the reset is triggered by current vgpu.
	 */
	if (scheduler->current_vgpu == NULL) {
		mutex_unlock(&gvt->lock);
		intel_gvt_wait_vgpu_idle(vgpu);
		mutex_lock(&gvt->lock);
	}

518
	intel_vgpu_reset_submission(vgpu, resetting_eng);
519 520
	/* full GPU reset or device model level reset */
	if (engine_mask == ALL_ENGINES || dmlr) {
521
		intel_vgpu_select_submission_ops(vgpu, 0);
522 523

		/*fence will not be reset during virtual reset */
524 525
		if (dmlr) {
			intel_vgpu_reset_gtt(vgpu);
526
			intel_vgpu_reset_resource(vgpu);
527
		}
528 529

		intel_vgpu_reset_mmio(vgpu, dmlr);
530
		populate_pvinfo_page(vgpu);
531
		intel_vgpu_reset_display(vgpu);
532

533
		if (dmlr) {
534
			intel_vgpu_reset_cfg_space(vgpu);
535 536 537 538
			/* only reset the failsafe mode when dmlr reset */
			vgpu->failsafe = false;
			vgpu->pv_notified = false;
		}
539 540
	}

541
	vgpu->resetting_eng = 0;
542 543 544 545 546 547
	gvt_dbg_core("reset vgpu%d done\n", vgpu->id);
	gvt_dbg_core("------------------------------------------\n");
}

/**
 * intel_gvt_reset_vgpu - reset a virtual GPU (Function Level)
548 549 550 551 552 553 554
 * @vgpu: virtual GPU
 *
 * This function is called when user wants to reset a virtual GPU.
 *
 */
void intel_gvt_reset_vgpu(struct intel_vgpu *vgpu)
{
555 556 557
	mutex_lock(&vgpu->gvt->lock);
	intel_gvt_reset_vgpu_locked(vgpu, true, 0);
	mutex_unlock(&vgpu->gvt->lock);
558
}