emulate.c 66.4 KB
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/******************************************************************************
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 * emulate.c
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 *
 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
 *
 * Copyright (c) 2005 Keir Fraser
 *
 * Linux coding style, mod r/m decoder, segment base fixes, real-mode
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 * privileged instructions:
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 *
 * Copyright (C) 2006 Qumranet
 *
 *   Avi Kivity <avi@qumranet.com>
 *   Yaniv Kamay <yaniv@qumranet.com>
 *
 * This work is licensed under the terms of the GNU GPL, version 2.  See
 * the COPYING file in the top-level directory.
 *
 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
 */

#ifndef __KERNEL__
#include <stdio.h>
#include <stdint.h>
#include <public/xen.h>
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#define DPRINTF(_f, _a ...) printf(_f , ## _a)
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#else
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#include <linux/kvm_host.h>
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#include "kvm_cache_regs.h"
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#define DPRINTF(x...) do {} while (0)
#endif
#include <linux/module.h>
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#include <asm/kvm_emulate.h>
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#include "mmu.h"		/* for is_long_mode() */

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/*
 * Opcode effective-address decode tables.
 * Note that we only emulate instructions that have at least one memory
 * operand (excluding implicit stack references). We assume that stack
 * references and instruction fetches will never occur in special memory
 * areas that require emulation. So, for example, 'mov <imm>,<reg>' need
 * not be handled.
 */

/* Operand sizes: 8-bit operands or specified/overridden size. */
#define ByteOp      (1<<0)	/* 8-bit operands. */
/* Destination operand type. */
#define ImplicitOps (1<<1)	/* Implicit in opcode. No generic decode. */
#define DstReg      (2<<1)	/* Register operand. */
#define DstMem      (3<<1)	/* Memory operand. */
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#define DstAcc      (4<<1)      /* Destination Accumulator */
#define DstMask     (7<<1)
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/* Source operand type. */
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#define SrcNone     (0<<4)	/* No source operand. */
#define SrcImplicit (0<<4)	/* Source operand is implicit in the opcode. */
#define SrcReg      (1<<4)	/* Register operand. */
#define SrcMem      (2<<4)	/* Memory operand. */
#define SrcMem16    (3<<4)	/* Memory operand (16-bit). */
#define SrcMem32    (4<<4)	/* Memory operand (32-bit). */
#define SrcImm      (5<<4)	/* Immediate operand. */
#define SrcImmByte  (6<<4)	/* 8-bit sign-extended immediate operand. */
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#define SrcOne      (7<<4)	/* Implied '1' */
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#define SrcImmUByte (8<<4)      /* 8-bit unsigned immediate operand. */
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#define SrcImmU     (9<<4)      /* Immediate operand, unsigned */
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#define SrcMask     (0xf<<4)
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/* Generic ModRM decode. */
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#define ModRM       (1<<8)
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/* Destination is only written; never read. */
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#define Mov         (1<<9)
#define BitOp       (1<<10)
#define MemAbs      (1<<11)      /* Memory operand is absolute displacement */
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#define String      (1<<12)     /* String instruction (rep capable) */
#define Stack       (1<<13)     /* Stack instruction (push/pop) */
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#define Group       (1<<14)     /* Bits 3:5 of modrm byte extend opcode */
#define GroupDual   (1<<15)     /* Alternate decoding of mod == 3 */
#define GroupMask   0xff        /* Group number stored in bits 0:7 */
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/* Misc flags */
#define No64	    (1<<28)
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/* Source 2 operand type */
#define Src2None    (0<<29)
#define Src2CL      (1<<29)
#define Src2ImmByte (2<<29)
#define Src2One     (3<<29)
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#define Src2Imm16   (4<<29)
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#define Src2Mask    (7<<29)
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enum {
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	Group1_80, Group1_81, Group1_82, Group1_83,
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	Group1A, Group3_Byte, Group3, Group4, Group5, Group7,
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};

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static u32 opcode_table[256] = {
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	/* 0x00 - 0x07 */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
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	ByteOp | DstAcc | SrcImm, DstAcc | SrcImm,
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	ImplicitOps | Stack | No64, ImplicitOps | Stack | No64,
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	/* 0x08 - 0x0F */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
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	ByteOp | DstAcc | SrcImm, DstAcc | SrcImm,
	ImplicitOps | Stack | No64, 0,
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	/* 0x10 - 0x17 */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
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	ByteOp | DstAcc | SrcImm, DstAcc | SrcImm,
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	ImplicitOps | Stack | No64, ImplicitOps | Stack | No64,
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	/* 0x18 - 0x1F */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
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	ByteOp | DstAcc | SrcImm, DstAcc | SrcImm,
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	ImplicitOps | Stack | No64, ImplicitOps | Stack | No64,
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	/* 0x20 - 0x27 */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
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	DstAcc | SrcImmByte, DstAcc | SrcImm, 0, 0,
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	/* 0x28 - 0x2F */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
	0, 0, 0, 0,
	/* 0x30 - 0x37 */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
	0, 0, 0, 0,
	/* 0x38 - 0x3F */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
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	ByteOp | DstAcc | SrcImm, DstAcc | SrcImm,
	0, 0,
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	/* 0x40 - 0x47 */
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	DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg,
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	/* 0x48 - 0x4F */
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	DstReg, DstReg, DstReg, DstReg,	DstReg, DstReg, DstReg, DstReg,
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	/* 0x50 - 0x57 */
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	SrcReg | Stack, SrcReg | Stack, SrcReg | Stack, SrcReg | Stack,
	SrcReg | Stack, SrcReg | Stack, SrcReg | Stack, SrcReg | Stack,
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	/* 0x58 - 0x5F */
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	DstReg | Stack, DstReg | Stack, DstReg | Stack, DstReg | Stack,
	DstReg | Stack, DstReg | Stack, DstReg | Stack, DstReg | Stack,
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	/* 0x60 - 0x67 */
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	ImplicitOps | Stack | No64, ImplicitOps | Stack | No64,
	0, DstReg | SrcMem32 | ModRM | Mov /* movsxd (x86/64) */ ,
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	0, 0, 0, 0,
	/* 0x68 - 0x6F */
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	SrcImm | Mov | Stack, 0, SrcImmByte | Mov | Stack, 0,
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	SrcNone  | ByteOp  | ImplicitOps, SrcNone  | ImplicitOps, /* insb, insw/insd */
	SrcNone  | ByteOp  | ImplicitOps, SrcNone  | ImplicitOps, /* outsb, outsw/outsd */
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	/* 0x70 - 0x77 */
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	SrcImmByte, SrcImmByte, SrcImmByte, SrcImmByte,
	SrcImmByte, SrcImmByte, SrcImmByte, SrcImmByte,
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	/* 0x78 - 0x7F */
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	SrcImmByte, SrcImmByte, SrcImmByte, SrcImmByte,
	SrcImmByte, SrcImmByte, SrcImmByte, SrcImmByte,
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	/* 0x80 - 0x87 */
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	Group | Group1_80, Group | Group1_81,
	Group | Group1_82, Group | Group1_83,
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	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	/* 0x88 - 0x8F */
	ByteOp | DstMem | SrcReg | ModRM | Mov, DstMem | SrcReg | ModRM | Mov,
	ByteOp | DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
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	DstMem | SrcReg | ModRM | Mov, ModRM | DstReg,
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	DstReg | SrcMem | ModRM | Mov, Group | Group1A,
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	/* 0x90 - 0x97 */
	DstReg, DstReg, DstReg, DstReg,	DstReg, DstReg, DstReg, DstReg,
	/* 0x98 - 0x9F */
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	0, 0, SrcImm | Src2Imm16 | No64, 0,
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	ImplicitOps | Stack, ImplicitOps | Stack, 0, 0,
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	/* 0xA0 - 0xA7 */
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	ByteOp | DstReg | SrcMem | Mov | MemAbs, DstReg | SrcMem | Mov | MemAbs,
	ByteOp | DstMem | SrcReg | Mov | MemAbs, DstMem | SrcReg | Mov | MemAbs,
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	ByteOp | ImplicitOps | Mov | String, ImplicitOps | Mov | String,
	ByteOp | ImplicitOps | String, ImplicitOps | String,
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	/* 0xA8 - 0xAF */
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	0, 0, ByteOp | ImplicitOps | Mov | String, ImplicitOps | Mov | String,
	ByteOp | ImplicitOps | Mov | String, ImplicitOps | Mov | String,
	ByteOp | ImplicitOps | String, ImplicitOps | String,
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	/* 0xB0 - 0xB7 */
	ByteOp | DstReg | SrcImm | Mov, ByteOp | DstReg | SrcImm | Mov,
	ByteOp | DstReg | SrcImm | Mov, ByteOp | DstReg | SrcImm | Mov,
	ByteOp | DstReg | SrcImm | Mov, ByteOp | DstReg | SrcImm | Mov,
	ByteOp | DstReg | SrcImm | Mov, ByteOp | DstReg | SrcImm | Mov,
	/* 0xB8 - 0xBF */
	DstReg | SrcImm | Mov, DstReg | SrcImm | Mov,
	DstReg | SrcImm | Mov, DstReg | SrcImm | Mov,
	DstReg | SrcImm | Mov, DstReg | SrcImm | Mov,
	DstReg | SrcImm | Mov, DstReg | SrcImm | Mov,
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	/* 0xC0 - 0xC7 */
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	ByteOp | DstMem | SrcImm | ModRM, DstMem | SrcImmByte | ModRM,
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	0, ImplicitOps | Stack, 0, 0,
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	ByteOp | DstMem | SrcImm | ModRM | Mov, DstMem | SrcImm | ModRM | Mov,
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	/* 0xC8 - 0xCF */
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	0, 0, 0, ImplicitOps | Stack,
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	ImplicitOps, SrcImmByte, ImplicitOps | No64, ImplicitOps,
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	/* 0xD0 - 0xD7 */
	ByteOp | DstMem | SrcImplicit | ModRM, DstMem | SrcImplicit | ModRM,
	ByteOp | DstMem | SrcImplicit | ModRM, DstMem | SrcImplicit | ModRM,
	0, 0, 0, 0,
	/* 0xD8 - 0xDF */
	0, 0, 0, 0, 0, 0, 0, 0,
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	/* 0xE0 - 0xE7 */
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	0, 0, 0, 0,
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	ByteOp | SrcImmUByte, SrcImmUByte,
	ByteOp | SrcImmUByte, SrcImmUByte,
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	/* 0xE8 - 0xEF */
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	SrcImm | Stack, SrcImm | ImplicitOps,
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	SrcImmU | Src2Imm16 | No64, SrcImmByte | ImplicitOps,
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	SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps,
	SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps,
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	/* 0xF0 - 0xF7 */
	0, 0, 0, 0,
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	ImplicitOps, ImplicitOps, Group | Group3_Byte, Group | Group3,
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	/* 0xF8 - 0xFF */
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	ImplicitOps, 0, ImplicitOps, ImplicitOps,
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	ImplicitOps, ImplicitOps, Group | Group4, Group | Group5,
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};

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static u32 twobyte_table[256] = {
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	/* 0x00 - 0x0F */
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	0, Group | GroupDual | Group7, 0, 0, 0, ImplicitOps, ImplicitOps, 0,
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	ImplicitOps, ImplicitOps, 0, 0, 0, ImplicitOps | ModRM, 0, 0,
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	/* 0x10 - 0x1F */
	0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps | ModRM, 0, 0, 0, 0, 0, 0, 0,
	/* 0x20 - 0x2F */
	ModRM | ImplicitOps, ModRM, ModRM | ImplicitOps, ModRM, 0, 0, 0, 0,
	0, 0, 0, 0, 0, 0, 0, 0,
	/* 0x30 - 0x3F */
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	ImplicitOps, 0, ImplicitOps, 0,
	ImplicitOps, ImplicitOps, 0, 0,
	0, 0, 0, 0, 0, 0, 0, 0,
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	/* 0x40 - 0x47 */
	DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
	DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
	DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
	DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
	/* 0x48 - 0x4F */
	DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
	DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
	DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
	DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
	/* 0x50 - 0x5F */
	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
	/* 0x60 - 0x6F */
	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
	/* 0x70 - 0x7F */
	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
	/* 0x80 - 0x8F */
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	SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm,
	SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm,
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	/* 0x90 - 0x9F */
	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
	/* 0xA0 - 0xA7 */
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	ImplicitOps | Stack, ImplicitOps | Stack,
	0, DstMem | SrcReg | ModRM | BitOp,
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	DstMem | SrcReg | Src2ImmByte | ModRM,
	DstMem | SrcReg | Src2CL | ModRM, 0, 0,
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	/* 0xA8 - 0xAF */
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	ImplicitOps | Stack, ImplicitOps | Stack,
	0, DstMem | SrcReg | ModRM | BitOp,
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	DstMem | SrcReg | Src2ImmByte | ModRM,
	DstMem | SrcReg | Src2CL | ModRM,
	ModRM, 0,
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	/* 0xB0 - 0xB7 */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM, 0,
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	    DstMem | SrcReg | ModRM | BitOp,
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	0, 0, ByteOp | DstReg | SrcMem | ModRM | Mov,
	    DstReg | SrcMem16 | ModRM | Mov,
	/* 0xB8 - 0xBF */
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	0, 0, DstMem | SrcImmByte | ModRM, DstMem | SrcReg | ModRM | BitOp,
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	0, 0, ByteOp | DstReg | SrcMem | ModRM | Mov,
	    DstReg | SrcMem16 | ModRM | Mov,
	/* 0xC0 - 0xCF */
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	0, 0, 0, DstMem | SrcReg | ModRM | Mov, 0, 0, 0, ImplicitOps | ModRM,
	0, 0, 0, 0, 0, 0, 0, 0,
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	/* 0xD0 - 0xDF */
	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
	/* 0xE0 - 0xEF */
	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
	/* 0xF0 - 0xFF */
	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};

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static u32 group_table[] = {
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	[Group1_80*8] =
	ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
	ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
	ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
	ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
	[Group1_81*8] =
	DstMem | SrcImm | ModRM, DstMem | SrcImm | ModRM,
	DstMem | SrcImm | ModRM, DstMem | SrcImm | ModRM,
	DstMem | SrcImm | ModRM, DstMem | SrcImm | ModRM,
	DstMem | SrcImm | ModRM, DstMem | SrcImm | ModRM,
	[Group1_82*8] =
	ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
	ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
	ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
	ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
	[Group1_83*8] =
	DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM,
	DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM,
	DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM,
	DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM,
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	[Group1A*8] =
	DstMem | SrcNone | ModRM | Mov | Stack, 0, 0, 0, 0, 0, 0, 0,
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	[Group3_Byte*8] =
	ByteOp | SrcImm | DstMem | ModRM, 0,
	ByteOp | DstMem | SrcNone | ModRM, ByteOp | DstMem | SrcNone | ModRM,
	0, 0, 0, 0,
	[Group3*8] =
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	DstMem | SrcImm | ModRM, 0,
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	DstMem | SrcNone | ModRM, DstMem | SrcNone | ModRM,
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	0, 0, 0, 0,
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	[Group4*8] =
	ByteOp | DstMem | SrcNone | ModRM, ByteOp | DstMem | SrcNone | ModRM,
	0, 0, 0, 0, 0, 0,
	[Group5*8] =
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	DstMem | SrcNone | ModRM, DstMem | SrcNone | ModRM,
	SrcMem | ModRM | Stack, 0,
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	SrcMem | ModRM | Stack, 0, SrcMem | ModRM | Stack, 0,
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	[Group7*8] =
	0, 0, ModRM | SrcMem, ModRM | SrcMem,
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	SrcNone | ModRM | DstMem | Mov, 0,
	SrcMem16 | ModRM | Mov, SrcMem | ModRM | ByteOp,
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};

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static u32 group2_table[] = {
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	[Group7*8] =
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	SrcNone | ModRM, 0, 0, SrcNone | ModRM,
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	SrcNone | ModRM | DstMem | Mov, 0,
	SrcMem16 | ModRM | Mov, 0,
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};

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/* EFLAGS bit definitions. */
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#define EFLG_VM (1<<17)
#define EFLG_RF (1<<16)
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#define EFLG_OF (1<<11)
#define EFLG_DF (1<<10)
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#define EFLG_IF (1<<9)
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#define EFLG_SF (1<<7)
#define EFLG_ZF (1<<6)
#define EFLG_AF (1<<4)
#define EFLG_PF (1<<2)
#define EFLG_CF (1<<0)

/*
 * Instruction emulation:
 * Most instructions are emulated directly via a fragment of inline assembly
 * code. This allows us to save/restore EFLAGS and thus very easily pick up
 * any modified flags.
 */

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#if defined(CONFIG_X86_64)
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#define _LO32 "k"		/* force 32-bit operand */
#define _STK  "%%rsp"		/* stack pointer */
#elif defined(__i386__)
#define _LO32 ""		/* force 32-bit operand */
#define _STK  "%%esp"		/* stack pointer */
#endif

/*
 * These EFLAGS bits are restored from saved value during emulation, and
 * any changes are written back to the saved value after emulation.
 */
#define EFLAGS_MASK (EFLG_OF|EFLG_SF|EFLG_ZF|EFLG_AF|EFLG_PF|EFLG_CF)

/* Before executing instruction: restore necessary bits in EFLAGS. */
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#define _PRE_EFLAGS(_sav, _msk, _tmp)					\
	/* EFLAGS = (_sav & _msk) | (EFLAGS & ~_msk); _sav &= ~_msk; */ \
	"movl %"_sav",%"_LO32 _tmp"; "                                  \
	"push %"_tmp"; "                                                \
	"push %"_tmp"; "                                                \
	"movl %"_msk",%"_LO32 _tmp"; "                                  \
	"andl %"_LO32 _tmp",("_STK"); "                                 \
	"pushf; "                                                       \
	"notl %"_LO32 _tmp"; "                                          \
	"andl %"_LO32 _tmp",("_STK"); "                                 \
	"andl %"_LO32 _tmp","__stringify(BITS_PER_LONG/4)"("_STK"); "	\
	"pop  %"_tmp"; "                                                \
	"orl  %"_LO32 _tmp",("_STK"); "                                 \
	"popf; "                                                        \
	"pop  %"_sav"; "
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/* After executing instruction: write-back necessary bits in EFLAGS. */
#define _POST_EFLAGS(_sav, _msk, _tmp) \
	/* _sav |= EFLAGS & _msk; */		\
	"pushf; "				\
	"pop  %"_tmp"; "			\
	"andl %"_msk",%"_LO32 _tmp"; "		\
	"orl  %"_LO32 _tmp",%"_sav"; "

393 394 395 396 397 398
#ifdef CONFIG_X86_64
#define ON64(x) x
#else
#define ON64(x)
#endif

399 400 401 402 403 404 405 406 407
#define ____emulate_2op(_op, _src, _dst, _eflags, _x, _y, _suffix)	\
	do {								\
		__asm__ __volatile__ (					\
			_PRE_EFLAGS("0", "4", "2")			\
			_op _suffix " %"_x"3,%1; "			\
			_POST_EFLAGS("0", "4", "2")			\
			: "=m" (_eflags), "=m" ((_dst).val),		\
			  "=&r" (_tmp)					\
			: _y ((_src).val), "i" (EFLAGS_MASK));		\
408
	} while (0)
409 410


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/* Raw emulation: instruction has two explicit operands. */
#define __emulate_2op_nobyte(_op,_src,_dst,_eflags,_wx,_wy,_lx,_ly,_qx,_qy) \
413 414 415 416 417 418 419 420 421 422 423 424 425 426
	do {								\
		unsigned long _tmp;					\
									\
		switch ((_dst).bytes) {					\
		case 2:							\
			____emulate_2op(_op,_src,_dst,_eflags,_wx,_wy,"w"); \
			break;						\
		case 4:							\
			____emulate_2op(_op,_src,_dst,_eflags,_lx,_ly,"l"); \
			break;						\
		case 8:							\
			ON64(____emulate_2op(_op,_src,_dst,_eflags,_qx,_qy,"q")); \
			break;						\
		}							\
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	} while (0)

#define __emulate_2op(_op,_src,_dst,_eflags,_bx,_by,_wx,_wy,_lx,_ly,_qx,_qy) \
	do {								     \
431
		unsigned long _tmp;					     \
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		switch ((_dst).bytes) {				             \
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		case 1:							     \
434
			____emulate_2op(_op,_src,_dst,_eflags,_bx,_by,"b");  \
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			break;						     \
		default:						     \
			__emulate_2op_nobyte(_op, _src, _dst, _eflags,	     \
					     _wx, _wy, _lx, _ly, _qx, _qy);  \
			break;						     \
		}							     \
	} while (0)

/* Source operand is byte-sized and may be restricted to just %cl. */
#define emulate_2op_SrcB(_op, _src, _dst, _eflags)                      \
	__emulate_2op(_op, _src, _dst, _eflags,				\
		      "b", "c", "b", "c", "b", "c", "b", "c")

/* Source operand is byte, word, long or quad sized. */
#define emulate_2op_SrcV(_op, _src, _dst, _eflags)                      \
	__emulate_2op(_op, _src, _dst, _eflags,				\
		      "b", "q", "w", "r", _LO32, "r", "", "r")

/* Source operand is word, long or quad sized. */
#define emulate_2op_SrcV_nobyte(_op, _src, _dst, _eflags)               \
	__emulate_2op_nobyte(_op, _src, _dst, _eflags,			\
			     "w", "r", _LO32, "r", "", "r")

458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496
/* Instruction has three operands and one operand is stored in ECX register */
#define __emulate_2op_cl(_op, _cl, _src, _dst, _eflags, _suffix, _type) 	\
	do {									\
		unsigned long _tmp;						\
		_type _clv  = (_cl).val;  					\
		_type _srcv = (_src).val;    					\
		_type _dstv = (_dst).val;					\
										\
		__asm__ __volatile__ (						\
			_PRE_EFLAGS("0", "5", "2")				\
			_op _suffix " %4,%1 \n"					\
			_POST_EFLAGS("0", "5", "2")				\
			: "=m" (_eflags), "+r" (_dstv), "=&r" (_tmp)		\
			: "c" (_clv) , "r" (_srcv), "i" (EFLAGS_MASK)		\
			); 							\
										\
		(_cl).val  = (unsigned long) _clv;				\
		(_src).val = (unsigned long) _srcv;				\
		(_dst).val = (unsigned long) _dstv;				\
	} while (0)

#define emulate_2op_cl(_op, _cl, _src, _dst, _eflags)				\
	do {									\
		switch ((_dst).bytes) {						\
		case 2:								\
			__emulate_2op_cl(_op, _cl, _src, _dst, _eflags,  	\
						"w", unsigned short);         	\
			break;							\
		case 4: 							\
			__emulate_2op_cl(_op, _cl, _src, _dst, _eflags,  	\
						"l", unsigned int);           	\
			break;							\
		case 8:								\
			ON64(__emulate_2op_cl(_op, _cl, _src, _dst, _eflags,	\
						"q", unsigned long));  		\
			break;							\
		}								\
	} while (0)

497
#define __emulate_1op(_op, _dst, _eflags, _suffix)			\
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	do {								\
		unsigned long _tmp;					\
									\
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		__asm__ __volatile__ (					\
			_PRE_EFLAGS("0", "3", "2")			\
			_op _suffix " %1; "				\
			_POST_EFLAGS("0", "3", "2")			\
			: "=m" (_eflags), "+m" ((_dst).val),		\
			  "=&r" (_tmp)					\
			: "i" (EFLAGS_MASK));				\
	} while (0)

/* Instruction has only one explicit operand (no source operand). */
#define emulate_1op(_op, _dst, _eflags)                                    \
	do {								\
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		switch ((_dst).bytes) {				        \
514 515 516 517
		case 1:	__emulate_1op(_op, _dst, _eflags, "b"); break;	\
		case 2:	__emulate_1op(_op, _dst, _eflags, "w"); break;	\
		case 4:	__emulate_1op(_op, _dst, _eflags, "l"); break;	\
		case 8:	ON64(__emulate_1op(_op, _dst, _eflags, "q")); break; \
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		}							\
	} while (0)

/* Fetch next part of the instruction being emulated. */
#define insn_fetch(_type, _size, _eip)                                  \
({	unsigned long _x;						\
524
	rc = do_insn_fetch(ctxt, ops, (_eip), &_x, (_size));		\
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	if (rc != 0)							\
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		goto done;						\
	(_eip) += (_size);						\
	(_type)_x;							\
})

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static inline unsigned long ad_mask(struct decode_cache *c)
{
	return (1UL << (c->ad_bytes << 3)) - 1;
}

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/* Access/update address held in a register, based on addressing mode. */
537 538 539 540 541 542 543 544 545 546 547 548 549 550 551
static inline unsigned long
address_mask(struct decode_cache *c, unsigned long reg)
{
	if (c->ad_bytes == sizeof(unsigned long))
		return reg;
	else
		return reg & ad_mask(c);
}

static inline unsigned long
register_address(struct decode_cache *c, unsigned long base, unsigned long reg)
{
	return base + address_mask(c, reg);
}

552 553 554 555 556 557 558 559
static inline void
register_address_increment(struct decode_cache *c, unsigned long *reg, int inc)
{
	if (c->ad_bytes == sizeof(unsigned long))
		*reg += inc;
	else
		*reg = (*reg & ~ad_mask(c)) | ((*reg + inc) & ad_mask(c));
}
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561 562 563 564
static inline void jmp_rel(struct decode_cache *c, int rel)
{
	register_address_increment(c, &c->eip, rel);
}
565

566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598
static void set_seg_override(struct decode_cache *c, int seg)
{
	c->has_seg_override = true;
	c->seg_override = seg;
}

static unsigned long seg_base(struct x86_emulate_ctxt *ctxt, int seg)
{
	if (ctxt->mode == X86EMUL_MODE_PROT64 && seg < VCPU_SREG_FS)
		return 0;

	return kvm_x86_ops->get_segment_base(ctxt->vcpu, seg);
}

static unsigned long seg_override_base(struct x86_emulate_ctxt *ctxt,
				       struct decode_cache *c)
{
	if (!c->has_seg_override)
		return 0;

	return seg_base(ctxt, c->seg_override);
}

static unsigned long es_base(struct x86_emulate_ctxt *ctxt)
{
	return seg_base(ctxt, VCPU_SREG_ES);
}

static unsigned long ss_base(struct x86_emulate_ctxt *ctxt)
{
	return seg_base(ctxt, VCPU_SREG_SS);
}

599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624
static int do_fetch_insn_byte(struct x86_emulate_ctxt *ctxt,
			      struct x86_emulate_ops *ops,
			      unsigned long linear, u8 *dest)
{
	struct fetch_cache *fc = &ctxt->decode.fetch;
	int rc;
	int size;

	if (linear < fc->start || linear >= fc->end) {
		size = min(15UL, PAGE_SIZE - offset_in_page(linear));
		rc = ops->read_std(linear, fc->data, size, ctxt->vcpu);
		if (rc)
			return rc;
		fc->start = linear;
		fc->end = linear + size;
	}
	*dest = fc->data[linear - fc->start];
	return 0;
}

static int do_insn_fetch(struct x86_emulate_ctxt *ctxt,
			 struct x86_emulate_ops *ops,
			 unsigned long eip, void *dest, unsigned size)
{
	int rc = 0;

625 626 627
	/* x86 instructions are limited to 15 bytes. */
	if (eip + size - ctxt->decode.eip_orig > 15)
		return X86EMUL_UNHANDLEABLE;
628 629 630 631 632 633 634 635 636
	eip += ctxt->cs_base;
	while (size--) {
		rc = do_fetch_insn_byte(ctxt, ops, eip++, dest++);
		if (rc)
			return rc;
	}
	return 0;
}

637 638 639 640 641 642 643
/*
 * Given the 'reg' portion of a ModRM byte, and a register block, return a
 * pointer into the block that addresses the relevant register.
 * @highbyte_regs specifies whether to decode AH,CH,DH,BH.
 */
static void *decode_register(u8 modrm_reg, unsigned long *regs,
			     int highbyte_regs)
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{
	void *p;

	p = &regs[modrm_reg];
	if (highbyte_regs && modrm_reg >= 4 && modrm_reg < 8)
		p = (unsigned char *)&regs[modrm_reg & 3] + 1;
	return p;
}

static int read_descriptor(struct x86_emulate_ctxt *ctxt,
			   struct x86_emulate_ops *ops,
			   void *ptr,
			   u16 *size, unsigned long *address, int op_bytes)
{
	int rc;

	if (op_bytes == 2)
		op_bytes = 3;
	*address = 0;
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	rc = ops->read_std((unsigned long)ptr, (unsigned long *)size, 2,
			   ctxt->vcpu);
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	if (rc)
		return rc;
667 668
	rc = ops->read_std((unsigned long)ptr + 2, address, op_bytes,
			   ctxt->vcpu);
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	return rc;
}

672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706
static int test_cc(unsigned int condition, unsigned int flags)
{
	int rc = 0;

	switch ((condition & 15) >> 1) {
	case 0: /* o */
		rc |= (flags & EFLG_OF);
		break;
	case 1: /* b/c/nae */
		rc |= (flags & EFLG_CF);
		break;
	case 2: /* z/e */
		rc |= (flags & EFLG_ZF);
		break;
	case 3: /* be/na */
		rc |= (flags & (EFLG_CF|EFLG_ZF));
		break;
	case 4: /* s */
		rc |= (flags & EFLG_SF);
		break;
	case 5: /* p/pe */
		rc |= (flags & EFLG_PF);
		break;
	case 7: /* le/ng */
		rc |= (flags & EFLG_ZF);
		/* fall through */
	case 6: /* l/nge */
		rc |= (!(flags & EFLG_SF) != !(flags & EFLG_OF));
		break;
	}

	/* Odd condition identifiers (lsb == 1) have inverted sense. */
	return (!!rc ^ (condition & 1));
}

707 708 709 710
static void decode_register_operand(struct operand *op,
				    struct decode_cache *c,
				    int inhibit_bytereg)
{
711
	unsigned reg = c->modrm_reg;
712
	int highbyte_regs = c->rex_prefix == 0;
713 714 715

	if (!(c->d & ModRM))
		reg = (c->b & 7) | ((c->rex_prefix & 1) << 3);
716 717
	op->type = OP_REG;
	if ((c->d & ByteOp) && !inhibit_bytereg) {
718
		op->ptr = decode_register(reg, c->regs, highbyte_regs);
719 720 721
		op->val = *(u8 *)op->ptr;
		op->bytes = 1;
	} else {
722
		op->ptr = decode_register(reg, c->regs, 0);
723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738
		op->bytes = c->op_bytes;
		switch (op->bytes) {
		case 2:
			op->val = *(u16 *)op->ptr;
			break;
		case 4:
			op->val = *(u32 *)op->ptr;
			break;
		case 8:
			op->val = *(u64 *) op->ptr;
			break;
		}
	}
	op->orig_val = op->val;
}

739 740 741 742 743
static int decode_modrm(struct x86_emulate_ctxt *ctxt,
			struct x86_emulate_ops *ops)
{
	struct decode_cache *c = &ctxt->decode;
	u8 sib;
744
	int index_reg = 0, base_reg = 0, scale;
745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760
	int rc = 0;

	if (c->rex_prefix) {
		c->modrm_reg = (c->rex_prefix & 4) << 1;	/* REX.R */
		index_reg = (c->rex_prefix & 2) << 2; /* REX.X */
		c->modrm_rm = base_reg = (c->rex_prefix & 1) << 3; /* REG.B */
	}

	c->modrm = insn_fetch(u8, 1, c->eip);
	c->modrm_mod |= (c->modrm & 0xc0) >> 6;
	c->modrm_reg |= (c->modrm & 0x38) >> 3;
	c->modrm_rm |= (c->modrm & 0x07);
	c->modrm_ea = 0;
	c->use_modrm_ea = 1;

	if (c->modrm_mod == 3) {
761 762 763
		c->modrm_ptr = decode_register(c->modrm_rm,
					       c->regs, c->d & ByteOp);
		c->modrm_val = *(unsigned long *)c->modrm_ptr;
764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814
		return rc;
	}

	if (c->ad_bytes == 2) {
		unsigned bx = c->regs[VCPU_REGS_RBX];
		unsigned bp = c->regs[VCPU_REGS_RBP];
		unsigned si = c->regs[VCPU_REGS_RSI];
		unsigned di = c->regs[VCPU_REGS_RDI];

		/* 16-bit ModR/M decode. */
		switch (c->modrm_mod) {
		case 0:
			if (c->modrm_rm == 6)
				c->modrm_ea += insn_fetch(u16, 2, c->eip);
			break;
		case 1:
			c->modrm_ea += insn_fetch(s8, 1, c->eip);
			break;
		case 2:
			c->modrm_ea += insn_fetch(u16, 2, c->eip);
			break;
		}
		switch (c->modrm_rm) {
		case 0:
			c->modrm_ea += bx + si;
			break;
		case 1:
			c->modrm_ea += bx + di;
			break;
		case 2:
			c->modrm_ea += bp + si;
			break;
		case 3:
			c->modrm_ea += bp + di;
			break;
		case 4:
			c->modrm_ea += si;
			break;
		case 5:
			c->modrm_ea += di;
			break;
		case 6:
			if (c->modrm_mod != 0)
				c->modrm_ea += bp;
			break;
		case 7:
			c->modrm_ea += bx;
			break;
		}
		if (c->modrm_rm == 2 || c->modrm_rm == 3 ||
		    (c->modrm_rm == 6 && c->modrm_mod != 0))
815 816
			if (!c->has_seg_override)
				set_seg_override(c, VCPU_SREG_SS);
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		c->modrm_ea = (u16)c->modrm_ea;
	} else {
		/* 32/64-bit ModR/M decode. */
820
		if ((c->modrm_rm & 7) == 4) {
821 822 823 824 825
			sib = insn_fetch(u8, 1, c->eip);
			index_reg |= (sib >> 3) & 7;
			base_reg |= sib & 7;
			scale = sib >> 6;

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			if ((base_reg & 7) == 5 && c->modrm_mod == 0)
				c->modrm_ea += insn_fetch(s32, 4, c->eip);
			else
829
				c->modrm_ea += c->regs[base_reg];
830
			if (index_reg != 4)
831
				c->modrm_ea += c->regs[index_reg] << scale;
832 833
		} else if ((c->modrm_rm & 7) == 5 && c->modrm_mod == 0) {
			if (ctxt->mode == X86EMUL_MODE_PROT64)
834
				c->rip_relative = 1;
835
		} else
836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874
			c->modrm_ea += c->regs[c->modrm_rm];
		switch (c->modrm_mod) {
		case 0:
			if (c->modrm_rm == 5)
				c->modrm_ea += insn_fetch(s32, 4, c->eip);
			break;
		case 1:
			c->modrm_ea += insn_fetch(s8, 1, c->eip);
			break;
		case 2:
			c->modrm_ea += insn_fetch(s32, 4, c->eip);
			break;
		}
	}
done:
	return rc;
}

static int decode_abs(struct x86_emulate_ctxt *ctxt,
		      struct x86_emulate_ops *ops)
{
	struct decode_cache *c = &ctxt->decode;
	int rc = 0;

	switch (c->ad_bytes) {
	case 2:
		c->modrm_ea = insn_fetch(u16, 2, c->eip);
		break;
	case 4:
		c->modrm_ea = insn_fetch(u32, 4, c->eip);
		break;
	case 8:
		c->modrm_ea = insn_fetch(u64, 8, c->eip);
		break;
	}
done:
	return rc;
}

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int
876
x86_decode_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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{
878
	struct decode_cache *c = &ctxt->decode;
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	int rc = 0;
	int mode = ctxt->mode;
881
	int def_op_bytes, def_ad_bytes, group;
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	/* Shadow copy of register state. Committed on successful emulation. */

885
	memset(c, 0, sizeof(struct decode_cache));
886
	c->eip = c->eip_orig = kvm_rip_read(ctxt->vcpu);
887
	ctxt->cs_base = seg_base(ctxt, VCPU_SREG_CS);
888
	memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs);
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	switch (mode) {
	case X86EMUL_MODE_REAL:
	case X86EMUL_MODE_PROT16:
893
		def_op_bytes = def_ad_bytes = 2;
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		break;
	case X86EMUL_MODE_PROT32:
896
		def_op_bytes = def_ad_bytes = 4;
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		break;
898
#ifdef CONFIG_X86_64
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	case X86EMUL_MODE_PROT64:
900 901
		def_op_bytes = 4;
		def_ad_bytes = 8;
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		break;
#endif
	default:
		return -1;
	}

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	c->op_bytes = def_op_bytes;
	c->ad_bytes = def_ad_bytes;

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	/* Legacy prefixes. */
912
	for (;;) {
913
		switch (c->b = insn_fetch(u8, 1, c->eip)) {
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		case 0x66:	/* operand-size override */
915 916
			/* switch between 2/4 bytes */
			c->op_bytes = def_op_bytes ^ 6;
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			break;
		case 0x67:	/* address-size override */
			if (mode == X86EMUL_MODE_PROT64)
920
				/* switch between 4/8 bytes */
921
				c->ad_bytes = def_ad_bytes ^ 12;
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			else
923
				/* switch between 2/4 bytes */
924
				c->ad_bytes = def_ad_bytes ^ 6;
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			break;
926
		case 0x26:	/* ES override */
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		case 0x2e:	/* CS override */
928
		case 0x36:	/* SS override */
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		case 0x3e:	/* DS override */
930
			set_seg_override(c, (c->b >> 3) & 3);
A
Avi Kivity 已提交
931 932 933
			break;
		case 0x64:	/* FS override */
		case 0x65:	/* GS override */
934
			set_seg_override(c, c->b & 7);
A
Avi Kivity 已提交
935
			break;
936 937 938
		case 0x40 ... 0x4f: /* REX */
			if (mode != X86EMUL_MODE_PROT64)
				goto done_prefixes;
939
			c->rex_prefix = c->b;
940
			continue;
A
Avi Kivity 已提交
941
		case 0xf0:	/* LOCK */
942
			c->lock_prefix = 1;
A
Avi Kivity 已提交
943
			break;
944
		case 0xf2:	/* REPNE/REPNZ */
945 946
			c->rep_prefix = REPNE_PREFIX;
			break;
A
Avi Kivity 已提交
947
		case 0xf3:	/* REP/REPE/REPZ */
948
			c->rep_prefix = REPE_PREFIX;
A
Avi Kivity 已提交
949 950 951 952
			break;
		default:
			goto done_prefixes;
		}
953 954 955

		/* Any legacy prefix after a REX prefix nullifies its effect. */

956
		c->rex_prefix = 0;
A
Avi Kivity 已提交
957 958 959 960 961
	}

done_prefixes:

	/* REX prefix. */
962
	if (c->rex_prefix)
963
		if (c->rex_prefix & 8)
964
			c->op_bytes = 8;	/* REX.W */
A
Avi Kivity 已提交
965 966

	/* Opcode byte(s). */
967 968
	c->d = opcode_table[c->b];
	if (c->d == 0) {
A
Avi Kivity 已提交
969
		/* Two-byte opcode? */
970 971 972 973
		if (c->b == 0x0f) {
			c->twobyte = 1;
			c->b = insn_fetch(u8, 1, c->eip);
			c->d = twobyte_table[c->b];
A
Avi Kivity 已提交
974
		}
975
	}
A
Avi Kivity 已提交
976

977 978 979 980 981
	if (mode == X86EMUL_MODE_PROT64 && (c->d & No64)) {
		kvm_report_emulation_failure(ctxt->vcpu, "invalid x86/64 instruction");;
		return -1;
	}

982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997
	if (c->d & Group) {
		group = c->d & GroupMask;
		c->modrm = insn_fetch(u8, 1, c->eip);
		--c->eip;

		group = (group << 3) + ((c->modrm >> 3) & 7);
		if ((c->d & GroupDual) && (c->modrm >> 6) == 3)
			c->d = group2_table[group];
		else
			c->d = group_table[group];
	}

	/* Unrecognised? */
	if (c->d == 0) {
		DPRINTF("Cannot emulate %02x\n", c->b);
		return -1;
A
Avi Kivity 已提交
998 999
	}

1000 1001 1002
	if (mode == X86EMUL_MODE_PROT64 && (c->d & Stack))
		c->op_bytes = 8;

A
Avi Kivity 已提交
1003
	/* ModRM and SIB bytes. */
1004 1005 1006 1007 1008 1009
	if (c->d & ModRM)
		rc = decode_modrm(ctxt, ops);
	else if (c->d & MemAbs)
		rc = decode_abs(ctxt, ops);
	if (rc)
		goto done;
A
Avi Kivity 已提交
1010

1011 1012
	if (!c->has_seg_override)
		set_seg_override(c, VCPU_SREG_DS);
1013

1014 1015
	if (!(!c->twobyte && c->b == 0x8d))
		c->modrm_ea += seg_override_base(ctxt, c);
1016 1017 1018

	if (c->ad_bytes != 8)
		c->modrm_ea = (u32)c->modrm_ea;
A
Avi Kivity 已提交
1019 1020 1021 1022
	/*
	 * Decode and fetch the source operand: register, memory
	 * or immediate.
	 */
1023
	switch (c->d & SrcMask) {
A
Avi Kivity 已提交
1024 1025 1026
	case SrcNone:
		break;
	case SrcReg:
1027
		decode_register_operand(&c->src, c, 0);
A
Avi Kivity 已提交
1028 1029
		break;
	case SrcMem16:
1030
		c->src.bytes = 2;
A
Avi Kivity 已提交
1031 1032
		goto srcmem_common;
	case SrcMem32:
1033
		c->src.bytes = 4;
A
Avi Kivity 已提交
1034 1035
		goto srcmem_common;
	case SrcMem:
1036 1037
		c->src.bytes = (c->d & ByteOp) ? 1 :
							   c->op_bytes;
1038
		/* Don't fetch the address for invlpg: it could be unmapped. */
M
Mike Day 已提交
1039
		if (c->twobyte && c->b == 0x01 && c->modrm_reg == 7)
1040
			break;
M
Mike Day 已提交
1041
	srcmem_common:
1042 1043 1044 1045
		/*
		 * For instructions with a ModR/M byte, switch to register
		 * access if Mod = 3.
		 */
1046 1047
		if ((c->d & ModRM) && c->modrm_mod == 3) {
			c->src.type = OP_REG;
1048
			c->src.val = c->modrm_val;
1049
			c->src.ptr = c->modrm_ptr;
1050 1051
			break;
		}
1052
		c->src.type = OP_MEM;
A
Avi Kivity 已提交
1053 1054
		break;
	case SrcImm:
1055
	case SrcImmU:
1056 1057 1058 1059 1060
		c->src.type = OP_IMM;
		c->src.ptr = (unsigned long *)c->eip;
		c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
		if (c->src.bytes == 8)
			c->src.bytes = 4;
A
Avi Kivity 已提交
1061
		/* NB. Immediates are sign-extended as necessary. */
1062
		switch (c->src.bytes) {
A
Avi Kivity 已提交
1063
		case 1:
1064
			c->src.val = insn_fetch(s8, 1, c->eip);
A
Avi Kivity 已提交
1065 1066
			break;
		case 2:
1067
			c->src.val = insn_fetch(s16, 2, c->eip);
A
Avi Kivity 已提交
1068 1069
			break;
		case 4:
1070
			c->src.val = insn_fetch(s32, 4, c->eip);
A
Avi Kivity 已提交
1071 1072
			break;
		}
1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085
		if ((c->d & SrcMask) == SrcImmU) {
			switch (c->src.bytes) {
			case 1:
				c->src.val &= 0xff;
				break;
			case 2:
				c->src.val &= 0xffff;
				break;
			case 4:
				c->src.val &= 0xffffffff;
				break;
			}
		}
A
Avi Kivity 已提交
1086 1087
		break;
	case SrcImmByte:
1088
	case SrcImmUByte:
1089 1090 1091
		c->src.type = OP_IMM;
		c->src.ptr = (unsigned long *)c->eip;
		c->src.bytes = 1;
1092 1093 1094 1095
		if ((c->d & SrcMask) == SrcImmByte)
			c->src.val = insn_fetch(s8, 1, c->eip);
		else
			c->src.val = insn_fetch(u8, 1, c->eip);
A
Avi Kivity 已提交
1096
		break;
1097 1098 1099 1100
	case SrcOne:
		c->src.bytes = 1;
		c->src.val = 1;
		break;
A
Avi Kivity 已提交
1101 1102
	}

1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119
	/*
	 * Decode and fetch the second source operand: register, memory
	 * or immediate.
	 */
	switch (c->d & Src2Mask) {
	case Src2None:
		break;
	case Src2CL:
		c->src2.bytes = 1;
		c->src2.val = c->regs[VCPU_REGS_RCX] & 0x8;
		break;
	case Src2ImmByte:
		c->src2.type = OP_IMM;
		c->src2.ptr = (unsigned long *)c->eip;
		c->src2.bytes = 1;
		c->src2.val = insn_fetch(u8, 1, c->eip);
		break;
1120 1121 1122 1123 1124 1125
	case Src2Imm16:
		c->src2.type = OP_IMM;
		c->src2.ptr = (unsigned long *)c->eip;
		c->src2.bytes = 2;
		c->src2.val = insn_fetch(u16, 2, c->eip);
		break;
1126 1127 1128 1129 1130 1131
	case Src2One:
		c->src2.bytes = 1;
		c->src2.val = 1;
		break;
	}

1132
	/* Decode and fetch the destination operand: register or memory. */
1133
	switch (c->d & DstMask) {
1134 1135
	case ImplicitOps:
		/* Special instructions do their own operand decoding. */
1136
		return 0;
1137
	case DstReg:
1138
		decode_register_operand(&c->dst, c,
1139
			 c->twobyte && (c->b == 0xb6 || c->b == 0xb7));
1140 1141
		break;
	case DstMem:
1142
		if ((c->d & ModRM) && c->modrm_mod == 3) {
1143
			c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
1144
			c->dst.type = OP_REG;
1145
			c->dst.val = c->dst.orig_val = c->modrm_val;
1146
			c->dst.ptr = c->modrm_ptr;
1147 1148
			break;
		}
1149 1150
		c->dst.type = OP_MEM;
		break;
1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167
	case DstAcc:
		c->dst.type = OP_REG;
		c->dst.bytes = c->op_bytes;
		c->dst.ptr = &c->regs[VCPU_REGS_RAX];
		switch (c->op_bytes) {
			case 1:
				c->dst.val = *(u8 *)c->dst.ptr;
				break;
			case 2:
				c->dst.val = *(u16 *)c->dst.ptr;
				break;
			case 4:
				c->dst.val = *(u32 *)c->dst.ptr;
				break;
		}
		c->dst.orig_val = c->dst.val;
		break;
1168 1169
	}

1170 1171 1172
	if (c->rip_relative)
		c->modrm_ea += c->eip;

1173 1174 1175 1176
done:
	return (rc == X86EMUL_UNHANDLEABLE) ? -1 : 0;
}

1177 1178 1179 1180 1181 1182 1183
static inline void emulate_push(struct x86_emulate_ctxt *ctxt)
{
	struct decode_cache *c = &ctxt->decode;

	c->dst.type  = OP_MEM;
	c->dst.bytes = c->op_bytes;
	c->dst.val = c->src.val;
1184
	register_address_increment(c, &c->regs[VCPU_REGS_RSP], -c->op_bytes);
1185
	c->dst.ptr = (void *) register_address(c, ss_base(ctxt),
1186 1187 1188
					       c->regs[VCPU_REGS_RSP]);
}

1189
static int emulate_pop(struct x86_emulate_ctxt *ctxt,
1190 1191
		       struct x86_emulate_ops *ops,
		       void *dest, int len)
1192 1193 1194 1195
{
	struct decode_cache *c = &ctxt->decode;
	int rc;

1196 1197
	rc = ops->read_emulated(register_address(c, ss_base(ctxt),
						 c->regs[VCPU_REGS_RSP]),
1198
				dest, len, ctxt->vcpu);
1199 1200 1201
	if (rc != 0)
		return rc;

1202
	register_address_increment(c, &c->regs[VCPU_REGS_RSP], len);
1203 1204
	return rc;
}
1205

1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231
static void emulate_push_sreg(struct x86_emulate_ctxt *ctxt, int seg)
{
	struct decode_cache *c = &ctxt->decode;
	struct kvm_segment segment;

	kvm_x86_ops->get_segment(ctxt->vcpu, &segment, seg);

	c->src.val = segment.selector;
	emulate_push(ctxt);
}

static int emulate_pop_sreg(struct x86_emulate_ctxt *ctxt,
			     struct x86_emulate_ops *ops, int seg)
{
	struct decode_cache *c = &ctxt->decode;
	unsigned long selector;
	int rc;

	rc = emulate_pop(ctxt, ops, &selector, c->op_bytes);
	if (rc != 0)
		return rc;

	rc = kvm_load_segment_descriptor(ctxt->vcpu, (u16)selector, 1, seg);
	return rc;
}

1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268
static void emulate_pusha(struct x86_emulate_ctxt *ctxt)
{
	struct decode_cache *c = &ctxt->decode;
	unsigned long old_esp = c->regs[VCPU_REGS_RSP];
	int reg = VCPU_REGS_RAX;

	while (reg <= VCPU_REGS_RDI) {
		(reg == VCPU_REGS_RSP) ?
		(c->src.val = old_esp) : (c->src.val = c->regs[reg]);

		emulate_push(ctxt);
		++reg;
	}
}

static int emulate_popa(struct x86_emulate_ctxt *ctxt,
			struct x86_emulate_ops *ops)
{
	struct decode_cache *c = &ctxt->decode;
	int rc = 0;
	int reg = VCPU_REGS_RDI;

	while (reg >= VCPU_REGS_RAX) {
		if (reg == VCPU_REGS_RSP) {
			register_address_increment(c, &c->regs[VCPU_REGS_RSP],
							c->op_bytes);
			--reg;
		}

		rc = emulate_pop(ctxt, ops, &c->regs[reg], c->op_bytes);
		if (rc != 0)
			break;
		--reg;
	}
	return rc;
}

1269 1270 1271 1272 1273 1274
static inline int emulate_grp1a(struct x86_emulate_ctxt *ctxt,
				struct x86_emulate_ops *ops)
{
	struct decode_cache *c = &ctxt->decode;
	int rc;

1275
	rc = emulate_pop(ctxt, ops, &c->dst.val, c->dst.bytes);
1276 1277
	if (rc != 0)
		return rc;
1278 1279 1280
	return 0;
}

1281
static inline void emulate_grp2(struct x86_emulate_ctxt *ctxt)
1282
{
1283
	struct decode_cache *c = &ctxt->decode;
1284 1285
	switch (c->modrm_reg) {
	case 0:	/* rol */
1286
		emulate_2op_SrcB("rol", c->src, c->dst, ctxt->eflags);
1287 1288
		break;
	case 1:	/* ror */
1289
		emulate_2op_SrcB("ror", c->src, c->dst, ctxt->eflags);
1290 1291
		break;
	case 2:	/* rcl */
1292
		emulate_2op_SrcB("rcl", c->src, c->dst, ctxt->eflags);
1293 1294
		break;
	case 3:	/* rcr */
1295
		emulate_2op_SrcB("rcr", c->src, c->dst, ctxt->eflags);
1296 1297 1298
		break;
	case 4:	/* sal/shl */
	case 6:	/* sal/shl */
1299
		emulate_2op_SrcB("sal", c->src, c->dst, ctxt->eflags);
1300 1301
		break;
	case 5:	/* shr */
1302
		emulate_2op_SrcB("shr", c->src, c->dst, ctxt->eflags);
1303 1304
		break;
	case 7:	/* sar */
1305
		emulate_2op_SrcB("sar", c->src, c->dst, ctxt->eflags);
1306 1307 1308 1309 1310
		break;
	}
}

static inline int emulate_grp3(struct x86_emulate_ctxt *ctxt,
1311
			       struct x86_emulate_ops *ops)
1312 1313 1314 1315 1316 1317
{
	struct decode_cache *c = &ctxt->decode;
	int rc = 0;

	switch (c->modrm_reg) {
	case 0 ... 1:	/* test */
1318
		emulate_2op_SrcV("test", c->src, c->dst, ctxt->eflags);
1319 1320 1321 1322 1323
		break;
	case 2:	/* not */
		c->dst.val = ~c->dst.val;
		break;
	case 3:	/* neg */
1324
		emulate_1op("neg", c->dst, ctxt->eflags);
1325 1326 1327 1328 1329 1330 1331 1332 1333 1334
		break;
	default:
		DPRINTF("Cannot emulate %02x\n", c->b);
		rc = X86EMUL_UNHANDLEABLE;
		break;
	}
	return rc;
}

static inline int emulate_grp45(struct x86_emulate_ctxt *ctxt,
1335
			       struct x86_emulate_ops *ops)
1336 1337 1338 1339 1340
{
	struct decode_cache *c = &ctxt->decode;

	switch (c->modrm_reg) {
	case 0:	/* inc */
1341
		emulate_1op("inc", c->dst, ctxt->eflags);
1342 1343
		break;
	case 1:	/* dec */
1344
		emulate_1op("dec", c->dst, ctxt->eflags);
1345
		break;
1346 1347 1348 1349 1350 1351 1352 1353
	case 2: /* call near abs */ {
		long int old_eip;
		old_eip = c->eip;
		c->eip = c->src.val;
		c->src.val = old_eip;
		emulate_push(ctxt);
		break;
	}
1354
	case 4: /* jmp abs */
1355
		c->eip = c->src.val;
1356 1357
		break;
	case 6:	/* push */
1358
		emulate_push(ctxt);
1359 1360 1361 1362 1363 1364 1365
		break;
	}
	return 0;
}

static inline int emulate_grp9(struct x86_emulate_ctxt *ctxt,
			       struct x86_emulate_ops *ops,
1366
			       unsigned long memop)
1367 1368 1369 1370 1371
{
	struct decode_cache *c = &ctxt->decode;
	u64 old, new;
	int rc;

1372
	rc = ops->read_emulated(memop, &old, 8, ctxt->vcpu);
1373 1374 1375 1376 1377 1378 1379 1380
	if (rc != 0)
		return rc;

	if (((u32) (old >> 0) != (u32) c->regs[VCPU_REGS_RAX]) ||
	    ((u32) (old >> 32) != (u32) c->regs[VCPU_REGS_RDX])) {

		c->regs[VCPU_REGS_RAX] = (u32) (old >> 0);
		c->regs[VCPU_REGS_RDX] = (u32) (old >> 32);
1381
		ctxt->eflags &= ~EFLG_ZF;
1382 1383 1384 1385 1386

	} else {
		new = ((u64)c->regs[VCPU_REGS_RCX] << 32) |
		       (u32) c->regs[VCPU_REGS_RBX];

1387
		rc = ops->cmpxchg_emulated(memop, &old, &new, 8, ctxt->vcpu);
1388 1389
		if (rc != 0)
			return rc;
1390
		ctxt->eflags |= EFLG_ZF;
1391 1392 1393 1394
	}
	return 0;
}

1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413
static int emulate_ret_far(struct x86_emulate_ctxt *ctxt,
			   struct x86_emulate_ops *ops)
{
	struct decode_cache *c = &ctxt->decode;
	int rc;
	unsigned long cs;

	rc = emulate_pop(ctxt, ops, &c->eip, c->op_bytes);
	if (rc)
		return rc;
	if (c->op_bytes == 4)
		c->eip = (u32)c->eip;
	rc = emulate_pop(ctxt, ops, &cs, c->op_bytes);
	if (rc)
		return rc;
	rc = kvm_load_segment_descriptor(ctxt->vcpu, (u16)cs, 1, VCPU_SREG_CS);
	return rc;
}

1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455
static inline int writeback(struct x86_emulate_ctxt *ctxt,
			    struct x86_emulate_ops *ops)
{
	int rc;
	struct decode_cache *c = &ctxt->decode;

	switch (c->dst.type) {
	case OP_REG:
		/* The 4-byte case *is* correct:
		 * in 64-bit mode we zero-extend.
		 */
		switch (c->dst.bytes) {
		case 1:
			*(u8 *)c->dst.ptr = (u8)c->dst.val;
			break;
		case 2:
			*(u16 *)c->dst.ptr = (u16)c->dst.val;
			break;
		case 4:
			*c->dst.ptr = (u32)c->dst.val;
			break;	/* 64b: zero-ext */
		case 8:
			*c->dst.ptr = c->dst.val;
			break;
		}
		break;
	case OP_MEM:
		if (c->lock_prefix)
			rc = ops->cmpxchg_emulated(
					(unsigned long)c->dst.ptr,
					&c->dst.orig_val,
					&c->dst.val,
					c->dst.bytes,
					ctxt->vcpu);
		else
			rc = ops->write_emulated(
					(unsigned long)c->dst.ptr,
					&c->dst.val,
					c->dst.bytes,
					ctxt->vcpu);
		if (rc != 0)
			return rc;
1456 1457 1458 1459
		break;
	case OP_NONE:
		/* no writeback */
		break;
1460 1461 1462 1463 1464 1465
	default:
		break;
	}
	return 0;
}

1466
static void toggle_interruptibility(struct x86_emulate_ctxt *ctxt, u32 mask)
1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479
{
	u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(ctxt->vcpu, mask);
	/*
	 * an sti; sti; sequence only disable interrupts for the first
	 * instruction. So, if the last instruction, be it emulated or
	 * not, left the system with the INT_STI flag enabled, it
	 * means that the last instruction is an sti. We should not
	 * leave the flag on in this case. The same goes for mov ss
	 */
	if (!(int_shadow & mask))
		ctxt->interruptibility = mask;
}

1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517
static inline void
setup_syscalls_segments(struct x86_emulate_ctxt *ctxt,
	struct kvm_segment *cs, struct kvm_segment *ss)
{
	memset(cs, 0, sizeof(struct kvm_segment));
	kvm_x86_ops->get_segment(ctxt->vcpu, cs, VCPU_SREG_CS);
	memset(ss, 0, sizeof(struct kvm_segment));

	cs->l = 0;		/* will be adjusted later */
	cs->base = 0;		/* flat segment */
	cs->g = 1;		/* 4kb granularity */
	cs->limit = 0xffffffff;	/* 4GB limit */
	cs->type = 0x0b;	/* Read, Execute, Accessed */
	cs->s = 1;
	cs->dpl = 0;		/* will be adjusted later */
	cs->present = 1;
	cs->db = 1;

	ss->unusable = 0;
	ss->base = 0;		/* flat segment */
	ss->limit = 0xffffffff;	/* 4GB limit */
	ss->g = 1;		/* 4kb granularity */
	ss->s = 1;
	ss->type = 0x03;	/* Read/Write, Accessed */
	ss->db = 1;		/* 32bit stack segment */
	ss->dpl = 0;
	ss->present = 1;
}

static int
emulate_syscall(struct x86_emulate_ctxt *ctxt)
{
	struct decode_cache *c = &ctxt->decode;
	struct kvm_segment cs, ss;
	u64 msr_data;

	/* syscall is not available in real mode */
	if (c->lock_prefix || ctxt->mode == X86EMUL_MODE_REAL
1518
	    || !kvm_read_cr0_bits(ctxt->vcpu, X86_CR0_PE))
1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558
		return -1;

	setup_syscalls_segments(ctxt, &cs, &ss);

	kvm_x86_ops->get_msr(ctxt->vcpu, MSR_STAR, &msr_data);
	msr_data >>= 32;
	cs.selector = (u16)(msr_data & 0xfffc);
	ss.selector = (u16)(msr_data + 8);

	if (is_long_mode(ctxt->vcpu)) {
		cs.db = 0;
		cs.l = 1;
	}
	kvm_x86_ops->set_segment(ctxt->vcpu, &cs, VCPU_SREG_CS);
	kvm_x86_ops->set_segment(ctxt->vcpu, &ss, VCPU_SREG_SS);

	c->regs[VCPU_REGS_RCX] = c->eip;
	if (is_long_mode(ctxt->vcpu)) {
#ifdef CONFIG_X86_64
		c->regs[VCPU_REGS_R11] = ctxt->eflags & ~EFLG_RF;

		kvm_x86_ops->get_msr(ctxt->vcpu,
			ctxt->mode == X86EMUL_MODE_PROT64 ?
			MSR_LSTAR : MSR_CSTAR, &msr_data);
		c->eip = msr_data;

		kvm_x86_ops->get_msr(ctxt->vcpu, MSR_SYSCALL_MASK, &msr_data);
		ctxt->eflags &= ~(msr_data | EFLG_RF);
#endif
	} else {
		/* legacy mode */
		kvm_x86_ops->get_msr(ctxt->vcpu, MSR_STAR, &msr_data);
		c->eip = (u32)msr_data;

		ctxt->eflags &= ~(EFLG_VM | EFLG_IF | EFLG_RF);
	}

	return 0;
}

1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571
static int
emulate_sysenter(struct x86_emulate_ctxt *ctxt)
{
	struct decode_cache *c = &ctxt->decode;
	struct kvm_segment cs, ss;
	u64 msr_data;

	/* inject #UD if LOCK prefix is used */
	if (c->lock_prefix)
		return -1;

	/* inject #GP if in real mode or paging is disabled */
	if (ctxt->mode == X86EMUL_MODE_REAL ||
1572
	    !kvm_read_cr0_bits(ctxt->vcpu, X86_CR0_PE)) {
1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623
		kvm_inject_gp(ctxt->vcpu, 0);
		return -1;
	}

	/* XXX sysenter/sysexit have not been tested in 64bit mode.
	* Therefore, we inject an #UD.
	*/
	if (ctxt->mode == X86EMUL_MODE_PROT64)
		return -1;

	setup_syscalls_segments(ctxt, &cs, &ss);

	kvm_x86_ops->get_msr(ctxt->vcpu, MSR_IA32_SYSENTER_CS, &msr_data);
	switch (ctxt->mode) {
	case X86EMUL_MODE_PROT32:
		if ((msr_data & 0xfffc) == 0x0) {
			kvm_inject_gp(ctxt->vcpu, 0);
			return -1;
		}
		break;
	case X86EMUL_MODE_PROT64:
		if (msr_data == 0x0) {
			kvm_inject_gp(ctxt->vcpu, 0);
			return -1;
		}
		break;
	}

	ctxt->eflags &= ~(EFLG_VM | EFLG_IF | EFLG_RF);
	cs.selector = (u16)msr_data;
	cs.selector &= ~SELECTOR_RPL_MASK;
	ss.selector = cs.selector + 8;
	ss.selector &= ~SELECTOR_RPL_MASK;
	if (ctxt->mode == X86EMUL_MODE_PROT64
		|| is_long_mode(ctxt->vcpu)) {
		cs.db = 0;
		cs.l = 1;
	}

	kvm_x86_ops->set_segment(ctxt->vcpu, &cs, VCPU_SREG_CS);
	kvm_x86_ops->set_segment(ctxt->vcpu, &ss, VCPU_SREG_SS);

	kvm_x86_ops->get_msr(ctxt->vcpu, MSR_IA32_SYSENTER_EIP, &msr_data);
	c->eip = msr_data;

	kvm_x86_ops->get_msr(ctxt->vcpu, MSR_IA32_SYSENTER_ESP, &msr_data);
	c->regs[VCPU_REGS_RSP] = msr_data;

	return 0;
}

1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637
static int
emulate_sysexit(struct x86_emulate_ctxt *ctxt)
{
	struct decode_cache *c = &ctxt->decode;
	struct kvm_segment cs, ss;
	u64 msr_data;
	int usermode;

	/* inject #UD if LOCK prefix is used */
	if (c->lock_prefix)
		return -1;

	/* inject #GP if in real mode or paging is disabled */
	if (ctxt->mode == X86EMUL_MODE_REAL
1638
	    || !kvm_read_cr0_bits(ctxt->vcpu, X86_CR0_PE)) {
1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690
		kvm_inject_gp(ctxt->vcpu, 0);
		return -1;
	}

	/* sysexit must be called from CPL 0 */
	if (kvm_x86_ops->get_cpl(ctxt->vcpu) != 0) {
		kvm_inject_gp(ctxt->vcpu, 0);
		return -1;
	}

	setup_syscalls_segments(ctxt, &cs, &ss);

	if ((c->rex_prefix & 0x8) != 0x0)
		usermode = X86EMUL_MODE_PROT64;
	else
		usermode = X86EMUL_MODE_PROT32;

	cs.dpl = 3;
	ss.dpl = 3;
	kvm_x86_ops->get_msr(ctxt->vcpu, MSR_IA32_SYSENTER_CS, &msr_data);
	switch (usermode) {
	case X86EMUL_MODE_PROT32:
		cs.selector = (u16)(msr_data + 16);
		if ((msr_data & 0xfffc) == 0x0) {
			kvm_inject_gp(ctxt->vcpu, 0);
			return -1;
		}
		ss.selector = (u16)(msr_data + 24);
		break;
	case X86EMUL_MODE_PROT64:
		cs.selector = (u16)(msr_data + 32);
		if (msr_data == 0x0) {
			kvm_inject_gp(ctxt->vcpu, 0);
			return -1;
		}
		ss.selector = cs.selector + 8;
		cs.db = 0;
		cs.l = 1;
		break;
	}
	cs.selector |= SELECTOR_RPL_MASK;
	ss.selector |= SELECTOR_RPL_MASK;

	kvm_x86_ops->set_segment(ctxt->vcpu, &cs, VCPU_SREG_CS);
	kvm_x86_ops->set_segment(ctxt->vcpu, &ss, VCPU_SREG_SS);

	c->eip = ctxt->vcpu->arch.regs[VCPU_REGS_RDX];
	c->regs[VCPU_REGS_RSP] = ctxt->vcpu->arch.regs[VCPU_REGS_RCX];

	return 0;
}

1691
int
1692
x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
1693
{
1694
	unsigned long memop = 0;
1695
	u64 msr_data;
1696
	unsigned long saved_eip = 0;
1697
	struct decode_cache *c = &ctxt->decode;
1698 1699
	unsigned int port;
	int io_dir_in;
1700
	int rc = 0;
1701

1702 1703
	ctxt->interruptibility = 0;

1704 1705 1706 1707 1708
	/* Shadow copy of register state. Committed on successful emulation.
	 * NOTE: we can copy them from vcpu as x86_decode_insn() doesn't
	 * modify them.
	 */

1709
	memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs);
1710 1711
	saved_eip = c->eip;

1712
	if (((c->d & ModRM) && (c->modrm_mod != 3)) || (c->d & MemAbs))
1713
		memop = c->modrm_ea;
1714

1715 1716 1717
	if (c->rep_prefix && (c->d & String)) {
		/* All REP prefixes have the same first termination condition */
		if (c->regs[VCPU_REGS_RCX] == 0) {
1718
			kvm_rip_write(ctxt->vcpu, c->eip);
1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731
			goto done;
		}
		/* The second termination condition only applies for REPE
		 * and REPNE. Test if the repeat string operation prefix is
		 * REPE/REPZ or REPNE/REPNZ and if it's the case it tests the
		 * corresponding termination condition according to:
		 * 	- if REPE/REPZ and ZF = 0 then done
		 * 	- if REPNE/REPNZ and ZF = 1 then done
		 */
		if ((c->b == 0xa6) || (c->b == 0xa7) ||
				(c->b == 0xae) || (c->b == 0xaf)) {
			if ((c->rep_prefix == REPE_PREFIX) &&
				((ctxt->eflags & EFLG_ZF) == 0)) {
1732
					kvm_rip_write(ctxt->vcpu, c->eip);
1733 1734 1735 1736
					goto done;
			}
			if ((c->rep_prefix == REPNE_PREFIX) &&
				((ctxt->eflags & EFLG_ZF) == EFLG_ZF)) {
1737
				kvm_rip_write(ctxt->vcpu, c->eip);
1738 1739 1740 1741
				goto done;
			}
		}
		c->regs[VCPU_REGS_RCX]--;
1742
		c->eip = kvm_rip_read(ctxt->vcpu);
1743 1744
	}

1745
	if (c->src.type == OP_MEM) {
1746
		c->src.ptr = (unsigned long *)memop;
1747
		c->src.val = 0;
M
Mike Day 已提交
1748 1749 1750 1751 1752
		rc = ops->read_emulated((unsigned long)c->src.ptr,
					&c->src.val,
					c->src.bytes,
					ctxt->vcpu);
		if (rc != 0)
1753 1754 1755 1756 1757 1758 1759 1760 1761
			goto done;
		c->src.orig_val = c->src.val;
	}

	if ((c->d & DstMask) == ImplicitOps)
		goto special_insn;


	if (c->dst.type == OP_MEM) {
1762
		c->dst.ptr = (unsigned long *)memop;
1763 1764
		c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
		c->dst.val = 0;
1765 1766
		if (c->d & BitOp) {
			unsigned long mask = ~(c->dst.bytes * 8 - 1);
1767

1768 1769
			c->dst.ptr = (void *)c->dst.ptr +
						   (c->src.val & mask) / 8;
1770
		}
1771 1772 1773 1774 1775
		if (!(c->d & Mov) &&
				   /* optimisation - avoid slow emulated read */
		    ((rc = ops->read_emulated((unsigned long)c->dst.ptr,
					   &c->dst.val,
					  c->dst.bytes, ctxt->vcpu)) != 0))
1776 1777
			goto done;
	}
1778
	c->dst.orig_val = c->dst.val;
1779

1780 1781
special_insn:

1782
	if (c->twobyte)
A
Avi Kivity 已提交
1783 1784
		goto twobyte_insn;

1785
	switch (c->b) {
A
Avi Kivity 已提交
1786 1787
	case 0x00 ... 0x05:
	      add:		/* add */
1788
		emulate_2op_SrcV("add", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1789
		break;
1790 1791 1792 1793 1794 1795 1796 1797
	case 0x06:		/* push es */
		emulate_push_sreg(ctxt, VCPU_SREG_ES);
		break;
	case 0x07:		/* pop es */
		rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_ES);
		if (rc != 0)
			goto done;
		break;
A
Avi Kivity 已提交
1798 1799
	case 0x08 ... 0x0d:
	      or:		/* or */
1800
		emulate_2op_SrcV("or", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1801
		break;
1802 1803 1804
	case 0x0e:		/* push cs */
		emulate_push_sreg(ctxt, VCPU_SREG_CS);
		break;
A
Avi Kivity 已提交
1805 1806
	case 0x10 ... 0x15:
	      adc:		/* adc */
1807
		emulate_2op_SrcV("adc", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1808
		break;
1809 1810 1811 1812 1813 1814 1815 1816
	case 0x16:		/* push ss */
		emulate_push_sreg(ctxt, VCPU_SREG_SS);
		break;
	case 0x17:		/* pop ss */
		rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_SS);
		if (rc != 0)
			goto done;
		break;
A
Avi Kivity 已提交
1817 1818
	case 0x18 ... 0x1d:
	      sbb:		/* sbb */
1819
		emulate_2op_SrcV("sbb", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1820
		break;
1821 1822 1823 1824 1825 1826 1827 1828
	case 0x1e:		/* push ds */
		emulate_push_sreg(ctxt, VCPU_SREG_DS);
		break;
	case 0x1f:		/* pop ds */
		rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_DS);
		if (rc != 0)
			goto done;
		break;
1829
	case 0x20 ... 0x25:
A
Avi Kivity 已提交
1830
	      and:		/* and */
1831
		emulate_2op_SrcV("and", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1832 1833 1834
		break;
	case 0x28 ... 0x2d:
	      sub:		/* sub */
1835
		emulate_2op_SrcV("sub", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1836 1837 1838
		break;
	case 0x30 ... 0x35:
	      xor:		/* xor */
1839
		emulate_2op_SrcV("xor", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1840 1841 1842
		break;
	case 0x38 ... 0x3d:
	      cmp:		/* cmp */
1843
		emulate_2op_SrcV("cmp", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1844
		break;
1845 1846 1847 1848 1849 1850 1851
	case 0x40 ... 0x47: /* inc r16/r32 */
		emulate_1op("inc", c->dst, ctxt->eflags);
		break;
	case 0x48 ... 0x4f: /* dec r16/r32 */
		emulate_1op("dec", c->dst, ctxt->eflags);
		break;
	case 0x50 ... 0x57:  /* push reg */
1852
		emulate_push(ctxt);
1853 1854 1855
		break;
	case 0x58 ... 0x5f: /* pop reg */
	pop_instruction:
1856
		rc = emulate_pop(ctxt, ops, &c->dst.val, c->op_bytes);
1857
		if (rc != 0)
1858 1859
			goto done;
		break;
1860 1861 1862 1863 1864 1865 1866 1867
	case 0x60:	/* pusha */
		emulate_pusha(ctxt);
		break;
	case 0x61:	/* popa */
		rc = emulate_popa(ctxt, ops);
		if (rc != 0)
			goto done;
		break;
A
Avi Kivity 已提交
1868
	case 0x63:		/* movsxd */
1869
		if (ctxt->mode != X86EMUL_MODE_PROT64)
A
Avi Kivity 已提交
1870
			goto cannot_emulate;
1871
		c->dst.val = (s32) c->src.val;
A
Avi Kivity 已提交
1872
		break;
1873
	case 0x68: /* push imm */
1874 1875 1876 1877 1878
	case 0x6a: /* push imm8 */
		emulate_push(ctxt);
		break;
	case 0x6c:		/* insb */
	case 0x6d:		/* insw/insd */
A
Avi Kivity 已提交
1879
		 if (kvm_emulate_pio_string(ctxt->vcpu,
1880 1881 1882
				1,
				(c->d & ByteOp) ? 1 : c->op_bytes,
				c->rep_prefix ?
1883
				address_mask(c, c->regs[VCPU_REGS_RCX]) : 1,
1884
				(ctxt->eflags & EFLG_DF),
1885
				register_address(c, es_base(ctxt),
1886 1887 1888 1889 1890 1891 1892 1893 1894
						 c->regs[VCPU_REGS_RDI]),
				c->rep_prefix,
				c->regs[VCPU_REGS_RDX]) == 0) {
			c->eip = saved_eip;
			return -1;
		}
		return 0;
	case 0x6e:		/* outsb */
	case 0x6f:		/* outsw/outsd */
A
Avi Kivity 已提交
1895
		if (kvm_emulate_pio_string(ctxt->vcpu,
1896 1897 1898
				0,
				(c->d & ByteOp) ? 1 : c->op_bytes,
				c->rep_prefix ?
1899
				address_mask(c, c->regs[VCPU_REGS_RCX]) : 1,
1900
				(ctxt->eflags & EFLG_DF),
1901 1902
					 register_address(c,
					  seg_override_base(ctxt, c),
1903 1904 1905 1906 1907 1908 1909
						 c->regs[VCPU_REGS_RSI]),
				c->rep_prefix,
				c->regs[VCPU_REGS_RDX]) == 0) {
			c->eip = saved_eip;
			return -1;
		}
		return 0;
1910
	case 0x70 ... 0x7f: /* jcc (short) */
1911
		if (test_cc(c->b, ctxt->eflags))
1912
			jmp_rel(c, c->src.val);
1913
		break;
A
Avi Kivity 已提交
1914
	case 0x80 ... 0x83:	/* Grp1 */
1915
		switch (c->modrm_reg) {
A
Avi Kivity 已提交
1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934
		case 0:
			goto add;
		case 1:
			goto or;
		case 2:
			goto adc;
		case 3:
			goto sbb;
		case 4:
			goto and;
		case 5:
			goto sub;
		case 6:
			goto xor;
		case 7:
			goto cmp;
		}
		break;
	case 0x84 ... 0x85:
1935
		emulate_2op_SrcV("test", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1936 1937
		break;
	case 0x86 ... 0x87:	/* xchg */
1938
	xchg:
A
Avi Kivity 已提交
1939
		/* Write back the register source. */
1940
		switch (c->dst.bytes) {
A
Avi Kivity 已提交
1941
		case 1:
1942
			*(u8 *) c->src.ptr = (u8) c->dst.val;
A
Avi Kivity 已提交
1943 1944
			break;
		case 2:
1945
			*(u16 *) c->src.ptr = (u16) c->dst.val;
A
Avi Kivity 已提交
1946 1947
			break;
		case 4:
1948
			*c->src.ptr = (u32) c->dst.val;
A
Avi Kivity 已提交
1949 1950
			break;	/* 64b reg: zero-extend */
		case 8:
1951
			*c->src.ptr = c->dst.val;
A
Avi Kivity 已提交
1952 1953 1954 1955 1956 1957
			break;
		}
		/*
		 * Write back the memory destination with implicit LOCK
		 * prefix.
		 */
1958 1959
		c->dst.val = c->src.val;
		c->lock_prefix = 1;
A
Avi Kivity 已提交
1960 1961
		break;
	case 0x88 ... 0x8b:	/* mov */
1962
		goto mov;
1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975
	case 0x8c: { /* mov r/m, sreg */
		struct kvm_segment segreg;

		if (c->modrm_reg <= 5)
			kvm_get_segment(ctxt->vcpu, &segreg, c->modrm_reg);
		else {
			printk(KERN_INFO "0x8c: Invalid segreg in modrm byte 0x%02x\n",
			       c->modrm);
			goto cannot_emulate;
		}
		c->dst.val = segreg.selector;
		break;
	}
N
Nitin A Kamble 已提交
1976
	case 0x8d: /* lea r16/r32, m */
1977
		c->dst.val = c->modrm_ea;
N
Nitin A Kamble 已提交
1978
		break;
1979 1980 1981 1982 1983 1984
	case 0x8e: { /* mov seg, r/m16 */
		uint16_t sel;
		int type_bits;
		int err;

		sel = c->src.val;
1985 1986 1987
		if (c->modrm_reg == VCPU_SREG_SS)
			toggle_interruptibility(ctxt, X86_SHADOW_INT_MOV_SS);

1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003
		if (c->modrm_reg <= 5) {
			type_bits = (c->modrm_reg == 1) ? 9 : 1;
			err = kvm_load_segment_descriptor(ctxt->vcpu, sel,
							  type_bits, c->modrm_reg);
		} else {
			printk(KERN_INFO "Invalid segreg in modrm byte 0x%02x\n",
					c->modrm);
			goto cannot_emulate;
		}

		if (err < 0)
			goto cannot_emulate;

		c->dst.type = OP_NONE;  /* Disable writeback. */
		break;
	}
A
Avi Kivity 已提交
2004
	case 0x8f:		/* pop (sole member of Grp1a) */
2005 2006
		rc = emulate_grp1a(ctxt, ops);
		if (rc != 0)
A
Avi Kivity 已提交
2007 2008
			goto done;
		break;
2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019
	case 0x90: /* nop / xchg r8,rax */
		if (!(c->rex_prefix & 1)) { /* nop */
			c->dst.type = OP_NONE;
			break;
		}
	case 0x91 ... 0x97: /* xchg reg,rax */
		c->src.type = c->dst.type = OP_REG;
		c->src.bytes = c->dst.bytes = c->op_bytes;
		c->src.ptr = (unsigned long *) &c->regs[VCPU_REGS_RAX];
		c->src.val = *(c->src.ptr);
		goto xchg;
N
Nitin A Kamble 已提交
2020
	case 0x9c: /* pushf */
2021
		c->src.val =  (unsigned long) ctxt->eflags;
2022 2023
		emulate_push(ctxt);
		break;
N
Nitin A Kamble 已提交
2024
	case 0x9d: /* popf */
A
Avi Kivity 已提交
2025
		c->dst.type = OP_REG;
2026
		c->dst.ptr = (unsigned long *) &ctxt->eflags;
A
Avi Kivity 已提交
2027
		c->dst.bytes = c->op_bytes;
N
Nitin A Kamble 已提交
2028
		goto pop_instruction;
2029 2030 2031 2032 2033 2034 2035
	case 0xa0 ... 0xa1:	/* mov */
		c->dst.ptr = (unsigned long *)&c->regs[VCPU_REGS_RAX];
		c->dst.val = c->src.val;
		break;
	case 0xa2 ... 0xa3:	/* mov */
		c->dst.val = (unsigned long)c->regs[VCPU_REGS_RAX];
		break;
A
Avi Kivity 已提交
2036
	case 0xa4 ... 0xa5:	/* movs */
2037 2038
		c->dst.type = OP_MEM;
		c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
2039
		c->dst.ptr = (unsigned long *)register_address(c,
2040
						   es_base(ctxt),
2041
						   c->regs[VCPU_REGS_RDI]);
2042
		if ((rc = ops->read_emulated(register_address(c,
2043
					   seg_override_base(ctxt, c),
2044 2045 2046
					c->regs[VCPU_REGS_RSI]),
					&c->dst.val,
					c->dst.bytes, ctxt->vcpu)) != 0)
A
Avi Kivity 已提交
2047
			goto done;
2048
		register_address_increment(c, &c->regs[VCPU_REGS_RSI],
2049
				       (ctxt->eflags & EFLG_DF) ? -c->dst.bytes
2050
							   : c->dst.bytes);
2051
		register_address_increment(c, &c->regs[VCPU_REGS_RDI],
2052
				       (ctxt->eflags & EFLG_DF) ? -c->dst.bytes
2053
							   : c->dst.bytes);
A
Avi Kivity 已提交
2054 2055
		break;
	case 0xa6 ... 0xa7:	/* cmps */
2056 2057
		c->src.type = OP_NONE; /* Disable writeback. */
		c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
2058
		c->src.ptr = (unsigned long *)register_address(c,
2059
				       seg_override_base(ctxt, c),
2060 2061 2062 2063 2064 2065 2066 2067 2068
						   c->regs[VCPU_REGS_RSI]);
		if ((rc = ops->read_emulated((unsigned long)c->src.ptr,
						&c->src.val,
						c->src.bytes,
						ctxt->vcpu)) != 0)
			goto done;

		c->dst.type = OP_NONE; /* Disable writeback. */
		c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
2069
		c->dst.ptr = (unsigned long *)register_address(c,
2070
						   es_base(ctxt),
2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081
						   c->regs[VCPU_REGS_RDI]);
		if ((rc = ops->read_emulated((unsigned long)c->dst.ptr,
						&c->dst.val,
						c->dst.bytes,
						ctxt->vcpu)) != 0)
			goto done;

		DPRINTF("cmps: mem1=0x%p mem2=0x%p\n", c->src.ptr, c->dst.ptr);

		emulate_2op_SrcV("cmp", c->src, c->dst, ctxt->eflags);

2082
		register_address_increment(c, &c->regs[VCPU_REGS_RSI],
2083 2084
				       (ctxt->eflags & EFLG_DF) ? -c->src.bytes
								  : c->src.bytes);
2085
		register_address_increment(c, &c->regs[VCPU_REGS_RDI],
2086 2087 2088 2089
				       (ctxt->eflags & EFLG_DF) ? -c->dst.bytes
								  : c->dst.bytes);

		break;
A
Avi Kivity 已提交
2090
	case 0xaa ... 0xab:	/* stos */
2091 2092
		c->dst.type = OP_MEM;
		c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
2093
		c->dst.ptr = (unsigned long *)register_address(c,
2094
						   es_base(ctxt),
2095
						   c->regs[VCPU_REGS_RDI]);
2096
		c->dst.val = c->regs[VCPU_REGS_RAX];
2097
		register_address_increment(c, &c->regs[VCPU_REGS_RDI],
2098
				       (ctxt->eflags & EFLG_DF) ? -c->dst.bytes
2099
							   : c->dst.bytes);
A
Avi Kivity 已提交
2100 2101
		break;
	case 0xac ... 0xad:	/* lods */
2102 2103 2104
		c->dst.type = OP_REG;
		c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
		c->dst.ptr = (unsigned long *)&c->regs[VCPU_REGS_RAX];
2105
		if ((rc = ops->read_emulated(register_address(c,
2106
						 seg_override_base(ctxt, c),
2107 2108 2109 2110
						 c->regs[VCPU_REGS_RSI]),
						 &c->dst.val,
						 c->dst.bytes,
						 ctxt->vcpu)) != 0)
A
Avi Kivity 已提交
2111
			goto done;
2112
		register_address_increment(c, &c->regs[VCPU_REGS_RSI],
2113
				       (ctxt->eflags & EFLG_DF) ? -c->dst.bytes
2114
							   : c->dst.bytes);
A
Avi Kivity 已提交
2115 2116 2117 2118
		break;
	case 0xae ... 0xaf:	/* scas */
		DPRINTF("Urk! I don't handle SCAS.\n");
		goto cannot_emulate;
2119
	case 0xb0 ... 0xbf: /* mov r, imm */
2120
		goto mov;
2121 2122 2123
	case 0xc0 ... 0xc1:
		emulate_grp2(ctxt);
		break;
2124
	case 0xc3: /* ret */
A
Avi Kivity 已提交
2125
		c->dst.type = OP_REG;
2126
		c->dst.ptr = &c->eip;
A
Avi Kivity 已提交
2127
		c->dst.bytes = c->op_bytes;
2128
		goto pop_instruction;
2129 2130 2131 2132
	case 0xc6 ... 0xc7:	/* mov (sole member of Grp11) */
	mov:
		c->dst.val = c->src.val;
		break;
2133 2134 2135 2136 2137
	case 0xcb:		/* ret far */
		rc = emulate_ret_far(ctxt, ops);
		if (rc)
			goto done;
		break;
2138 2139 2140 2141 2142 2143 2144 2145
	case 0xd0 ... 0xd1:	/* Grp2 */
		c->src.val = 1;
		emulate_grp2(ctxt);
		break;
	case 0xd2 ... 0xd3:	/* Grp2 */
		c->src.val = c->regs[VCPU_REGS_RCX];
		emulate_grp2(ctxt);
		break;
2146 2147
	case 0xe4: 	/* inb */
	case 0xe5: 	/* in */
2148
		port = c->src.val;
2149 2150 2151 2152
		io_dir_in = 1;
		goto do_io;
	case 0xe6: /* outb */
	case 0xe7: /* out */
2153
		port = c->src.val;
2154 2155
		io_dir_in = 0;
		goto do_io;
2156
	case 0xe8: /* call (near) */ {
2157
		long int rel = c->src.val;
2158
		c->src.val = (unsigned long) c->eip;
2159
		jmp_rel(c, rel);
2160 2161
		emulate_push(ctxt);
		break;
2162 2163
	}
	case 0xe9: /* jmp rel */
2164
		goto jmp;
2165 2166 2167
	case 0xea: /* jmp far */
		if (kvm_load_segment_descriptor(ctxt->vcpu, c->src2.val, 9,
					VCPU_SREG_CS) < 0) {
2168 2169 2170 2171
			DPRINTF("jmp far: Failed to load CS descriptor\n");
			goto cannot_emulate;
		}

2172
		c->eip = c->src.val;
2173 2174 2175
		break;
	case 0xeb:
	      jmp:		/* jmp rel short */
2176
		jmp_rel(c, c->src.val);
2177
		c->dst.type = OP_NONE; /* Disable writeback. */
2178
		break;
2179 2180 2181 2182 2183 2184 2185 2186 2187
	case 0xec: /* in al,dx */
	case 0xed: /* in (e/r)ax,dx */
		port = c->regs[VCPU_REGS_RDX];
		io_dir_in = 1;
		goto do_io;
	case 0xee: /* out al,dx */
	case 0xef: /* out (e/r)ax,dx */
		port = c->regs[VCPU_REGS_RDX];
		io_dir_in = 0;
A
Avi Kivity 已提交
2188
	do_io:	if (kvm_emulate_pio(ctxt->vcpu, io_dir_in,
2189 2190 2191 2192 2193
				   (c->d & ByteOp) ? 1 : c->op_bytes,
				   port) != 0) {
			c->eip = saved_eip;
			goto cannot_emulate;
		}
2194
		break;
2195
	case 0xf4:              /* hlt */
2196
		ctxt->vcpu->arch.halt_request = 1;
2197
		break;
2198 2199 2200 2201 2202
	case 0xf5:	/* cmc */
		/* complement carry flag from eflags reg */
		ctxt->eflags ^= EFLG_CF;
		c->dst.type = OP_NONE;	/* Disable writeback. */
		break;
2203 2204 2205 2206 2207
	case 0xf6 ... 0xf7:	/* Grp3 */
		rc = emulate_grp3(ctxt, ops);
		if (rc != 0)
			goto done;
		break;
2208 2209 2210 2211 2212 2213 2214 2215 2216
	case 0xf8: /* clc */
		ctxt->eflags &= ~EFLG_CF;
		c->dst.type = OP_NONE;	/* Disable writeback. */
		break;
	case 0xfa: /* cli */
		ctxt->eflags &= ~X86_EFLAGS_IF;
		c->dst.type = OP_NONE;	/* Disable writeback. */
		break;
	case 0xfb: /* sti */
2217
		toggle_interruptibility(ctxt, X86_SHADOW_INT_STI);
2218 2219 2220
		ctxt->eflags |= X86_EFLAGS_IF;
		c->dst.type = OP_NONE;	/* Disable writeback. */
		break;
2221 2222 2223 2224 2225 2226 2227 2228
	case 0xfc: /* cld */
		ctxt->eflags &= ~EFLG_DF;
		c->dst.type = OP_NONE;	/* Disable writeback. */
		break;
	case 0xfd: /* std */
		ctxt->eflags |= EFLG_DF;
		c->dst.type = OP_NONE;	/* Disable writeback. */
		break;
2229 2230 2231 2232 2233
	case 0xfe ... 0xff:	/* Grp4/Grp5 */
		rc = emulate_grp45(ctxt, ops);
		if (rc != 0)
			goto done;
		break;
A
Avi Kivity 已提交
2234
	}
2235 2236 2237 2238 2239 2240 2241

writeback:
	rc = writeback(ctxt, ops);
	if (rc != 0)
		goto done;

	/* Commit shadow register state. */
2242
	memcpy(ctxt->vcpu->arch.regs, c->regs, sizeof c->regs);
2243
	kvm_rip_write(ctxt->vcpu, c->eip);
2244 2245 2246 2247 2248 2249 2250

done:
	if (rc == X86EMUL_UNHANDLEABLE) {
		c->eip = saved_eip;
		return -1;
	}
	return 0;
A
Avi Kivity 已提交
2251 2252

twobyte_insn:
2253
	switch (c->b) {
A
Avi Kivity 已提交
2254
	case 0x01: /* lgdt, lidt, lmsw */
2255
		switch (c->modrm_reg) {
A
Avi Kivity 已提交
2256 2257 2258
			u16 size;
			unsigned long address;

2259
		case 0: /* vmcall */
2260
			if (c->modrm_mod != 3 || c->modrm_rm != 1)
2261 2262
				goto cannot_emulate;

2263 2264 2265 2266
			rc = kvm_fix_hypercall(ctxt->vcpu);
			if (rc)
				goto done;

2267
			/* Let the processor re-execute the fixed hypercall */
2268
			c->eip = kvm_rip_read(ctxt->vcpu);
2269 2270
			/* Disable writeback. */
			c->dst.type = OP_NONE;
2271
			break;
A
Avi Kivity 已提交
2272
		case 2: /* lgdt */
2273 2274
			rc = read_descriptor(ctxt, ops, c->src.ptr,
					     &size, &address, c->op_bytes);
A
Avi Kivity 已提交
2275 2276 2277
			if (rc)
				goto done;
			realmode_lgdt(ctxt->vcpu, size, address);
2278 2279
			/* Disable writeback. */
			c->dst.type = OP_NONE;
A
Avi Kivity 已提交
2280
			break;
2281
		case 3: /* lidt/vmmcall */
2282 2283 2284 2285 2286 2287 2288 2289 2290 2291
			if (c->modrm_mod == 3) {
				switch (c->modrm_rm) {
				case 1:
					rc = kvm_fix_hypercall(ctxt->vcpu);
					if (rc)
						goto done;
					break;
				default:
					goto cannot_emulate;
				}
2292
			} else {
2293
				rc = read_descriptor(ctxt, ops, c->src.ptr,
2294
						     &size, &address,
2295
						     c->op_bytes);
2296 2297 2298 2299
				if (rc)
					goto done;
				realmode_lidt(ctxt->vcpu, size, address);
			}
2300 2301
			/* Disable writeback. */
			c->dst.type = OP_NONE;
A
Avi Kivity 已提交
2302 2303
			break;
		case 4: /* smsw */
2304 2305
			c->dst.bytes = 2;
			c->dst.val = realmode_get_cr(ctxt->vcpu, 0);
A
Avi Kivity 已提交
2306 2307
			break;
		case 6: /* lmsw */
2308 2309
			realmode_lmsw(ctxt->vcpu, (u16)c->src.val,
				      &ctxt->eflags);
2310
			c->dst.type = OP_NONE;
A
Avi Kivity 已提交
2311 2312
			break;
		case 7: /* invlpg*/
2313
			emulate_invlpg(ctxt->vcpu, memop);
2314 2315
			/* Disable writeback. */
			c->dst.type = OP_NONE;
A
Avi Kivity 已提交
2316 2317 2318 2319 2320
			break;
		default:
			goto cannot_emulate;
		}
		break;
2321
	case 0x05: 		/* syscall */
2322 2323 2324 2325
		if (emulate_syscall(ctxt) == -1)
			goto cannot_emulate;
		else
			goto writeback;
2326
		break;
2327 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343
	case 0x06:
		emulate_clts(ctxt->vcpu);
		c->dst.type = OP_NONE;
		break;
	case 0x08:		/* invd */
	case 0x09:		/* wbinvd */
	case 0x0d:		/* GrpP (prefetch) */
	case 0x18:		/* Grp16 (prefetch/nop) */
		c->dst.type = OP_NONE;
		break;
	case 0x20: /* mov cr, reg */
		if (c->modrm_mod != 3)
			goto cannot_emulate;
		c->regs[c->modrm_rm] =
				realmode_get_cr(ctxt->vcpu, c->modrm_reg);
		c->dst.type = OP_NONE;	/* no writeback */
		break;
A
Avi Kivity 已提交
2344
	case 0x21: /* mov from dr to reg */
2345
		if (c->modrm_mod != 3)
A
Avi Kivity 已提交
2346
			goto cannot_emulate;
2347
		rc = emulator_get_dr(ctxt, c->modrm_reg, &c->regs[c->modrm_rm]);
2348 2349 2350
		if (rc)
			goto cannot_emulate;
		c->dst.type = OP_NONE;	/* no writeback */
A
Avi Kivity 已提交
2351
		break;
2352 2353 2354 2355 2356 2357 2358
	case 0x22: /* mov reg, cr */
		if (c->modrm_mod != 3)
			goto cannot_emulate;
		realmode_set_cr(ctxt->vcpu,
				c->modrm_reg, c->modrm_val, &ctxt->eflags);
		c->dst.type = OP_NONE;
		break;
A
Avi Kivity 已提交
2359
	case 0x23: /* mov from reg to dr */
2360
		if (c->modrm_mod != 3)
A
Avi Kivity 已提交
2361
			goto cannot_emulate;
2362 2363
		rc = emulator_set_dr(ctxt, c->modrm_reg,
				     c->regs[c->modrm_rm]);
2364 2365 2366
		if (rc)
			goto cannot_emulate;
		c->dst.type = OP_NONE;	/* no writeback */
A
Avi Kivity 已提交
2367
		break;
2368 2369 2370 2371 2372 2373
	case 0x30:
		/* wrmsr */
		msr_data = (u32)c->regs[VCPU_REGS_RAX]
			| ((u64)c->regs[VCPU_REGS_RDX] << 32);
		rc = kvm_set_msr(ctxt->vcpu, c->regs[VCPU_REGS_RCX], msr_data);
		if (rc) {
2374
			kvm_inject_gp(ctxt->vcpu, 0);
2375
			c->eip = kvm_rip_read(ctxt->vcpu);
2376 2377 2378 2379 2380 2381 2382 2383
		}
		rc = X86EMUL_CONTINUE;
		c->dst.type = OP_NONE;
		break;
	case 0x32:
		/* rdmsr */
		rc = kvm_get_msr(ctxt->vcpu, c->regs[VCPU_REGS_RCX], &msr_data);
		if (rc) {
2384
			kvm_inject_gp(ctxt->vcpu, 0);
2385
			c->eip = kvm_rip_read(ctxt->vcpu);
2386 2387 2388 2389 2390 2391 2392
		} else {
			c->regs[VCPU_REGS_RAX] = (u32)msr_data;
			c->regs[VCPU_REGS_RDX] = msr_data >> 32;
		}
		rc = X86EMUL_CONTINUE;
		c->dst.type = OP_NONE;
		break;
2393
	case 0x34:		/* sysenter */
2394 2395 2396 2397
		if (emulate_sysenter(ctxt) == -1)
			goto cannot_emulate;
		else
			goto writeback;
2398 2399
		break;
	case 0x35:		/* sysexit */
2400 2401 2402 2403
		if (emulate_sysexit(ctxt) == -1)
			goto cannot_emulate;
		else
			goto writeback;
2404
		break;
A
Avi Kivity 已提交
2405
	case 0x40 ... 0x4f:	/* cmov */
2406
		c->dst.val = c->dst.orig_val = c->src.val;
2407 2408
		if (!test_cc(c->b, ctxt->eflags))
			c->dst.type = OP_NONE; /* no writeback */
A
Avi Kivity 已提交
2409
		break;
2410
	case 0x80 ... 0x8f: /* jnz rel, etc*/
2411
		if (test_cc(c->b, ctxt->eflags))
2412
			jmp_rel(c, c->src.val);
2413 2414
		c->dst.type = OP_NONE;
		break;
2415 2416 2417 2418 2419 2420 2421 2422
	case 0xa0:	  /* push fs */
		emulate_push_sreg(ctxt, VCPU_SREG_FS);
		break;
	case 0xa1:	 /* pop fs */
		rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_FS);
		if (rc != 0)
			goto done;
		break;
2423 2424
	case 0xa3:
	      bt:		/* bt */
Q
Qing He 已提交
2425
		c->dst.type = OP_NONE;
2426 2427
		/* only subword offset */
		c->src.val &= (c->dst.bytes << 3) - 1;
2428
		emulate_2op_SrcV_nobyte("bt", c->src, c->dst, ctxt->eflags);
2429
		break;
2430 2431 2432 2433
	case 0xa4: /* shld imm8, r, r/m */
	case 0xa5: /* shld cl, r, r/m */
		emulate_2op_cl("shld", c->src2, c->src, c->dst, ctxt->eflags);
		break;
2434 2435 2436 2437 2438 2439 2440 2441
	case 0xa8:	/* push gs */
		emulate_push_sreg(ctxt, VCPU_SREG_GS);
		break;
	case 0xa9:	/* pop gs */
		rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_GS);
		if (rc != 0)
			goto done;
		break;
2442 2443
	case 0xab:
	      bts:		/* bts */
2444 2445
		/* only subword offset */
		c->src.val &= (c->dst.bytes << 3) - 1;
2446
		emulate_2op_SrcV_nobyte("bts", c->src, c->dst, ctxt->eflags);
2447
		break;
2448 2449 2450 2451
	case 0xac: /* shrd imm8, r, r/m */
	case 0xad: /* shrd cl, r, r/m */
		emulate_2op_cl("shrd", c->src2, c->src, c->dst, ctxt->eflags);
		break;
2452 2453
	case 0xae:              /* clflush */
		break;
A
Avi Kivity 已提交
2454 2455 2456 2457 2458
	case 0xb0 ... 0xb1:	/* cmpxchg */
		/*
		 * Save real source value, then compare EAX against
		 * destination.
		 */
2459 2460
		c->src.orig_val = c->src.val;
		c->src.val = c->regs[VCPU_REGS_RAX];
2461 2462
		emulate_2op_SrcV("cmp", c->src, c->dst, ctxt->eflags);
		if (ctxt->eflags & EFLG_ZF) {
A
Avi Kivity 已提交
2463
			/* Success: write back to memory. */
2464
			c->dst.val = c->src.orig_val;
A
Avi Kivity 已提交
2465 2466
		} else {
			/* Failure: write the value we saw to EAX. */
2467 2468
			c->dst.type = OP_REG;
			c->dst.ptr = (unsigned long *)&c->regs[VCPU_REGS_RAX];
A
Avi Kivity 已提交
2469 2470 2471 2472
		}
		break;
	case 0xb3:
	      btr:		/* btr */
2473 2474
		/* only subword offset */
		c->src.val &= (c->dst.bytes << 3) - 1;
2475
		emulate_2op_SrcV_nobyte("btr", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
2476 2477
		break;
	case 0xb6 ... 0xb7:	/* movzx */
2478 2479 2480
		c->dst.bytes = c->op_bytes;
		c->dst.val = (c->d & ByteOp) ? (u8) c->src.val
						       : (u16) c->src.val;
A
Avi Kivity 已提交
2481 2482
		break;
	case 0xba:		/* Grp8 */
2483
		switch (c->modrm_reg & 3) {
A
Avi Kivity 已提交
2484 2485 2486 2487 2488 2489 2490 2491 2492 2493
		case 0:
			goto bt;
		case 1:
			goto bts;
		case 2:
			goto btr;
		case 3:
			goto btc;
		}
		break;
2494 2495
	case 0xbb:
	      btc:		/* btc */
2496 2497
		/* only subword offset */
		c->src.val &= (c->dst.bytes << 3) - 1;
2498
		emulate_2op_SrcV_nobyte("btc", c->src, c->dst, ctxt->eflags);
2499
		break;
A
Avi Kivity 已提交
2500
	case 0xbe ... 0xbf:	/* movsx */
2501 2502 2503
		c->dst.bytes = c->op_bytes;
		c->dst.val = (c->d & ByteOp) ? (s8) c->src.val :
							(s16) c->src.val;
A
Avi Kivity 已提交
2504
		break;
2505
	case 0xc3:		/* movnti */
2506 2507 2508
		c->dst.bytes = c->op_bytes;
		c->dst.val = (c->op_bytes == 4) ? (u32) c->src.val :
							(u64) c->src.val;
2509
		break;
A
Avi Kivity 已提交
2510
	case 0xc7:		/* Grp9 (cmpxchg8b) */
2511
		rc = emulate_grp9(ctxt, ops, memop);
2512 2513
		if (rc != 0)
			goto done;
2514
		c->dst.type = OP_NONE;
2515
		break;
A
Avi Kivity 已提交
2516 2517 2518 2519
	}
	goto writeback;

cannot_emulate:
2520
	DPRINTF("Cannot emulate %02x\n", c->b);
2521
	c->eip = saved_eip;
A
Avi Kivity 已提交
2522 2523
	return -1;
}