cx24116.c 39.5 KB
Newer Older
1 2 3 4
/*
    Conexant cx24116/cx24118 - DVBS/S2 Satellite demod/tuner driver

    Copyright (C) 2006-2008 Steven Toth <stoth@hauppauge.com>
5 6 7 8 9 10 11 12 13 14 15
    Copyright (C) 2006-2007 Georg Acher
    Copyright (C) 2007-2008 Darron Broad
	March 2007
	    Fixed some bugs.
	    Added diseqc support.
	    Added corrected signal strength support.
	August 2007
	    Sync with legacy version.
	    Some clean ups.
    Copyright (C) 2008 Igor Liplianin
	September, 9th 2008
16 17
	    Fixed locking on high symbol rates (>30000).
	    Implement MPEG initialization parameter.
18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

#include <linux/slab.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/firmware.h>

#include "dvb_frontend.h"
#include "cx24116.h"

44 45 46 47
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");

48 49
#define dprintk(args...) \
	do { \
50
		if (debug) \
51
			printk(KERN_INFO "cx24116: " args); \
52 53
	} while (0)

54 55 56
#define CX24116_DEFAULT_FIRMWARE "dvb-fe-cx24116.fw"
#define CX24116_SEARCH_RANGE_KHZ 5000

57 58 59 60 61 62 63
/* known registers */
#define CX24116_REG_COMMAND (0x00)      /* command args 0x00..0x1e */
#define CX24116_REG_EXECUTE (0x1f)      /* execute command */
#define CX24116_REG_MAILBOX (0x96)      /* FW or multipurpose mailbox? */
#define CX24116_REG_RESET   (0x20)      /* reset status > 0     */
#define CX24116_REG_SIGNAL  (0x9e)      /* signal low           */
#define CX24116_REG_SSTATUS (0x9d)      /* signal high / status */
64
#define CX24116_REG_QUALITY8 (0xa3)
65
#define CX24116_REG_QSTATUS (0xbc)
66
#define CX24116_REG_QUALITY0 (0xd5)
67 68 69 70 71 72 73 74
#define CX24116_REG_BER0    (0xc9)
#define CX24116_REG_BER8    (0xc8)
#define CX24116_REG_BER16   (0xc7)
#define CX24116_REG_BER24   (0xc6)
#define CX24116_REG_UCB0    (0xcb)
#define CX24116_REG_UCB8    (0xca)
#define CX24116_REG_CLKDIV  (0xf3)
#define CX24116_REG_RATEDIV (0xf9)
75 76 77

/* configured fec (not tuned) or actual FEC (tuned) 1=1/2 2=2/3 etc */
#define CX24116_REG_FECSTATUS (0x9c)
78 79

/* FECSTATUS bits */
80 81 82 83 84
/* mask to determine configured fec (not tuned) or actual fec (tuned) */
#define CX24116_FEC_FECMASK   (0x1f)

/* Select DVB-S demodulator, else DVB-S2 */
#define CX24116_FEC_DVBS      (0x20)
85
#define CX24116_FEC_UNKNOWN   (0x40)    /* Unknown/unused */
86 87 88

/* Pilot mode requested when tuning else always reset when tuned */
#define CX24116_FEC_PILOT     (0x80)
89 90 91 92

/* arg buffer size */
#define CX24116_ARGLEN (0x1e)

93 94 95 96 97 98
/* rolloff */
#define CX24116_ROLLOFF_020 (0x00)
#define CX24116_ROLLOFF_025 (0x01)
#define CX24116_ROLLOFF_035 (0x02)

/* pilot bit */
99 100
#define CX24116_PILOT_OFF (0x00)
#define CX24116_PILOT_ON (0x40)
101 102 103 104 105 106 107 108

/* signal status */
#define CX24116_HAS_SIGNAL   (0x01)
#define CX24116_HAS_CARRIER  (0x02)
#define CX24116_HAS_VITERBI  (0x04)
#define CX24116_HAS_SYNCLOCK (0x08)
#define CX24116_HAS_UNKNOWN1 (0x10)
#define CX24116_HAS_UNKNOWN2 (0x20)
109
#define CX24116_STATUS_MASK  (0x0f)
110 111 112 113 114 115
#define CX24116_SIGNAL_MASK  (0xc0)

#define CX24116_DISEQC_TONEOFF   (0)    /* toneburst never sent */
#define CX24116_DISEQC_TONECACHE (1)    /* toneburst cached     */
#define CX24116_DISEQC_MESGCACHE (2)    /* message cached       */

116 117 118 119 120 121 122 123 124 125 126 127
/* arg offset for DiSEqC */
#define CX24116_DISEQC_BURST  (1)
#define CX24116_DISEQC_ARG2_2 (2)   /* unknown value=2 */
#define CX24116_DISEQC_ARG3_0 (3)   /* unknown value=0 */
#define CX24116_DISEQC_ARG4_0 (4)   /* unknown value=0 */
#define CX24116_DISEQC_MSGLEN (5)
#define CX24116_DISEQC_MSGOFS (6)

/* DiSEqC burst */
#define CX24116_DISEQC_MINI_A (0)
#define CX24116_DISEQC_MINI_B (1)

128 129
/* DiSEqC tone burst */
static int toneburst = 1;
130
module_param(toneburst, int, 0644);
131 132
MODULE_PARM_DESC(toneburst, "DiSEqC toneburst 0=OFF, 1=TONE CACHE, "\
	"2=MESSAGE CACHE (default:1)");
133

134
/* SNR measurements */
135 136
static int esno_snr;
module_param(esno_snr, int, 0644);
137 138
MODULE_PARM_DESC(debug, "SNR return units, 0=PERCENTAGE 0-100, "\
	"1=ESNO(db * 10) (default:0)");
139

140
enum cmds {
141
	CMD_SET_VCO     = 0x10,
142
	CMD_TUNEREQUEST = 0x11,
143 144 145 146 147 148
	CMD_MPEGCONFIG  = 0x13,
	CMD_TUNERINIT   = 0x14,
	CMD_BANDWIDTH   = 0x15,
	CMD_GETAGC      = 0x19,
	CMD_LNBCONFIG   = 0x20,
	CMD_LNBSEND     = 0x21, /* Formerly CMD_SEND_DISEQC */
149 150
	CMD_SET_TONEPRE = 0x22,
	CMD_SET_TONE    = 0x23,
151 152 153
	CMD_UPDFWVERS   = 0x35,
	CMD_TUNERSLEEP  = 0x36,
	CMD_AGCCONTROL  = 0x3b, /* Unknown */
154 155 156
};

/* The Demod/Tuner can't easily provide these, we cache them */
157
struct cx24116_tuning {
158 159 160 161 162
	u32 frequency;
	u32 symbol_rate;
	fe_spectral_inversion_t inversion;
	fe_code_rate_t fec;

163
	fe_delivery_system_t delsys;
164
	fe_modulation_t modulation;
165 166
	fe_pilot_t pilot;
	fe_rolloff_t rolloff;
167 168 169 170 171

	/* Demod values */
	u8 fec_val;
	u8 fec_mask;
	u8 inversion_val;
172
	u8 pilot_val;
173
	u8 rolloff_val;
174 175 176
};

/* Basic commands that are sent to the firmware */
177
struct cx24116_cmd {
178 179 180 181
	u8 len;
	u8 args[CX24116_ARGLEN];
};

182 183 184
struct cx24116_state {
	struct i2c_adapter *i2c;
	const struct cx24116_config *config;
185 186 187 188 189 190 191 192

	struct dvb_frontend frontend;

	struct cx24116_tuning dcur;
	struct cx24116_tuning dnxt;

	u8 skip_fw_load;
	u8 burst;
193
	struct cx24116_cmd dsec_cmd;
194 195
};

196
static int cx24116_writereg(struct cx24116_state *state, int reg, int data)
197 198 199 200 201 202
{
	u8 buf[] = { reg, data };
	struct i2c_msg msg = { .addr = state->config->demod_address,
		.flags = 0, .buf = buf, .len = 2 };
	int err;

203
	if (debug > 1)
204
		printk("cx24116: %s: write reg 0x%02x, value 0x%02x\n",
205
			__func__, reg, data);
206

207 208
	err = i2c_transfer(state->i2c, &msg, 1);
	if (err != 1) {
209
		printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x,"
210 211 212 213 214 215 216 217
			 " value == 0x%02x)\n", __func__, err, reg, data);
		return -EREMOTEIO;
	}

	return 0;
}

/* Bulk byte writes to a single I2C address, for 32k firmware load */
218
static int cx24116_writeregN(struct cx24116_state *state, int reg,
219
			     const u8 *data, u16 len)
220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239
{
	int ret = -EREMOTEIO;
	struct i2c_msg msg;
	u8 *buf;

	buf = kmalloc(len + 1, GFP_KERNEL);
	if (buf == NULL) {
		printk("Unable to kmalloc\n");
		ret = -ENOMEM;
		goto error;
	}

	*(buf) = reg;
	memcpy(buf + 1, data, len);

	msg.addr = state->config->demod_address;
	msg.flags = 0;
	msg.buf = buf;
	msg.len = len + 1;

240
	if (debug > 1)
241
		printk(KERN_INFO "cx24116: %s:  write regN 0x%02x, len = %d\n",
242
			__func__, reg, len);
243

244 245
	ret = i2c_transfer(state->i2c, &msg, 1);
	if (ret != 1) {
246
		printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x\n",
247 248 249 250 251 252 253 254 255 256
			 __func__, ret, reg);
		ret = -EREMOTEIO;
	}

error:
	kfree(buf);

	return ret;
}

257
static int cx24116_readreg(struct cx24116_state *state, u8 reg)
258 259 260 261 262
{
	int ret;
	u8 b0[] = { reg };
	u8 b1[] = { 0 };
	struct i2c_msg msg[] = {
263 264 265 266
		{ .addr = state->config->demod_address, .flags = 0,
			.buf = b0, .len = 1 },
		{ .addr = state->config->demod_address, .flags = I2C_M_RD,
			.buf = b1, .len = 1 }
267 268 269 270 271
	};

	ret = i2c_transfer(state->i2c, msg, 2);

	if (ret != 2) {
272 273
		printk(KERN_ERR "%s: reg=0x%x (error=%d)\n",
			__func__, reg, ret);
274 275 276
		return ret;
	}

277
	if (debug > 1)
278
		printk(KERN_INFO "cx24116: read reg 0x%02x, value 0x%02x\n",
279
			reg, b1[0]);
280 281 282 283

	return b1[0];
}

284 285
static int cx24116_set_inversion(struct cx24116_state *state,
	fe_spectral_inversion_t inversion)
286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307
{
	dprintk("%s(%d)\n", __func__, inversion);

	switch (inversion) {
	case INVERSION_OFF:
		state->dnxt.inversion_val = 0x00;
		break;
	case INVERSION_ON:
		state->dnxt.inversion_val = 0x04;
		break;
	case INVERSION_AUTO:
		state->dnxt.inversion_val = 0x0C;
		break;
	default:
		return -EINVAL;
	}

	state->dnxt.inversion = inversion;

	return 0;
}

308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332
/*
 * modfec (modulation and FEC)
 * ===========================
 *
 * MOD          FEC             mask/val    standard
 * ----         --------        ----------- --------
 * QPSK         FEC_1_2         0x02 0x02+X DVB-S
 * QPSK         FEC_2_3         0x04 0x02+X DVB-S
 * QPSK         FEC_3_4         0x08 0x02+X DVB-S
 * QPSK         FEC_4_5         0x10 0x02+X DVB-S (?)
 * QPSK         FEC_5_6         0x20 0x02+X DVB-S
 * QPSK         FEC_6_7         0x40 0x02+X DVB-S
 * QPSK         FEC_7_8         0x80 0x02+X DVB-S
 * QPSK         FEC_8_9         0x01 0x02+X DVB-S (?) (NOT SUPPORTED?)
 * QPSK         AUTO            0xff 0x02+X DVB-S
 *
 * For DVB-S high byte probably represents FEC
 * and low byte selects the modulator. The high
 * byte is search range mask. Bit 5 may turn
 * on DVB-S and remaining bits represent some
 * kind of calibration (how/what i do not know).
 *
 * Eg.(2/3) szap "Zone Horror"
 *
 * mask/val = 0x04, 0x20
333
 * status 1f | signal c3c0 | snr a333 | ber 00000098 | unc 0 | FE_HAS_LOCK
334 335
 *
 * mask/val = 0x04, 0x30
336
 * status 1f | signal c3c0 | snr a333 | ber 00000000 | unc 0 | FE_HAS_LOCK
337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367
 *
 * After tuning FECSTATUS contains actual FEC
 * in use numbered 1 through to 8 for 1/2 .. 2/3 etc
 *
 * NBC=NOT/NON BACKWARD COMPATIBLE WITH DVB-S (DVB-S2 only)
 *
 * NBC-QPSK     FEC_1_2         0x00, 0x04      DVB-S2
 * NBC-QPSK     FEC_3_5         0x00, 0x05      DVB-S2
 * NBC-QPSK     FEC_2_3         0x00, 0x06      DVB-S2
 * NBC-QPSK     FEC_3_4         0x00, 0x07      DVB-S2
 * NBC-QPSK     FEC_4_5         0x00, 0x08      DVB-S2
 * NBC-QPSK     FEC_5_6         0x00, 0x09      DVB-S2
 * NBC-QPSK     FEC_8_9         0x00, 0x0a      DVB-S2
 * NBC-QPSK     FEC_9_10        0x00, 0x0b      DVB-S2
 *
 * NBC-8PSK     FEC_3_5         0x00, 0x0c      DVB-S2
 * NBC-8PSK     FEC_2_3         0x00, 0x0d      DVB-S2
 * NBC-8PSK     FEC_3_4         0x00, 0x0e      DVB-S2
 * NBC-8PSK     FEC_5_6         0x00, 0x0f      DVB-S2
 * NBC-8PSK     FEC_8_9         0x00, 0x10      DVB-S2
 * NBC-8PSK     FEC_9_10        0x00, 0x11      DVB-S2
 *
 * For DVB-S2 low bytes selects both modulator
 * and FEC. High byte is meaningless here. To
 * set pilot, bit 6 (0x40) is set. When inspecting
 * FECSTATUS bit 7 (0x80) represents the pilot
 * selection whilst not tuned. When tuned, actual FEC
 * in use is found in FECSTATUS as per above. Pilot
 * value is reset.
 */

368 369 370 371 372
/* A table of modulation, fec and configuration bytes for the demod.
 * Not all S2 mmodulation schemes are support and not all rates with
 * a scheme are support. Especially, no auto detect when in S2 mode.
 */
struct cx24116_modfec {
373
	fe_delivery_system_t delivery_system;
374 375 376 377 378 379
	fe_modulation_t modulation;
	fe_code_rate_t fec;
	u8 mask;	/* In DVBS mode this is used to autodetect */
	u8 val;		/* Passed to the firmware to indicate mode selection */
} CX24116_MODFEC_MODES[] = {
 /* QPSK. For unknown rates we set hardware to auto detect 0xfe 0x30 */
380 381

 /*mod   fec       mask  val */
382 383 384 385 386 387 388 389 390 391
 { SYS_DVBS, QPSK, FEC_NONE, 0xfe, 0x30 },
 { SYS_DVBS, QPSK, FEC_1_2,  0x02, 0x2e }, /* 00000010 00101110 */
 { SYS_DVBS, QPSK, FEC_2_3,  0x04, 0x2f }, /* 00000100 00101111 */
 { SYS_DVBS, QPSK, FEC_3_4,  0x08, 0x30 }, /* 00001000 00110000 */
 { SYS_DVBS, QPSK, FEC_4_5,  0xfe, 0x30 }, /* 000?0000 ?        */
 { SYS_DVBS, QPSK, FEC_5_6,  0x20, 0x31 }, /* 00100000 00110001 */
 { SYS_DVBS, QPSK, FEC_6_7,  0xfe, 0x30 }, /* 0?000000 ?        */
 { SYS_DVBS, QPSK, FEC_7_8,  0x80, 0x32 }, /* 10000000 00110010 */
 { SYS_DVBS, QPSK, FEC_8_9,  0xfe, 0x30 }, /* 0000000? ?        */
 { SYS_DVBS, QPSK, FEC_AUTO, 0xfe, 0x30 },
392
 /* NBC-QPSK */
393 394 395 396 397 398 399 400
 { SYS_DVBS2, QPSK, FEC_1_2,  0x00, 0x04 },
 { SYS_DVBS2, QPSK, FEC_3_5,  0x00, 0x05 },
 { SYS_DVBS2, QPSK, FEC_2_3,  0x00, 0x06 },
 { SYS_DVBS2, QPSK, FEC_3_4,  0x00, 0x07 },
 { SYS_DVBS2, QPSK, FEC_4_5,  0x00, 0x08 },
 { SYS_DVBS2, QPSK, FEC_5_6,  0x00, 0x09 },
 { SYS_DVBS2, QPSK, FEC_8_9,  0x00, 0x0a },
 { SYS_DVBS2, QPSK, FEC_9_10, 0x00, 0x0b },
401
 /* 8PSK */
402 403 404 405 406 407
 { SYS_DVBS2, PSK_8, FEC_3_5,  0x00, 0x0c },
 { SYS_DVBS2, PSK_8, FEC_2_3,  0x00, 0x0d },
 { SYS_DVBS2, PSK_8, FEC_3_4,  0x00, 0x0e },
 { SYS_DVBS2, PSK_8, FEC_5_6,  0x00, 0x0f },
 { SYS_DVBS2, PSK_8, FEC_8_9,  0x00, 0x10 },
 { SYS_DVBS2, PSK_8, FEC_9_10, 0x00, 0x11 },
408 409 410 411
 /*
  * `val' can be found in the FECSTATUS register when tuning.
  * FECSTATUS will give the actual FEC in use if tuning was successful.
  */
412 413
};

414
static int cx24116_lookup_fecmod(struct cx24116_state *state,
415
	fe_delivery_system_t d, fe_modulation_t m, fe_code_rate_t f)
416 417 418
{
	int i, ret = -EOPNOTSUPP;

419 420
	dprintk("%s(0x%02x,0x%02x)\n", __func__, m, f);

421
	for (i = 0; i < ARRAY_SIZE(CX24116_MODFEC_MODES); i++) {
422 423
		if ((d == CX24116_MODFEC_MODES[i].delivery_system) &&
			(m == CX24116_MODFEC_MODES[i].modulation) &&
424
			(f == CX24116_MODFEC_MODES[i].fec)) {
425 426 427 428 429 430 431 432
				ret = i;
				break;
			}
	}

	return ret;
}

433
static int cx24116_set_fec(struct cx24116_state *state,
434
	fe_delivery_system_t delsys, fe_modulation_t mod, fe_code_rate_t fec)
435 436
{
	int ret = 0;
437 438

	dprintk("%s(0x%02x,0x%02x)\n", __func__, mod, fec);
439

440
	ret = cx24116_lookup_fecmod(state, delsys, mod, fec);
441

442
	if (ret < 0)
443 444
		return ret;

445
	state->dnxt.fec = fec;
446 447
	state->dnxt.fec_val = CX24116_MODFEC_MODES[ret].val;
	state->dnxt.fec_mask = CX24116_MODFEC_MODES[ret].mask;
448 449
	dprintk("%s() mask/val = 0x%02x/0x%02x\n", __func__,
		state->dnxt.fec_mask, state->dnxt.fec_val);
450 451 452 453

	return 0;
}

454
static int cx24116_set_symbolrate(struct cx24116_state *state, u32 rate)
455
{
456
	dprintk("%s(%d)\n", __func__, rate);
457

458 459 460 461 462 463
	/*  check if symbol rate is within limits */
	if ((rate > state->frontend.ops.info.symbol_rate_max) ||
	    (rate < state->frontend.ops.info.symbol_rate_min)) {
		dprintk("%s() unsupported symbol_rate = %d\n", __func__, rate);
		return -EOPNOTSUPP;
	}
464 465

	state->dnxt.symbol_rate = rate;
466
	dprintk("%s() symbol_rate = %d\n", __func__, rate);
467

468
	return 0;
469 470
}

471 472
static int cx24116_load_firmware(struct dvb_frontend *fe,
	const struct firmware *fw);
473

474
static int cx24116_firmware_ondemand(struct dvb_frontend *fe)
475 476 477 478 479
{
	struct cx24116_state *state = fe->demodulator_priv;
	const struct firmware *fw;
	int ret = 0;

480
	dprintk("%s()\n", __func__);
481

482
	if (cx24116_readreg(state, 0x20) > 0) {
483 484 485 486 487

		if (state->skip_fw_load)
			return 0;

		/* Load firmware */
488 489 490 491 492 493 494
		/* request the firmware, this will block until loaded */
		printk(KERN_INFO "%s: Waiting for firmware upload (%s)...\n",
			__func__, CX24116_DEFAULT_FIRMWARE);
		ret = request_firmware(&fw, CX24116_DEFAULT_FIRMWARE,
			&state->i2c->dev);
		printk(KERN_INFO "%s: Waiting for firmware upload(2)...\n",
			__func__);
495
		if (ret) {
496 497
			printk(KERN_ERR "%s: No firmware uploaded "
				"(timeout or file not found?)\n", __func__);
498 499 500
			return ret;
		}

501 502
		/* Make sure we don't recurse back through here
		 * during loading */
503 504 505 506
		state->skip_fw_load = 1;

		ret = cx24116_load_firmware(fe, fw);
		if (ret)
507 508
			printk(KERN_ERR "%s: Writing firmware to device failed\n",
				__func__);
509 510 511

		release_firmware(fw);

512 513
		printk(KERN_INFO "%s: Firmware upload %s\n", __func__,
			ret == 0 ? "complete" : "failed");
514 515 516 517 518 519 520 521

		/* Ensure firmware is always loaded if required */
		state->skip_fw_load = 0;
	}

	return ret;
}

522 523 524
/* Take a basic firmware command structure, format it
 * and forward it for processing
 */
525
static int cx24116_cmd_execute(struct dvb_frontend *fe, struct cx24116_cmd *cmd)
526 527 528 529 530 531 532
{
	struct cx24116_state *state = fe->demodulator_priv;
	int i, ret;

	dprintk("%s()\n", __func__);

	/* Load the firmware if required */
533 534
	ret = cx24116_firmware_ondemand(fe);
	if (ret != 0) {
535 536
		printk(KERN_ERR "%s(): Unable initialise the firmware\n",
			__func__);
537 538 539 540
		return ret;
	}

	/* Write the command */
541
	for (i = 0; i < cmd->len ; i++) {
542 543 544 545 546
		dprintk("%s: 0x%02x == 0x%02x\n", __func__, i, cmd->args[i]);
		cx24116_writereg(state, i, cmd->args[i]);
	}

	/* Start execution and wait for cmd to terminate */
547
	cx24116_writereg(state, CX24116_REG_EXECUTE, 0x01);
548
	while (cx24116_readreg(state, CX24116_REG_EXECUTE)) {
549
		msleep(10);
550
		if (i++ > 64) {
551 552 553 554
			/* Avoid looping forever if the firmware does
				not respond */
			printk(KERN_WARNING "%s() Firmware not responding\n",
				__func__);
555 556 557 558 559 560
			return -EREMOTEIO;
		}
	}
	return 0;
}

561 562
static int cx24116_load_firmware(struct dvb_frontend *fe,
	const struct firmware *fw)
563
{
564
	struct cx24116_state *state = fe->demodulator_priv;
565
	struct cx24116_cmd cmd;
566 567
	int i, ret;
	unsigned char vers[4];
568 569

	dprintk("%s\n", __func__);
570 571 572 573 574 575
	dprintk("Firmware is %zu bytes (%02x %02x .. %02x %02x)\n",
			fw->size,
			fw->data[0],
			fw->data[1],
			fw->data[fw->size-2],
			fw->data[fw->size-1]);
576 577 578 579 580 581 582

	/* Toggle 88x SRST pin to reset demod */
	if (state->config->reset_device)
		state->config->reset_device(fe);

	/* Begin the firmware load process */
	/* Prepare the demod, load the firmware, cleanup after load */
583 584 585

	/* Init PLL */
	cx24116_writereg(state, 0xE5, 0x00);
586
	cx24116_writereg(state, 0xF1, 0x08);
587 588 589 590 591 592 593 594 595
	cx24116_writereg(state, 0xF2, 0x13);

	/* Start PLL */
	cx24116_writereg(state, 0xe0, 0x03);
	cx24116_writereg(state, 0xe0, 0x00);

	/* Unknown */
	cx24116_writereg(state, CX24116_REG_CLKDIV, 0x46);
	cx24116_writereg(state, CX24116_REG_RATEDIV, 0x00);
596

597
	/* Unknown */
598 599 600 601 602 603 604 605 606 607 608 609
	cx24116_writereg(state, 0xF0, 0x03);
	cx24116_writereg(state, 0xF4, 0x81);
	cx24116_writereg(state, 0xF5, 0x00);
	cx24116_writereg(state, 0xF6, 0x00);

	/* write the entire firmware as one transaction */
	cx24116_writeregN(state, 0xF7, fw->data, fw->size);

	cx24116_writereg(state, 0xF4, 0x10);
	cx24116_writereg(state, 0xF0, 0x00);
	cx24116_writereg(state, 0xF8, 0x06);

610 611
	/* Firmware CMD 10: VCO config */
	cmd.args[0x00] = CMD_SET_VCO;
612 613 614 615 616 617 618 619 620
	cmd.args[0x01] = 0x05;
	cmd.args[0x02] = 0xdc;
	cmd.args[0x03] = 0xda;
	cmd.args[0x04] = 0xae;
	cmd.args[0x05] = 0xaa;
	cmd.args[0x06] = 0x04;
	cmd.args[0x07] = 0x9d;
	cmd.args[0x08] = 0xfc;
	cmd.args[0x09] = 0x06;
621
	cmd.len = 0x0a;
622 623 624 625
	ret = cx24116_cmd_execute(fe, &cmd);
	if (ret != 0)
		return ret;

626
	cx24116_writereg(state, CX24116_REG_SSTATUS, 0x00);
627

628 629
	/* Firmware CMD 14: Tuner config */
	cmd.args[0x00] = CMD_TUNERINIT;
630 631
	cmd.args[0x01] = 0x00;
	cmd.args[0x02] = 0x00;
632
	cmd.len = 0x03;
633 634 635 636 637 638
	ret = cx24116_cmd_execute(fe, &cmd);
	if (ret != 0)
		return ret;

	cx24116_writereg(state, 0xe5, 0x00);

639 640
	/* Firmware CMD 13: MPEG config */
	cmd.args[0x00] = CMD_MPEGCONFIG;
641 642 643
	cmd.args[0x01] = 0x01;
	cmd.args[0x02] = 0x75;
	cmd.args[0x03] = 0x00;
644 645 646 647
	if (state->config->mpg_clk_pos_pol)
		cmd.args[0x04] = state->config->mpg_clk_pos_pol;
	else
		cmd.args[0x04] = 0x02;
648
	cmd.args[0x05] = 0x00;
649
	cmd.len = 0x06;
650 651 652 653
	ret = cx24116_cmd_execute(fe, &cmd);
	if (ret != 0)
		return ret;

654 655
	/* Firmware CMD 35: Get firmware version */
	cmd.args[0x00] = CMD_UPDFWVERS;
656 657
	cmd.len = 0x02;
	for (i = 0; i < 4; i++) {
658 659 660 661
		cmd.args[0x01] = i;
		ret = cx24116_cmd_execute(fe, &cmd);
		if (ret != 0)
			return ret;
662
		vers[i] = cx24116_readreg(state, CX24116_REG_MAILBOX);
663
	}
664
	printk(KERN_INFO "%s: FW version %i.%i.%i.%i\n", __func__,
665 666
		vers[0], vers[1], vers[2], vers[3]);

667 668 669
	return 0;
}

670 671
static int cx24116_set_voltage(struct dvb_frontend *fe,
	fe_sec_voltage_t voltage)
672 673
{
	/* The isl6421 module will override this function in the fops. */
674 675
	dprintk("%s() This should never appear if the isl6421 module "
		"is loaded correctly\n", __func__);
676 677 678 679

	return -EOPNOTSUPP;
}

680
static int cx24116_read_status(struct dvb_frontend *fe, fe_status_t *status)
681 682 683
{
	struct cx24116_state *state = fe->demodulator_priv;

684 685
	int lock = cx24116_readreg(state, CX24116_REG_SSTATUS) &
		CX24116_STATUS_MASK;
686 687 688 689 690

	dprintk("%s: status = 0x%02x\n", __func__, lock);

	*status = 0;

691
	if (lock & CX24116_HAS_SIGNAL)
692
		*status |= FE_HAS_SIGNAL;
693
	if (lock & CX24116_HAS_CARRIER)
694
		*status |= FE_HAS_CARRIER;
695
	if (lock & CX24116_HAS_VITERBI)
696
		*status |= FE_HAS_VITERBI;
697
	if (lock & CX24116_HAS_SYNCLOCK)
698 699 700 701 702
		*status |= FE_HAS_SYNC | FE_HAS_LOCK;

	return 0;
}

703
static int cx24116_read_ber(struct dvb_frontend *fe, u32 *ber)
704
{
705 706
	struct cx24116_state *state = fe->demodulator_priv;

707
	dprintk("%s()\n", __func__);
708

709 710 711 712
	*ber =  (cx24116_readreg(state, CX24116_REG_BER24) << 24) |
		(cx24116_readreg(state, CX24116_REG_BER16) << 16) |
		(cx24116_readreg(state, CX24116_REG_BER8)  << 8)  |
		 cx24116_readreg(state, CX24116_REG_BER0);
713 714 715 716

	return 0;
}

717
/* TODO Determine function and scale appropriately */
718 719
static int cx24116_read_signal_strength(struct dvb_frontend *fe,
	u16 *signal_strength)
720 721
{
	struct cx24116_state *state = fe->demodulator_priv;
722 723 724
	struct cx24116_cmd cmd;
	int ret;
	u16 sig_reading;
725 726 727

	dprintk("%s()\n", __func__);

728 729
	/* Firmware CMD 19: Get AGC */
	cmd.args[0x00] = CMD_GETAGC;
730
	cmd.len = 0x01;
731 732 733
	ret = cx24116_cmd_execute(fe, &cmd);
	if (ret != 0)
		return ret;
734

735 736 737 738 739
	sig_reading =
		(cx24116_readreg(state,
			CX24116_REG_SSTATUS) & CX24116_SIGNAL_MASK) |
		(cx24116_readreg(state, CX24116_REG_SIGNAL) << 6);
	*signal_strength = 0 - sig_reading;
740

741 742
	dprintk("%s: raw / cooked = 0x%04x / 0x%04x\n",
		__func__, sig_reading, *signal_strength);
743 744 745 746

	return 0;
}

747
/* SNR (0..100)% = (sig & 0xf0) * 10 + (sig & 0x0f) * 10 / 16 */
748
static int cx24116_read_snr_pct(struct dvb_frontend *fe, u16 *snr)
749
{
750 751 752
	struct cx24116_state *state = fe->demodulator_priv;
	u8 snr_reading;
	static const u32 snr_tab[] = { /* 10 x Table (rounded up) */
753 754 755 756
		0x00000, 0x0199A, 0x03333, 0x04ccD, 0x06667,
		0x08000, 0x0999A, 0x0b333, 0x0cccD, 0x0e667,
		0x10000, 0x1199A, 0x13333, 0x14ccD, 0x16667,
		0x18000 };
757

758
	dprintk("%s()\n", __func__);
759

760
	snr_reading = cx24116_readreg(state, CX24116_REG_QUALITY0);
761

762
	if (snr_reading >= 0xa0 /* 100% */)
763 764
		*snr = 0xffff;
	else
765 766
		*snr = snr_tab[(snr_reading & 0xf0) >> 4] +
			(snr_tab[(snr_reading & 0x0f)] >> 4);
767 768 769

	dprintk("%s: raw / cooked = 0x%02x / 0x%04x\n", __func__,
		snr_reading, *snr);
770 771 772 773

	return 0;
}

774 775 776 777
/* The reelbox patches show the value in the registers represents
 * ESNO, from 0->30db (values 0->300). We provide this value by
 * default.
 */
778
static int cx24116_read_snr_esno(struct dvb_frontend *fe, u16 *snr)
779 780 781 782 783 784 785 786 787 788 789 790 791
{
	struct cx24116_state *state = fe->demodulator_priv;

	dprintk("%s()\n", __func__);

	*snr = cx24116_readreg(state, CX24116_REG_QUALITY8) << 8 |
		cx24116_readreg(state, CX24116_REG_QUALITY0);

	dprintk("%s: raw 0x%04x\n", __func__, *snr);

	return 0;
}

792
static int cx24116_read_snr(struct dvb_frontend *fe, u16 *snr)
793 794 795 796 797 798 799
{
	if (esno_snr == 1)
		return cx24116_read_snr_esno(fe, snr);
	else
		return cx24116_read_snr_pct(fe, snr);
}

800
static int cx24116_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
801
{
802 803
	struct cx24116_state *state = fe->demodulator_priv;

804
	dprintk("%s()\n", __func__);
805

806
	*ucblocks = (cx24116_readreg(state, CX24116_REG_UCB8) << 8) |
807
		cx24116_readreg(state, CX24116_REG_UCB0);
808 809 810 811 812

	return 0;
}

/* Overwrite the current tuning params, we are about to tune */
813
static void cx24116_clone_params(struct dvb_frontend *fe)
814 815 816 817 818
{
	struct cx24116_state *state = fe->demodulator_priv;
	memcpy(&state->dcur, &state->dnxt, sizeof(state->dcur));
}

819
/* Wait for LNB */
820
static int cx24116_wait_for_lnb(struct dvb_frontend *fe)
821 822 823 824 825 826 827 828
{
	struct cx24116_state *state = fe->demodulator_priv;
	int i;

	dprintk("%s() qstatus = 0x%02x\n", __func__,
		cx24116_readreg(state, CX24116_REG_QSTATUS));

	/* Wait for up to 300 ms */
829
	for (i = 0; i < 30 ; i++) {
830 831 832 833 834 835 836 837 838 839
		if (cx24116_readreg(state, CX24116_REG_QSTATUS) & 0x20)
			return 0;
		msleep(10);
	}

	dprintk("%s(): LNB not ready\n", __func__);

	return -ETIMEDOUT; /* -EBUSY ? */
}

840 841
static int cx24116_set_tone(struct dvb_frontend *fe,
	fe_sec_tone_mode_t tone)
842 843 844 845 846
{
	struct cx24116_cmd cmd;
	int ret;

	dprintk("%s(%d)\n", __func__, tone);
847
	if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) {
848
		printk(KERN_ERR "%s: Invalid, tone=%d\n", __func__, tone);
849 850 851
		return -EINVAL;
	}

852 853
	/* Wait for LNB ready */
	ret = cx24116_wait_for_lnb(fe);
854
	if (ret != 0)
855 856 857 858 859
		return ret;

	/* Min delay time after DiSEqC send */
	msleep(15); /* XXX determine is FW does this, see send_diseqc/burst */

860 861 862
	/* This is always done before the tone is set */
	cmd.args[0x00] = CMD_SET_TONEPRE;
	cmd.args[0x01] = 0x00;
863
	cmd.len = 0x02;
864 865 866 867 868 869 870 871 872 873 874 875 876 877 878
	ret = cx24116_cmd_execute(fe, &cmd);
	if (ret != 0)
		return ret;

	/* Now we set the tone */
	cmd.args[0x00] = CMD_SET_TONE;
	cmd.args[0x01] = 0x00;
	cmd.args[0x02] = 0x00;

	switch (tone) {
	case SEC_TONE_ON:
		dprintk("%s: setting tone on\n", __func__);
		cmd.args[0x03] = 0x01;
		break;
	case SEC_TONE_OFF:
879
		dprintk("%s: setting tone off\n", __func__);
880 881 882
		cmd.args[0x03] = 0x00;
		break;
	}
883
	cmd.len = 0x04;
884

885 886 887
	/* Min delay time before DiSEqC send */
	msleep(15); /* XXX determine is FW does this, see send_diseqc/burst */

888 889 890 891
	return cx24116_cmd_execute(fe, &cmd);
}

/* Initialise DiSEqC */
892
static int cx24116_diseqc_init(struct dvb_frontend *fe)
893 894
{
	struct cx24116_state *state = fe->demodulator_priv;
895 896 897 898 899 900 901 902 903 904 905 906
	struct cx24116_cmd cmd;
	int ret;

	/* Firmware CMD 20: LNB/DiSEqC config */
	cmd.args[0x00] = CMD_LNBCONFIG;
	cmd.args[0x01] = 0x00;
	cmd.args[0x02] = 0x10;
	cmd.args[0x03] = 0x00;
	cmd.args[0x04] = 0x8f;
	cmd.args[0x05] = 0x28;
	cmd.args[0x06] = (toneburst == CX24116_DISEQC_TONEOFF) ? 0x00 : 0x01;
	cmd.args[0x07] = 0x01;
907
	cmd.len = 0x08;
908 909 910 911 912 913 914 915 916 917 918 919 920
	ret = cx24116_cmd_execute(fe, &cmd);
	if (ret != 0)
		return ret;

	/* Prepare a DiSEqC command */
	state->dsec_cmd.args[0x00] = CMD_LNBSEND;

	/* DiSEqC burst */
	state->dsec_cmd.args[CX24116_DISEQC_BURST]  = CX24116_DISEQC_MINI_A;

	/* Unknown */
	state->dsec_cmd.args[CX24116_DISEQC_ARG2_2] = 0x02;
	state->dsec_cmd.args[CX24116_DISEQC_ARG3_0] = 0x00;
921 922
	/* Continuation flag? */
	state->dsec_cmd.args[CX24116_DISEQC_ARG4_0] = 0x00;
923

924 925 926 927
	/* DiSEqC message length */
	state->dsec_cmd.args[CX24116_DISEQC_MSGLEN] = 0x00;

	/* Command length */
928
	state->dsec_cmd.len = CX24116_DISEQC_MSGOFS;
929 930 931 932 933

	return 0;
}

/* Send DiSEqC message with derived burst (hack) || previous burst */
934 935
static int cx24116_send_diseqc_msg(struct dvb_frontend *fe,
	struct dvb_diseqc_master_cmd *d)
936 937 938 939 940 941
{
	struct cx24116_state *state = fe->demodulator_priv;
	int i, ret;

	/* Dump DiSEqC message */
	if (debug) {
942
		printk(KERN_INFO "cx24116: %s(", __func__);
943
		for (i = 0 ; i < d->msg_len ;) {
944
			printk(KERN_INFO "0x%02x", d->msg[i]);
945
			if (++i < d->msg_len)
946
				printk(KERN_INFO ", ");
947
		}
948
		printk(") toneburst=%d\n", toneburst);
949 950
	}

951
	/* Validate length */
952
	if (d->msg_len > (CX24116_ARGLEN - CX24116_DISEQC_MSGOFS))
953 954 955 956
		return -EINVAL;

	/* DiSEqC message */
	for (i = 0; i < d->msg_len; i++)
957 958 959 960 961 962
		state->dsec_cmd.args[CX24116_DISEQC_MSGOFS + i] = d->msg[i];

	/* DiSEqC message length */
	state->dsec_cmd.args[CX24116_DISEQC_MSGLEN] = d->msg_len;

	/* Command length */
963 964
	state->dsec_cmd.len = CX24116_DISEQC_MSGOFS +
		state->dsec_cmd.args[CX24116_DISEQC_MSGLEN];
965 966

	/* DiSEqC toneburst */
967
	if (toneburst == CX24116_DISEQC_MESGCACHE)
968 969 970
		/* Message is cached */
		return 0;

971
	else if (toneburst == CX24116_DISEQC_TONEOFF)
972 973 974
		/* Message is sent without burst */
		state->dsec_cmd.args[CX24116_DISEQC_BURST] = 0;

975
	else if (toneburst == CX24116_DISEQC_TONECACHE) {
976 977 978 979 980 981 982 983 984 985
		/*
		 * Message is sent with derived else cached burst
		 *
		 * WRITE PORT GROUP COMMAND 38
		 *
		 * 0/A/A: E0 10 38 F0..F3
		 * 1/B/B: E0 10 38 F4..F7
		 * 2/C/A: E0 10 38 F8..FB
		 * 3/D/B: E0 10 38 FC..FF
		 *
986
		 * databyte[3]= 8421:8421
987 988 989 990 991 992 993
		 *              ABCD:WXYZ
		 *              CLR :SET
		 *
		 *              WX= PORT SELECT 0..3    (X=TONEBURST)
		 *              Y = VOLTAGE             (0=13V, 1=18V)
		 *              Z = BAND                (0=LOW, 1=HIGH(22K))
		 */
994 995 996 997 998 999
		if (d->msg_len >= 4 && d->msg[2] == 0x38)
			state->dsec_cmd.args[CX24116_DISEQC_BURST] =
				((d->msg[3] & 4) >> 2);
		if (debug)
			dprintk("%s burst=%d\n", __func__,
				state->dsec_cmd.args[CX24116_DISEQC_BURST]);
1000
	}
1001

1002 1003
	/* Wait for LNB ready */
	ret = cx24116_wait_for_lnb(fe);
1004
	if (ret != 0)
1005
		return ret;
1006

1007 1008
	/* Wait for voltage/min repeat delay */
	msleep(100);
1009

1010 1011
	/* Command */
	ret = cx24116_cmd_execute(fe, &state->dsec_cmd);
1012
	if (ret != 0)
1013 1014 1015
		return ret;
	/*
	 * Wait for send
1016 1017
	 *
	 * Eutelsat spec:
1018 1019 1020 1021 1022
	 * >15ms delay          + (XXX determine if FW does this, see set_tone)
	 *  13.5ms per byte     +
	 * >15ms delay          +
	 *  12.5ms burst        +
	 * >15ms delay            (XXX determine if FW does this, see set_tone)
1023
	 */
1024 1025
	msleep((state->dsec_cmd.args[CX24116_DISEQC_MSGLEN] << 4) +
		((toneburst == CX24116_DISEQC_TONEOFF) ? 30 : 60));
1026

1027
	return 0;
1028 1029 1030
}

/* Send DiSEqC burst */
1031 1032
static int cx24116_diseqc_send_burst(struct dvb_frontend *fe,
	fe_sec_mini_cmd_t burst)
1033 1034 1035 1036
{
	struct cx24116_state *state = fe->demodulator_priv;
	int ret;

1037
	dprintk("%s(%d) toneburst=%d\n", __func__, burst, toneburst);
1038

1039
	/* DiSEqC burst */
1040
	if (burst == SEC_MINI_A)
1041 1042 1043 1044 1045
		state->dsec_cmd.args[CX24116_DISEQC_BURST] =
			CX24116_DISEQC_MINI_A;
	else if (burst == SEC_MINI_B)
		state->dsec_cmd.args[CX24116_DISEQC_BURST] =
			CX24116_DISEQC_MINI_B;
1046 1047 1048
	else
		return -EINVAL;

1049
	/* DiSEqC toneburst */
1050
	if (toneburst != CX24116_DISEQC_MESGCACHE)
1051 1052
		/* Burst is cached */
		return 0;
1053

1054
	/* Burst is to be sent with cached message */
1055

1056 1057
	/* Wait for LNB ready */
	ret = cx24116_wait_for_lnb(fe);
1058
	if (ret != 0)
1059
		return ret;
1060

1061 1062
	/* Wait for voltage/min repeat delay */
	msleep(100);
1063

1064 1065
	/* Command */
	ret = cx24116_cmd_execute(fe, &state->dsec_cmd);
1066
	if (ret != 0)
1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078
		return ret;

	/*
	 * Wait for send
	 *
	 * Eutelsat spec:
	 * >15ms delay          + (XXX determine if FW does this, see set_tone)
	 *  13.5ms per byte     +
	 * >15ms delay          +
	 *  12.5ms burst        +
	 * >15ms delay            (XXX determine if FW does this, see set_tone)
	 */
1079
	msleep((state->dsec_cmd.args[CX24116_DISEQC_MSGLEN] << 4) + 60);
1080 1081

	return 0;
1082 1083
}

1084
static void cx24116_release(struct dvb_frontend *fe)
1085
{
1086 1087
	struct cx24116_state *state = fe->demodulator_priv;
	dprintk("%s\n", __func__);
1088 1089 1090 1091 1092
	kfree(state);
}

static struct dvb_frontend_ops cx24116_ops;

1093 1094
struct dvb_frontend *cx24116_attach(const struct cx24116_config *config,
	struct i2c_adapter *i2c)
1095
{
1096
	struct cx24116_state *state = NULL;
1097 1098
	int ret;

1099
	dprintk("%s\n", __func__);
1100 1101 1102

	/* allocate memory for the internal state */
	state = kmalloc(sizeof(struct cx24116_state), GFP_KERNEL);
1103
	if (state == NULL)
1104
		goto error1;
1105 1106 1107 1108 1109 1110 1111 1112

	/* setup the state */
	memset(state, 0, sizeof(struct cx24116_state));

	state->config = config;
	state->i2c = i2c;

	/* check if the demod is present */
1113 1114
	ret = (cx24116_readreg(state, 0xFF) << 8) |
		cx24116_readreg(state, 0xFE);
1115
	if (ret != 0x0501) {
1116
		printk(KERN_INFO "Invalid probe, probably not a CX24116 device\n");
1117
		goto error2;
1118 1119 1120
	}

	/* create dvb_frontend */
1121 1122
	memcpy(&state->frontend.ops, &cx24116_ops,
		sizeof(struct dvb_frontend_ops));
1123 1124 1125
	state->frontend.demodulator_priv = state;
	return &state->frontend;

1126
error2: kfree(state);
1127
error1: return NULL;
1128
}
1129 1130
EXPORT_SYMBOL(cx24116_attach);

1131 1132 1133 1134 1135
/*
 * Initialise or wake up device
 *
 * Power config will reset and load initial firmware if required
 */
1136
static int cx24116_initfe(struct dvb_frontend *fe)
1137
{
1138
	struct cx24116_state *state = fe->demodulator_priv;
1139 1140
	struct cx24116_cmd cmd;
	int ret;
1141

1142
	dprintk("%s()\n", __func__);
1143

1144 1145 1146 1147
	/* Power on */
	cx24116_writereg(state, 0xe0, 0);
	cx24116_writereg(state, 0xe1, 0);
	cx24116_writereg(state, 0xea, 0);
1148

1149 1150 1151
	/* Firmware CMD 36: Power config */
	cmd.args[0x00] = CMD_TUNERSLEEP;
	cmd.args[0x01] = 0;
1152
	cmd.len = 0x02;
1153
	ret = cx24116_cmd_execute(fe, &cmd);
1154
	if (ret != 0)
1155 1156 1157
		return ret;

	return cx24116_diseqc_init(fe);
1158 1159
}

1160 1161 1162
/*
 * Put device to sleep
 */
1163
static int cx24116_sleep(struct dvb_frontend *fe)
1164
{
1165
	struct cx24116_state *state = fe->demodulator_priv;
1166 1167 1168
	struct cx24116_cmd cmd;
	int ret;

1169
	dprintk("%s()\n", __func__);
1170

1171 1172 1173
	/* Firmware CMD 36: Power config */
	cmd.args[0x00] = CMD_TUNERSLEEP;
	cmd.args[0x01] = 1;
1174
	cmd.len = 0x02;
1175
	ret = cx24116_cmd_execute(fe, &cmd);
1176
	if (ret != 0)
1177 1178 1179 1180 1181 1182 1183 1184
		return ret;

	/* Power off (Shutdown clocks) */
	cx24116_writereg(state, 0xea, 0xff);
	cx24116_writereg(state, 0xe1, 1);
	cx24116_writereg(state, 0xe0, 1);

	return 0;
1185 1186
}

1187 1188
static int cx24116_set_property(struct dvb_frontend *fe,
	struct dtv_property *tvp)
1189 1190 1191 1192 1193
{
	dprintk("%s(..)\n", __func__);
	return 0;
}

1194 1195
static int cx24116_get_property(struct dvb_frontend *fe,
	struct dtv_property *tvp)
1196
{
1197
	dprintk("%s(..)\n", __func__);
1198 1199 1200 1201 1202 1203
	return 0;
}

/* dvb-core told us to tune, the tv property cache will be complete,
 * it's safe for is to pull values and use them for tuning purposes.
 */
1204 1205
static int cx24116_set_frontend(struct dvb_frontend *fe,
	struct dvb_frontend_parameters *p)
1206 1207
{
	struct cx24116_state *state = fe->demodulator_priv;
1208
	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1209 1210
	struct cx24116_cmd cmd;
	fe_status_t tunerstat;
1211
	int i, status, ret, retune = 1;
1212

1213
	dprintk("%s()\n", __func__);
1214

1215 1216 1217
	switch (c->delivery_system) {
	case SYS_DVBS:
		dprintk("%s: DVB-S delivery system selected\n", __func__);
1218

1219 1220 1221 1222 1223 1224
		/* Only QPSK is supported for DVB-S */
		if (c->modulation != QPSK) {
			dprintk("%s: unsupported modulation selected (%d)\n",
				__func__, c->modulation);
			return -EOPNOTSUPP;
		}
1225

1226 1227
		/* Pilot doesn't exist in DVB-S, turn bit off */
		state->dnxt.pilot_val = CX24116_PILOT_OFF;
1228

1229 1230 1231 1232 1233 1234 1235 1236
		/* DVB-S only supports 0.35 */
		if (c->rolloff != ROLLOFF_35) {
			dprintk("%s: unsupported rolloff selected (%d)\n",
				__func__, c->rolloff);
			return -EOPNOTSUPP;
		}
		state->dnxt.rolloff_val = CX24116_ROLLOFF_035;
		break;
1237

1238 1239
	case SYS_DVBS2:
		dprintk("%s: DVB-S2 delivery system selected\n", __func__);
1240

1241 1242 1243 1244 1245 1246 1247 1248 1249
		/*
		 * NBC 8PSK/QPSK with DVB-S is supported for DVB-S2,
		 * but not hardware auto detection
		 */
		if (c->modulation != PSK_8 && c->modulation != QPSK) {
			dprintk("%s: unsupported modulation selected (%d)\n",
				__func__, c->modulation);
			return -EOPNOTSUPP;
		}
1250

1251 1252
		switch (c->pilot) {
		case PILOT_AUTO:	/* Not supported but emulated */
1253 1254
			state->dnxt.pilot_val = (c->modulation == QPSK)
				? CX24116_PILOT_OFF : CX24116_PILOT_ON;
1255
			retune++;
1256
			break;
1257 1258 1259 1260 1261
		case PILOT_OFF:
			state->dnxt.pilot_val = CX24116_PILOT_OFF;
			break;
		case PILOT_ON:
			state->dnxt.pilot_val = CX24116_PILOT_ON;
1262
			break;
1263 1264 1265 1266 1267
		default:
			dprintk("%s: unsupported pilot mode selected (%d)\n",
				__func__, c->pilot);
			return -EOPNOTSUPP;
		}
1268

1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279
		switch (c->rolloff) {
		case ROLLOFF_20:
			state->dnxt.rolloff_val = CX24116_ROLLOFF_020;
			break;
		case ROLLOFF_25:
			state->dnxt.rolloff_val = CX24116_ROLLOFF_025;
			break;
		case ROLLOFF_35:
			state->dnxt.rolloff_val = CX24116_ROLLOFF_035;
			break;
		case ROLLOFF_AUTO:	/* Rolloff must be explicit */
1280
		default:
1281 1282
			dprintk("%s: unsupported rolloff selected (%d)\n",
				__func__, c->rolloff);
1283
			return -EOPNOTSUPP;
1284 1285 1286 1287 1288 1289 1290
		}
		break;

	default:
		dprintk("%s: unsupported delivery system selected (%d)\n",
			__func__, c->delivery_system);
		return -EOPNOTSUPP;
1291
	}
1292
	state->dnxt.delsys = c->delivery_system;
1293 1294 1295 1296
	state->dnxt.modulation = c->modulation;
	state->dnxt.frequency = c->frequency;
	state->dnxt.pilot = c->pilot;
	state->dnxt.rolloff = c->rolloff;
1297

1298 1299
	ret = cx24116_set_inversion(state, c->inversion);
	if (ret !=  0)
1300 1301
		return ret;

1302
	/* FEC_NONE/AUTO for DVB-S2 is not supported and detected here */
1303
	ret = cx24116_set_fec(state, c->delivery_system, c->modulation, c->fec_inner);
1304
	if (ret !=  0)
1305 1306
		return ret;

1307 1308
	ret = cx24116_set_symbolrate(state, c->symbol_rate);
	if (ret !=  0)
1309 1310 1311 1312 1313
		return ret;

	/* discard the 'current' tuning parameters and prepare to tune */
	cx24116_clone_params(fe);

1314
	dprintk("%s:   delsys      = %d\n", __func__, state->dcur.delsys);
1315
	dprintk("%s:   modulation  = %d\n", __func__, state->dcur.modulation);
1316
	dprintk("%s:   frequency   = %d\n", __func__, state->dcur.frequency);
1317 1318 1319 1320 1321
	dprintk("%s:   pilot       = %d (val = 0x%02x)\n", __func__,
		state->dcur.pilot, state->dcur.pilot_val);
	dprintk("%s:   retune      = %d\n", __func__, retune);
	dprintk("%s:   rolloff     = %d (val = 0x%02x)\n", __func__,
		state->dcur.rolloff, state->dcur.rolloff_val);
1322 1323 1324 1325 1326 1327
	dprintk("%s:   symbol_rate = %d\n", __func__, state->dcur.symbol_rate);
	dprintk("%s:   FEC         = %d (mask/val = 0x%02x/0x%02x)\n", __func__,
		state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val);
	dprintk("%s:   Inversion   = %d (val = 0x%02x)\n", __func__,
		state->dcur.inversion, state->dcur.inversion_val);

1328
	/* This is also done in advise/acquire on HVR4000 but not on LITE */
1329 1330 1331
	if (state->config->set_ts_params)
		state->config->set_ts_params(fe, 0);

1332 1333 1334
	/* Set/Reset B/W */
	cmd.args[0x00] = CMD_BANDWIDTH;
	cmd.args[0x01] = 0x01;
1335
	cmd.len = 0x02;
1336 1337 1338
	ret = cx24116_cmd_execute(fe, &cmd);
	if (ret != 0)
		return ret;
1339

1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354
	/* Prepare a tune request */
	cmd.args[0x00] = CMD_TUNEREQUEST;

	/* Frequency */
	cmd.args[0x01] = (state->dcur.frequency & 0xff0000) >> 16;
	cmd.args[0x02] = (state->dcur.frequency & 0x00ff00) >> 8;
	cmd.args[0x03] = (state->dcur.frequency & 0x0000ff);

	/* Symbol Rate */
	cmd.args[0x04] = ((state->dcur.symbol_rate / 1000) & 0xff00) >> 8;
	cmd.args[0x05] = ((state->dcur.symbol_rate / 1000) & 0x00ff);

	/* Automatic Inversion */
	cmd.args[0x06] = state->dcur.inversion_val;

1355 1356
	/* Modulation / FEC / Pilot */
	cmd.args[0x07] = state->dcur.fec_val | state->dcur.pilot_val;
1357 1358 1359 1360 1361

	cmd.args[0x08] = CX24116_SEARCH_RANGE_KHZ >> 8;
	cmd.args[0x09] = CX24116_SEARCH_RANGE_KHZ & 0xff;
	cmd.args[0x0a] = 0x00;
	cmd.args[0x0b] = 0x00;
1362
	cmd.args[0x0c] = state->dcur.rolloff_val;
1363
	cmd.args[0x0d] = state->dcur.fec_mask;
1364

1365
	if (state->dcur.symbol_rate > 30000000) {
1366 1367 1368 1369 1370
		cmd.args[0x0e] = 0x04;
		cmd.args[0x0f] = 0x00;
		cmd.args[0x10] = 0x01;
		cmd.args[0x11] = 0x77;
		cmd.args[0x12] = 0x36;
1371 1372
		cx24116_writereg(state, CX24116_REG_CLKDIV, 0x44);
		cx24116_writereg(state, CX24116_REG_RATEDIV, 0x01);
1373 1374 1375 1376 1377 1378
	} else {
		cmd.args[0x0e] = 0x06;
		cmd.args[0x0f] = 0x00;
		cmd.args[0x10] = 0x00;
		cmd.args[0x11] = 0xFA;
		cmd.args[0x12] = 0x24;
1379 1380
		cx24116_writereg(state, CX24116_REG_CLKDIV, 0x46);
		cx24116_writereg(state, CX24116_REG_RATEDIV, 0x00);
1381 1382
	}

1383
	cmd.len = 0x13;
1384 1385 1386 1387 1388 1389

	/* We need to support pilot and non-pilot tuning in the
	 * driver automatically. This is a workaround for because
	 * the demod does not support autodetect.
	 */
	do {
1390
		/* Reset status register */
1391 1392
		status = cx24116_readreg(state, CX24116_REG_SSTATUS)
			& CX24116_SIGNAL_MASK;
1393
		cx24116_writereg(state, CX24116_REG_SSTATUS, status);
1394 1395 1396

		/* Tune */
		ret = cx24116_cmd_execute(fe, &cmd);
1397
		if (ret != 0)
1398 1399
			break;

1400 1401 1402 1403 1404 1405
		/*
		 * Wait for up to 500 ms before retrying
		 *
		 * If we are able to tune then generally it occurs within 100ms.
		 * If it takes longer, try a different toneburst setting.
		 */
1406
		for (i = 0; i < 50 ; i++) {
1407 1408
			cx24116_read_status(fe, &tunerstat);
			status = tunerstat & (FE_HAS_SIGNAL | FE_HAS_SYNC);
1409 1410
			if (status == (FE_HAS_SIGNAL | FE_HAS_SYNC)) {
				dprintk("%s: Tuned\n", __func__);
1411 1412 1413
				goto tuned;
			}
			msleep(10);
1414
		}
1415

1416
		dprintk("%s: Not tuned\n", __func__);
1417 1418

		/* Toggle pilot bit when in auto-pilot */
1419
		if (state->dcur.pilot == PILOT_AUTO)
1420
			cmd.args[0x07] ^= CX24116_PILOT_ON;
1421
	} while (--retune);
1422

1423 1424 1425
tuned:  /* Set/Reset B/W */
	cmd.args[0x00] = CMD_BANDWIDTH;
	cmd.args[0x01] = 0x00;
1426
	cmd.len = 0x02;
1427 1428 1429 1430
	ret = cx24116_cmd_execute(fe, &cmd);
	if (ret != 0)
		return ret;

1431 1432 1433
	return ret;
}

1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450
static int cx24116_tune(struct dvb_frontend *fe, struct dvb_frontend_parameters *params,
	unsigned int mode_flags, unsigned int *delay, fe_status_t *status)
{
	*delay = HZ / 5;
	if (params) {
		int ret = cx24116_set_frontend(fe, params);
		if (ret)
			return ret;
	}
	return cx24116_read_status(fe, status);
}

static int cx24116_get_algo(struct dvb_frontend *fe)
{
	return DVBFE_ALGO_HW;
}

1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465
static struct dvb_frontend_ops cx24116_ops = {

	.info = {
		.name = "Conexant CX24116/CX24118",
		.type = FE_QPSK,
		.frequency_min = 950000,
		.frequency_max = 2150000,
		.frequency_stepsize = 1011, /* kHz for QPSK frontends */
		.frequency_tolerance = 5000,
		.symbol_rate_min = 1000000,
		.symbol_rate_max = 45000000,
		.caps = FE_CAN_INVERSION_AUTO |
			FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
			FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
			FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1466
			FE_CAN_2G_MODULATION |
1467 1468 1469 1470 1471 1472
			FE_CAN_QPSK | FE_CAN_RECOVER
	},

	.release = cx24116_release,

	.init = cx24116_initfe,
1473
	.sleep = cx24116_sleep,
1474 1475 1476 1477 1478 1479 1480 1481 1482
	.read_status = cx24116_read_status,
	.read_ber = cx24116_read_ber,
	.read_signal_strength = cx24116_read_signal_strength,
	.read_snr = cx24116_read_snr,
	.read_ucblocks = cx24116_read_ucblocks,
	.set_tone = cx24116_set_tone,
	.set_voltage = cx24116_set_voltage,
	.diseqc_send_master_cmd = cx24116_send_diseqc_msg,
	.diseqc_send_burst = cx24116_diseqc_send_burst,
1483 1484
	.get_frontend_algo = cx24116_get_algo,
	.tune = cx24116_tune,
1485 1486

	.set_property = cx24116_set_property,
1487
	.get_property = cx24116_get_property,
1488 1489 1490 1491 1492 1493 1494
	.set_frontend = cx24116_set_frontend,
};

MODULE_DESCRIPTION("DVB Frontend module for Conexant cx24116/cx24118 hardware");
MODULE_AUTHOR("Steven Toth");
MODULE_LICENSE("GPL");