mpc85xx_ds.c 7.0 KB
Newer Older
1
/*
2
 * MPC85xx DS Board Setup
3 4
 *
 * Author Xianghua Xiao (x.xiao@freescale.com)
5 6
 * Roy Zang <tie-fei.zang@freescale.com>
 * 	- Add PCI/PCI Exprees support
7 8 9 10 11 12 13 14 15 16
 * Copyright 2007 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

#include <linux/stddef.h>
#include <linux/kernel.h>
17
#include <linux/pci.h>
18 19 20
#include <linux/kdev_t.h>
#include <linux/delay.h>
#include <linux/seq_file.h>
21
#include <linux/interrupt.h>
22
#include <linux/of_platform.h>
Y
Yinghai Lu 已提交
23
#include <linux/memblock.h>
24 25 26 27

#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
28
#include <asm/pci-bridge.h>
29 30 31 32 33
#include <mm/mmu_decl.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
#include <asm/i8259.h>
34
#include <asm/swiotlb.h>
35 36

#include <sysdev/fsl_soc.h>
37
#include <sysdev/fsl_pci.h>
38

39 40
#include "mpc85xx.h"

41 42 43
#undef DEBUG

#ifdef DEBUG
44
#define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
45 46 47 48
#else
#define DBG(fmt, args...)
#endif

49
#ifdef CONFIG_PPC_I8259
50
static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
51
{
52
	struct irq_chip *chip = irq_desc_get_chip(desc);
53 54 55 56 57
	unsigned int cascade_irq = i8259_irq();

	if (cascade_irq != NO_IRQ) {
		generic_handle_irq(cascade_irq);
	}
58
	chip->irq_eoi(&desc->irq_data);
59 60
}
#endif	/* CONFIG_PPC_I8259 */
61

62
void __init mpc85xx_ds_pic_init(void)
63 64 65
{
	struct mpic *mpic;
	struct resource r;
66
	struct device_node *np;
67 68 69 70
#ifdef CONFIG_PPC_I8259
	struct device_node *cascade_node = NULL;
	int cascade_irq;
#endif
71
	unsigned long root = of_get_flat_dt_root();
72

73
	np = of_find_node_by_type(NULL, "open-pic");
74 75 76 77 78 79 80 81 82 83 84
	if (np == NULL) {
		printk(KERN_ERR "Could not find open-pic node\n");
		return;
	}

	if (of_address_to_resource(np, 0, &r)) {
		printk(KERN_ERR "Failed to map mpic register space\n");
		of_node_put(np);
		return;
	}

85 86 87
	if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
		mpic = mpic_alloc(np, r.start,
			MPIC_PRIMARY |
88 89
			MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
			MPIC_SINGLE_DEST_CPU,
90 91 92
			0, 256, " OpenPIC  ");
	} else {
		mpic = mpic_alloc(np, r.start,
93
			  MPIC_PRIMARY | MPIC_WANTS_RESET |
94 95
			  MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
			  MPIC_SINGLE_DEST_CPU,
96
			0, 256, " OpenPIC  ");
97 98
	}

99
	BUG_ON(mpic == NULL);
100
	of_node_put(np);
101 102 103 104 105 106

	mpic_init(mpic);

#ifdef CONFIG_PPC_I8259
	/* Initialize the i8259 controller */
	for_each_node_by_type(np, "interrupt-controller")
107
	    if (of_device_is_compatible(np, "chrp,iic")) {
108 109 110 111 112 113 114 115 116 117 118 119 120 121 122
		cascade_node = np;
		break;
	}

	if (cascade_node == NULL) {
		printk(KERN_DEBUG "Could not find i8259 PIC\n");
		return;
	}

	cascade_irq = irq_of_parse_and_map(cascade_node, 0);
	if (cascade_irq == NO_IRQ) {
		printk(KERN_ERR "Failed to map cascade interrupt\n");
		return;
	}

123
	DBG("mpc85xxds: cascade mapped to irq %d\n", cascade_irq);
124 125 126 127

	i8259_init(cascade_node, 0);
	of_node_put(cascade_node);

128
	irq_set_chained_handler(cascade_irq, mpc85xx_8259_cascade);
129 130 131
#endif	/* CONFIG_PPC_I8259 */
}

132
#ifdef CONFIG_PCI
133
static int primary_phb_addr;
134 135
extern int uli_exclude_device(struct pci_controller *hose,
				u_char bus, u_char devfn);
136

137 138
static int mpc85xx_exclude_device(struct pci_controller *hose,
				   u_char bus, u_char devfn)
139
{
140
	struct device_node* node;
141
	struct resource rsrc;
142

143
	node = hose->dn;
144
	of_address_to_resource(node, 0, &rsrc);
145

146
	if ((rsrc.start & 0xfffff) == primary_phb_addr) {
147 148
		return uli_exclude_device(hose, bus, devfn);
	}
149

150
	return PCIBIOS_SUCCESSFUL;
151 152
}
#endif	/* CONFIG_PCI */
153 154 155 156

/*
 * Setup the architecture
 */
157 158 159
#ifdef CONFIG_SMP
extern void __init mpc85xx_smp_init(void);
#endif
160
static void __init mpc85xx_ds_setup_arch(void)
161
{
162 163
#ifdef CONFIG_PCI
	struct device_node *np;
164
	struct pci_controller *hose;
165
#endif
166
	dma_addr_t max = 0xffffffff;
167

168
	if (ppc_md.progress)
169
		ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
170

171
#ifdef CONFIG_PCI
172 173
	for_each_node_by_type(np, "pci") {
		if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
174 175
		    of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
		    of_device_is_compatible(np, "fsl,p2020-pcie")) {
176 177 178 179 180 181
			struct resource rsrc;
			of_address_to_resource(np, 0, &rsrc);
			if ((rsrc.start & 0xfffff) == primary_phb_addr)
				fsl_add_bridge(np, 1);
			else
				fsl_add_bridge(np, 0);
182 183 184 185

			hose = pci_find_hose_for_OF_device(np);
			max = min(max, hose->dma_window_base_cur +
					hose->dma_window_size);
186
		}
187
	}
188

189
	ppc_md.pci_exclude_device = mpc85xx_exclude_device;
190 191
#endif

192 193 194 195
#ifdef CONFIG_SMP
	mpc85xx_smp_init();
#endif

196
#ifdef CONFIG_SWIOTLB
Y
Yinghai Lu 已提交
197
	if (memblock_end_of_DRAM() > max) {
198
		ppc_swiotlb_enable = 1;
199
		set_pci_dma_ops(&swiotlb_dma_ops);
200
		ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
201 202 203
	}
#endif

204
	printk("MPC85xx DS board from Freescale Semiconductor\n");
205 206 207 208 209 210 211 212 213
}

/*
 * Called very early, device-tree isn't unflattened
 */
static int __init mpc8544_ds_probe(void)
{
	unsigned long root = of_get_flat_dt_root();

214 215 216 217 218 219
	if (of_flat_dt_is_compatible(root, "MPC8544DS")) {
#ifdef CONFIG_PCI
		primary_phb_addr = 0xb000;
#endif
		return 1;
	}
220 221

	return 0;
222 223
}

224 225 226
machine_device_initcall(mpc8544_ds, mpc85xx_common_publish_devices);
machine_device_initcall(mpc8572_ds, mpc85xx_common_publish_devices);
machine_device_initcall(p2020_ds, mpc85xx_common_publish_devices);
227

228 229 230 231
machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier);
machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier);
machine_arch_initcall(p2020_ds, swiotlb_setup_bus_notifier);

232 233 234 235 236 237 238 239 240 241 242 243 244
/*
 * Called very early, device-tree isn't unflattened
 */
static int __init mpc8572_ds_probe(void)
{
	unsigned long root = of_get_flat_dt_root();

	if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS")) {
#ifdef CONFIG_PCI
		primary_phb_addr = 0x8000;
#endif
		return 1;
	}
245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263

	return 0;
}

/*
 * Called very early, device-tree isn't unflattened
 */
static int __init p2020_ds_probe(void)
{
	unsigned long root = of_get_flat_dt_root();

	if (of_flat_dt_is_compatible(root, "fsl,P2020DS")) {
#ifdef CONFIG_PCI
		primary_phb_addr = 0x9000;
#endif
		return 1;
	}

	return 0;
264 265
}

266 267 268
define_machine(mpc8544_ds) {
	.name			= "MPC8544 DS",
	.probe			= mpc8544_ds_probe,
269 270
	.setup_arch		= mpc85xx_ds_setup_arch,
	.init_IRQ		= mpc85xx_ds_pic_init,
271
#ifdef CONFIG_PCI
272
	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
273
#endif
274
	.get_irq		= mpic_get_irq,
275
	.restart		= fsl_rstcr_restart,
276 277 278
	.calibrate_decr		= generic_calibrate_decr,
	.progress		= udbg_progress,
};
279 280 281 282 283 284 285 286 287 288

define_machine(mpc8572_ds) {
	.name			= "MPC8572 DS",
	.probe			= mpc8572_ds_probe,
	.setup_arch		= mpc85xx_ds_setup_arch,
	.init_IRQ		= mpc85xx_ds_pic_init,
#ifdef CONFIG_PCI
	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
#endif
	.get_irq		= mpic_get_irq,
289
	.restart		= fsl_rstcr_restart,
290 291 292
	.calibrate_decr		= generic_calibrate_decr,
	.progress		= udbg_progress,
};
293 294 295 296 297 298 299 300 301 302 303 304 305 306

define_machine(p2020_ds) {
	.name			= "P2020 DS",
	.probe			= p2020_ds_probe,
	.setup_arch		= mpc85xx_ds_setup_arch,
	.init_IRQ		= mpc85xx_ds_pic_init,
#ifdef CONFIG_PCI
	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
#endif
	.get_irq		= mpic_get_irq,
	.restart		= fsl_rstcr_restart,
	.calibrate_decr		= generic_calibrate_decr,
	.progress		= udbg_progress,
};