usb.c 18.6 KB
Newer Older
1
 /*
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
 * arch/arm/plat-omap/usb.c -- platform level USB initialization
 *
 * Copyright (C) 2004 Texas Instruments, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#undef	DEBUG

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/init.h>
28
#include <linux/platform_device.h>
29
#include <linux/usb/otg.h>
30
#include <linux/io.h>
31 32 33

#include <asm/irq.h>
#include <asm/system.h>
34
#include <mach/hardware.h>
35

36 37 38 39
#include <mach/control.h>
#include <mach/mux.h>
#include <mach/usb.h>
#include <mach/board.h>
40

41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59
#ifdef CONFIG_ARCH_OMAP1

#define INT_USB_IRQ_GEN		IH2_BASE + 20
#define INT_USB_IRQ_NISO	IH2_BASE + 30
#define INT_USB_IRQ_ISO		IH2_BASE + 29
#define INT_USB_IRQ_HGEN	INT_USB_HHC_1
#define INT_USB_IRQ_OTG		IH2_BASE + 8

#else

#define INT_USB_IRQ_GEN		INT_24XX_USB_IRQ_GEN
#define INT_USB_IRQ_NISO	INT_24XX_USB_IRQ_NISO
#define INT_USB_IRQ_ISO		INT_24XX_USB_IRQ_ISO
#define INT_USB_IRQ_HGEN	INT_24XX_USB_IRQ_HGEN
#define INT_USB_IRQ_OTG		INT_24XX_USB_IRQ_OTG

#endif


60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79
/* These routines should handle the standard chip-specific modes
 * for usb0/1/2 ports, covering basic mux and transceiver setup.
 *
 * Some board-*.c files will need to set up additional mux options,
 * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
 */

/* TESTED ON:
 *  - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
 *  - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
 *  - 5912 OSK UDC, with *nonstandard* A-to-A cable
 *  - 1510 Innovator UDC with bundled usb0 cable
 *  - 1510 Innovator OHCI with bundled usb1/usb2 cable
 *  - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
 *  - 1710 custom development board using alternate pin group
 *  - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
 */

/*-------------------------------------------------------------------------*/

80 81
#if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP15XX)

82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117
static void omap2_usb_devconf_clear(u8 port, u32 mask)
{
	u32 r;

	r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
	r &= ~USBTXWRMODEI(port, mask);
	omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
}

static void omap2_usb_devconf_set(u8 port, u32 mask)
{
	u32 r;

	r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
	r |= USBTXWRMODEI(port, mask);
	omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
}

static void omap2_usb2_disable_5pinbitll(void)
{
	u32 r;

	r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
	r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI);
	omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
}

static void omap2_usb2_enable_5pinunitll(void)
{
	u32 r;

	r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
	r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI;
	omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
}

118 119 120 121
static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
{
	u32	syscon1 = 0;

122
	if (cpu_is_omap24xx())
123
		omap2_usb_devconf_clear(0, USB_BIDIR_TLL);
124

125
	if (nwires == 0) {
126
		if (cpu_class_is_omap1() && !cpu_is_omap15xx()) {
127 128
			u32 l;

129
			/* pulldown D+/D- */
130 131 132
			l = omap_readl(USB_TRANSCEIVER_CTRL);
			l &= ~(3 << 1);
			omap_writel(l, USB_TRANSCEIVER_CTRL);
133 134 135 136
		}
		return 0;
	}

137 138 139 140 141 142
	if (is_device) {
		if (cpu_is_omap24xx())
			omap_cfg_reg(J20_24XX_USB0_PUEN);
		else
			omap_cfg_reg(W4_USB_PUEN);
	}
143

144 145
	/* internal transceiver (unavailable on 17xx, 24xx) */
	if (!cpu_class_is_omap2() && nwires == 2) {
146 147
		u32 l;

148 149 150 151 152 153 154 155 156 157 158 159 160 161
		// omap_cfg_reg(P9_USB_DP);
		// omap_cfg_reg(R8_USB_DM);

		if (cpu_is_omap15xx()) {
			/* This works on 1510-Innovator */
			return 0;
		}

		/* NOTES:
		 *  - peripheral should configure VBUS detection!
		 *  - only peripherals may use the internal D+/D- pulldowns
		 *  - OTG support on this port not yet written
		 */

162 163
		l = omap_readl(USB_TRANSCEIVER_CTRL);
		l &= ~(7 << 4);
164
		if (!is_device)
165 166
			l |= (3 << 1);
		omap_writel(l, USB_TRANSCEIVER_CTRL);
167 168 169 170 171 172 173 174 175 176

		return 3 << 16;
	}

	/* alternate pin config, external transceiver */
	if (cpu_is_omap15xx()) {
		printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
		return 0;
	}

177 178 179 180 181 182 183 184 185 186 187 188 189
	if (cpu_is_omap24xx()) {
		omap_cfg_reg(K18_24XX_USB0_DAT);
		omap_cfg_reg(K19_24XX_USB0_TXEN);
		omap_cfg_reg(J14_24XX_USB0_SE0);
		if (nwires != 3)
			omap_cfg_reg(J18_24XX_USB0_RCV);
	} else {
		omap_cfg_reg(V6_USB0_TXD);
		omap_cfg_reg(W9_USB0_TXEN);
		omap_cfg_reg(W5_USB0_SE0);
		if (nwires != 3)
			omap_cfg_reg(Y5_USB0_RCV);
	}
190

191 192
	/* NOTE:  SPEED and SUSP aren't configured here.  OTG hosts
	 * may be able to use I2C requests to set those bits along
S
Simon Arlott 已提交
193
	 * with VBUS switching and overcurrent detection.
194
	 */
195

196 197 198 199 200 201 202
	if (cpu_class_is_omap1() && nwires != 6) {
		u32 l;

		l = omap_readl(USB_TRANSCEIVER_CTRL);
		l &= ~CONF_USB2_UNI_R;
		omap_writel(l, USB_TRANSCEIVER_CTRL);
	}
203 204 205 206

	switch (nwires) {
	case 3:
		syscon1 = 2;
207
		if (cpu_is_omap24xx())
208
			omap2_usb_devconf_set(0, USB_BIDIR);
209 210 211
		break;
	case 4:
		syscon1 = 1;
212
		if (cpu_is_omap24xx())
213
			omap2_usb_devconf_set(0, USB_BIDIR);
214 215 216
		break;
	case 6:
		syscon1 = 3;
217 218 219
		if (cpu_is_omap24xx()) {
			omap_cfg_reg(J19_24XX_USB0_VP);
			omap_cfg_reg(K20_24XX_USB0_VM);
220
			omap2_usb_devconf_set(0, USB_UNIDIR);
221
		} else {
222 223
			u32 l;

224 225
			omap_cfg_reg(AA9_USB0_VP);
			omap_cfg_reg(R9_USB0_VM);
226 227 228
			l = omap_readl(USB_TRANSCEIVER_CTRL);
			l |= CONF_USB2_UNI_R;
			omap_writel(l, USB_TRANSCEIVER_CTRL);
229
		}
230 231 232 233 234 235 236 237 238 239 240 241
		break;
	default:
		printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
			0, nwires);
	}
	return syscon1 << 16;
}

static u32 __init omap_usb1_init(unsigned nwires)
{
	u32	syscon1 = 0;

242 243 244 245 246 247 248
	if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) {
		u32 l;

		l = omap_readl(USB_TRANSCEIVER_CTRL);
		l &= ~CONF_USB1_UNI_R;
		omap_writel(l, USB_TRANSCEIVER_CTRL);
	}
249
	if (cpu_is_omap24xx())
250
		omap2_usb_devconf_clear(1, USB_BIDIR_TLL);
251

252 253 254 255
	if (nwires == 0)
		return 0;

	/* external transceiver */
256 257 258 259 260 261 262
	if (cpu_class_is_omap1()) {
		omap_cfg_reg(USB1_TXD);
		omap_cfg_reg(USB1_TXEN);
		if (nwires != 3)
			omap_cfg_reg(USB1_RCV);
	}

263 264 265 266 267 268 269 270 271 272 273
	if (cpu_is_omap15xx()) {
		omap_cfg_reg(USB1_SEO);
		omap_cfg_reg(USB1_SPEED);
		// SUSP
	} else if (cpu_is_omap1610() || cpu_is_omap5912()) {
		omap_cfg_reg(W13_1610_USB1_SE0);
		omap_cfg_reg(R13_1610_USB1_SPEED);
		// SUSP
	} else if (cpu_is_omap1710()) {
		omap_cfg_reg(R13_1710_USB1_SE0);
		// SUSP
274 275 276 277
	} else if (cpu_is_omap24xx()) {
		/* NOTE:  board-specific code must set up pin muxing for usb1,
		 * since each signal could come out on either of two balls.
		 */
278
	} else {
279 280
		pr_debug("usb%d cpu unrecognized\n", 1);
		return 0;
281 282 283
	}

	switch (nwires) {
284 285 286 287 288 289 290
	case 2:
		if (!cpu_is_omap24xx())
			goto bad;
		/* NOTE: board-specific code must override this setting if
		 * this TLL link is not using DP/DM
		 */
		syscon1 = 1;
291
		omap2_usb_devconf_set(1, USB_BIDIR_TLL);
292
		break;
293 294
	case 3:
		syscon1 = 2;
295
		if (cpu_is_omap24xx())
296
			omap2_usb_devconf_set(1, USB_BIDIR);
297 298 299
		break;
	case 4:
		syscon1 = 1;
300
		if (cpu_is_omap24xx())
301
			omap2_usb_devconf_set(1, USB_BIDIR);
302 303
		break;
	case 6:
304 305
		if (cpu_is_omap24xx())
			goto bad;
306 307 308
		syscon1 = 3;
		omap_cfg_reg(USB1_VP);
		omap_cfg_reg(USB1_VM);
309 310 311 312 313 314 315
		if (!cpu_is_omap15xx()) {
			u32 l;

			l = omap_readl(USB_TRANSCEIVER_CTRL);
			l |= CONF_USB1_UNI_R;
			omap_writel(l, USB_TRANSCEIVER_CTRL);
		}
316 317
		break;
	default:
318
bad:
319 320 321 322 323 324 325 326 327 328
		printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
			1, nwires);
	}
	return syscon1 << 20;
}

static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
{
	u32	syscon1 = 0;

329
	if (cpu_is_omap24xx()) {
330
		omap2_usb2_disable_5pinbitll();
331 332 333 334
		alt_pingroup = 0;
	}

	/* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
335 336
	if (alt_pingroup || nwires == 0)
		return 0;
337

338 339 340 341 342 343 344
	if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) {
		u32 l;

		l = omap_readl(USB_TRANSCEIVER_CTRL);
		l &= ~CONF_USB2_UNI_R;
		omap_writel(l, USB_TRANSCEIVER_CTRL);
	}
345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360

	/* external transceiver */
	if (cpu_is_omap15xx()) {
		omap_cfg_reg(USB2_TXD);
		omap_cfg_reg(USB2_TXEN);
		omap_cfg_reg(USB2_SEO);
		if (nwires != 3)
			omap_cfg_reg(USB2_RCV);
		/* there is no USB2_SPEED */
	} else if (cpu_is_omap16xx()) {
		omap_cfg_reg(V6_USB2_TXD);
		omap_cfg_reg(W9_USB2_TXEN);
		omap_cfg_reg(W5_USB2_SE0);
		if (nwires != 3)
			omap_cfg_reg(Y5_USB2_RCV);
		// FIXME omap_cfg_reg(USB2_SPEED);
361 362 363 364 365 366 367
	} else if (cpu_is_omap24xx()) {
		omap_cfg_reg(Y11_24XX_USB2_DAT);
		omap_cfg_reg(AA10_24XX_USB2_SE0);
		if (nwires > 2)
			omap_cfg_reg(AA12_24XX_USB2_TXEN);
		if (nwires > 3)
			omap_cfg_reg(AA6_24XX_USB2_RCV);
368
	} else {
369 370
		pr_debug("usb%d cpu unrecognized\n", 1);
		return 0;
371
	}
372
	// if (cpu_class_is_omap1()) omap_cfg_reg(USB2_SUSP);
373 374

	switch (nwires) {
375 376 377 378 379 380 381
	case 2:
		if (!cpu_is_omap24xx())
			goto bad;
		/* NOTE: board-specific code must override this setting if
		 * this TLL link is not using DP/DM
		 */
		syscon1 = 1;
382
		omap2_usb_devconf_set(2, USB_BIDIR_TLL);
383
		break;
384 385
	case 3:
		syscon1 = 2;
386
		if (cpu_is_omap24xx())
387
			omap2_usb_devconf_set(2, USB_BIDIR);
388 389 390
		break;
	case 4:
		syscon1 = 1;
391
		if (cpu_is_omap24xx())
392
			omap2_usb_devconf_set(2, USB_BIDIR);
393 394 395 396 397 398 399 400 401 402
		break;
	case 5:
		if (!cpu_is_omap24xx())
			goto bad;
		omap_cfg_reg(AA4_24XX_USB2_TLLSE0);
		/* NOTE: board-specific code must override this setting if
		 * this TLL link is not using DP/DM.  Something must also
		 * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED}
		 */
		syscon1 = 3;
403
		omap2_usb2_enable_5pinunitll();
404 405
		break;
	case 6:
406 407
		if (cpu_is_omap24xx())
			goto bad;
408 409 410 411 412
		syscon1 = 3;
		if (cpu_is_omap15xx()) {
			omap_cfg_reg(USB2_VP);
			omap_cfg_reg(USB2_VM);
		} else {
413 414
			u32 l;

415 416
			omap_cfg_reg(AA9_USB2_VP);
			omap_cfg_reg(R9_USB2_VM);
417 418 419
			l = omap_readl(USB_TRANSCEIVER_CTRL);
			l |= CONF_USB2_UNI_R;
			omap_writel(l, USB_TRANSCEIVER_CTRL);
420 421 422
		}
		break;
	default:
423
bad:
424 425 426 427 428 429
		printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
			2, nwires);
	}
	return syscon1 << 24;
}

430 431
#endif

432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451
/*-------------------------------------------------------------------------*/

#if	defined(CONFIG_USB_GADGET_OMAP) || \
	defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) || \
	(defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG))
static void usb_release(struct device *dev)
{
	/* normally not freed */
}
#endif

#ifdef	CONFIG_USB_GADGET_OMAP

static struct resource udc_resources[] = {
	/* order is significant! */
	{		/* registers */
		.start		= UDC_BASE,
		.end		= UDC_BASE + 0xff,
		.flags		= IORESOURCE_MEM,
	}, {		/* general IRQ */
452
		.start		= INT_USB_IRQ_GEN,
453 454
		.flags		= IORESOURCE_IRQ,
	}, {		/* PIO IRQ */
455
		.start		= INT_USB_IRQ_NISO,
456 457
		.flags		= IORESOURCE_IRQ,
	}, {		/* SOF IRQ */
458
		.start		= INT_USB_IRQ_ISO,
459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486
		.flags		= IORESOURCE_IRQ,
	},
};

static u64 udc_dmamask = ~(u32)0;

static struct platform_device udc_device = {
	.name		= "omap_udc",
	.id		= -1,
	.dev = {
		.release		= usb_release,
		.dma_mask		= &udc_dmamask,
		.coherent_dma_mask	= 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(udc_resources),
	.resource	= udc_resources,
};

#endif

#if	defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)

/* The dmamask must be set for OHCI to work */
static u64 ohci_dmamask = ~(u32)0;

static struct resource ohci_resources[] = {
	{
		.start	= OMAP_OHCI_BASE,
487
		.end	= OMAP_OHCI_BASE + 0xff,
488 489 490
		.flags	= IORESOURCE_MEM,
	},
	{
491
		.start	= INT_USB_IRQ_HGEN,
492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device ohci_device = {
	.name			= "ohci",
	.id			= -1,
	.dev = {
		.release		= usb_release,
		.dma_mask		= &ohci_dmamask,
		.coherent_dma_mask	= 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(ohci_resources),
	.resource		= ohci_resources,
};

#endif

#if	defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)

static struct resource otg_resources[] = {
	/* order is significant! */
	{
		.start		= OTG_BASE,
		.end		= OTG_BASE + 0xff,
		.flags		= IORESOURCE_MEM,
	}, {
519
		.start		= INT_USB_IRQ_OTG,
520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device otg_device = {
	.name		= "omap_otg",
	.id		= -1,
	.dev = {
		.release		= usb_release,
	},
	.num_resources	= ARRAY_SIZE(otg_resources),
	.resource	= otg_resources,
};

#endif

/*-------------------------------------------------------------------------*/

// FIXME correct answer depends on hmc_mode,
539
// as does (on omap1) any nonzero value for config->otg port number
540 541 542 543 544 545 546 547 548 549 550 551 552
#ifdef	CONFIG_USB_GADGET_OMAP
#define	is_usb0_device(config)	1
#else
#define	is_usb0_device(config)	0
#endif

/*-------------------------------------------------------------------------*/

#ifdef	CONFIG_ARCH_OMAP_OTG

void __init
omap_otg_init(struct omap_usb_config *config)
{
553
	u32		syscon;
554 555 556 557 558
	int		status;
	int		alt_pingroup = 0;

	/* NOTE:  no bus or clock setup (yet?) */

559
	syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
560 561 562
	if (!(syscon & OTG_RESET_DONE))
		pr_debug("USB resets not complete?\n");

563
	//omap_writew(0, OTG_IRQ_EN);
564 565 566 567 568 569 570

	/* pin muxing and transceiver pinouts */
	if (config->pins[0] > 2)	/* alt pingroup 2 */
		alt_pingroup = 1;
	syscon |= omap_usb0_init(config->pins[0], is_usb0_device(config));
	syscon |= omap_usb1_init(config->pins[1]);
	syscon |= omap_usb2_init(config->pins[2], alt_pingroup);
571 572
	pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
	omap_writel(syscon, OTG_SYSCON_1);
573 574 575 576 577 578 579

	syscon = config->hmc_mode;
	syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
#ifdef	CONFIG_USB_OTG
	if (config->otg)
		syscon |= OTG_EN;
#endif
580
	if (cpu_class_is_omap1())
581 582 583 584
		pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
			 omap_readl(USB_TRANSCEIVER_CTRL));
	pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
	omap_writel(syscon, OTG_SYSCON_2);
585 586

	printk("USB: hmc %d", config->hmc_mode);
587
	if (!alt_pingroup)
588 589 590 591 592 593 594 595 596 597 598 599
		printk(", usb2 alt %d wires", config->pins[2]);
	else if (config->pins[0])
		printk(", usb0 %d wires%s", config->pins[0],
			is_usb0_device(config) ? " (dev)" : "");
	if (config->pins[1])
		printk(", usb1 %d wires", config->pins[1]);
	if (!alt_pingroup && config->pins[2])
		printk(", usb2 %d wires", config->pins[2]);
	if (config->otg)
		printk(", Mini-AB on usb%d", config->otg - 1);
	printk("\n");

600
	if (cpu_class_is_omap1()) {
601 602
		u16 w;

603
		/* leave USB clocks/controllers off until needed */
604 605 606 607 608 609 610 611
		w = omap_readw(ULPD_SOFT_REQ);
		w &= ~SOFT_USB_CLK_REQ;
		omap_writew(w, ULPD_SOFT_REQ);

		w = omap_readw(ULPD_CLOCK_CTRL);
		w &= ~USB_MCLK_EN;
		w |= DIS_USB_PVCI_CLK;
		omap_writew(w, ULPD_CLOCK_CTRL);
612
	}
613
	syscon = omap_readl(OTG_SYSCON_1);
614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649
	syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;

#ifdef	CONFIG_USB_GADGET_OMAP
	if (config->otg || config->register_dev) {
		syscon &= ~DEV_IDLE_EN;
		udc_device.dev.platform_data = config;
		/* FIXME patch IRQ numbers for omap730 */
		status = platform_device_register(&udc_device);
		if (status)
			pr_debug("can't register UDC device, %d\n", status);
	}
#endif

#if	defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
	if (config->otg || config->register_host) {
		syscon &= ~HST_IDLE_EN;
		ohci_device.dev.platform_data = config;
		if (cpu_is_omap730())
			ohci_resources[1].start = INT_730_USB_HHC_1;
		status = platform_device_register(&ohci_device);
		if (status)
			pr_debug("can't register OHCI device, %d\n", status);
	}
#endif

#ifdef	CONFIG_USB_OTG
	if (config->otg) {
		syscon &= ~OTG_IDLE_EN;
		otg_device.dev.platform_data = config;
		if (cpu_is_omap730())
			otg_resources[1].start = INT_730_USB_OTG;
		status = platform_device_register(&otg_device);
		if (status)
			pr_debug("can't register OTG device, %d\n", status);
	}
#endif
650 651
	pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
	omap_writel(syscon, OTG_SYSCON_1);
652 653 654 655 656 657 658 659 660 661

	status = 0;
}

#else
static inline void omap_otg_init(struct omap_usb_config *config) {}
#endif

/*-------------------------------------------------------------------------*/

662
#ifdef	CONFIG_ARCH_OMAP15XX
663

664
/* ULPD_DPLL_CTRL */
665 666 667 668
#define DPLL_IOB		(1 << 13)
#define DPLL_PLL_ENABLE		(1 << 4)
#define DPLL_LOCK		(1 << 0)

669
/* ULPD_APLL_CTRL */
670 671 672 673 674 675
#define APLL_NDPLL_SWITCH	(1 << 0)


static void __init omap_1510_usb_init(struct omap_usb_config *config)
{
	unsigned int val;
676
	u16 w;
677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696

	omap_usb0_init(config->pins[0], is_usb0_device(config));
	omap_usb1_init(config->pins[1]);
	omap_usb2_init(config->pins[2], 0);

	val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
	val |= (config->hmc_mode << 1);
	omap_writel(val, MOD_CONF_CTRL_0);

	printk("USB: hmc %d", config->hmc_mode);
	if (config->pins[0])
		printk(", usb0 %d wires%s", config->pins[0],
			is_usb0_device(config) ? " (dev)" : "");
	if (config->pins[1])
		printk(", usb1 %d wires", config->pins[1]);
	if (config->pins[2])
		printk(", usb2 %d wires", config->pins[2]);
	printk("\n");

	/* use DPLL for 48 MHz function clock */
697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712
	pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
			omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));

	w = omap_readw(ULPD_APLL_CTRL);
	w &= ~APLL_NDPLL_SWITCH;
	omap_writew(w, ULPD_APLL_CTRL);

	w = omap_readw(ULPD_DPLL_CTRL);
	w |= DPLL_IOB | DPLL_PLL_ENABLE;
	omap_writew(w, ULPD_DPLL_CTRL);

	w = omap_readw(ULPD_SOFT_REQ);
	w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
	omap_writew(w, ULPD_SOFT_REQ);

	while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
713 714 715 716
		cpu_relax();

#ifdef	CONFIG_USB_GADGET_OMAP
	if (config->register_dev) {
717 718
		int status;

719 720 721 722 723 724 725 726 727 728
		udc_device.dev.platform_data = config;
		status = platform_device_register(&udc_device);
		if (status)
			pr_debug("can't register UDC device, %d\n", status);
		/* udc driver gates 48MHz by D+ pullup */
	}
#endif

#if	defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
	if (config->register_host) {
729 730
		int status;

731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760
		ohci_device.dev.platform_data = config;
		status = platform_device_register(&ohci_device);
		if (status)
			pr_debug("can't register OHCI device, %d\n", status);
		/* hcd explicitly gates 48MHz */
	}
#endif
}

#else
static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
#endif

/*-------------------------------------------------------------------------*/

static struct omap_usb_config platform_data;

static int __init
omap_usb_init(void)
{
	const struct omap_usb_config *config;

	config = omap_get_config(OMAP_TAG_USB, struct omap_usb_config);
	if (config == NULL) {
		printk(KERN_ERR "USB: No board-specific "
				"platform config found\n");
		return -ENODEV;
	}
	platform_data = *config;

761
	if (cpu_is_omap730() || cpu_is_omap16xx() || cpu_is_omap24xx())
762 763 764 765 766 767 768 769 770 771 772
		omap_otg_init(&platform_data);
	else if (cpu_is_omap15xx())
		omap_1510_usb_init(&platform_data);
	else {
		printk(KERN_ERR "USB: No init for your chip yet\n");
		return -ENODEV;
	}
	return 0;
}

subsys_initcall(omap_usb_init);