cpudata.h 6.6 KB
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/* cpudata.h: Per-cpu parameters.
 *
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 * Copyright (C) 2003, 2005, 2006 David S. Miller (davem@davemloft.net)
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 */

#ifndef _SPARC64_CPUDATA_H
#define _SPARC64_CPUDATA_H

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#include <asm/hypervisor.h>
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#include <asm/asi.h>
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#ifndef __ASSEMBLY__

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#include <linux/percpu.h>
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#include <linux/threads.h>
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typedef struct {
	/* Dcache line 1 */
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	unsigned int	__softirq_pending; /* must be 1st, see rtrap.S */
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	unsigned int	multiplier;
	unsigned int	counter;
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	unsigned int	__pad1;
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	unsigned long	clock_tick;	/* %tick's per second */
	unsigned long	udelay_val;

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	/* Dcache line 2, rarely used */
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	unsigned int	dcache_size;
	unsigned int	dcache_line_size;
	unsigned int	icache_size;
	unsigned int	icache_line_size;
	unsigned int	ecache_size;
	unsigned int	ecache_line_size;
	unsigned int	__pad3;
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	unsigned int	__pad4;
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} cpuinfo_sparc;

DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data);
#define cpu_data(__cpu)		per_cpu(__cpu_data, (__cpu))
#define local_cpu_data()	__get_cpu_var(__cpu_data)

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/* Trap handling code needs to get at a few critical values upon
 * trap entry and to process TSB misses.  These cannot be in the
 * per_cpu() area as we really need to lock them into the TLB and
 * thus make them part of the main kernel image.  As a result we
 * try to make this as small as possible.
 *
 * This is padded out and aligned to 64-bytes to avoid false sharing
 * on SMP.
 */

/* If you modify the size of this structure, please update
 * TRAP_BLOCK_SZ_SHIFT below.
 */
struct thread_info;
struct trap_per_cpu {
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/* D-cache line 1: Basic thread information, cpu and device mondo queues */
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	struct thread_info	*thread;
	unsigned long		pgd_paddr;
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	unsigned long		cpu_mondo_pa;
	unsigned long		dev_mondo_pa;
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/* D-cache line 2: Error Mondo Queue and kernel buffer pointers */
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	unsigned long		resum_mondo_pa;
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	unsigned long		resum_kernel_buf_pa;
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	unsigned long		nonresum_mondo_pa;
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	unsigned long		nonresum_kernel_buf_pa;
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/* Dcache lines 3, 4, 5, and 6: Hypervisor Fault Status */
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	struct hv_fault_status	fault_info;
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/* Dcache line 7: Physical addresses of CPU send mondo block and CPU list.  */
	unsigned long		cpu_mondo_block_pa;
	unsigned long		cpu_list_pa;
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	unsigned long		tsb_huge;
	unsigned long		tsb_huge_temp;
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/* Dcache line 8: Unused, needed to keep trap_block a power-of-2 in size.  */
	unsigned long		__pad2[4];
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} __attribute__((aligned(64)));
extern struct trap_per_cpu trap_block[NR_CPUS];
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extern void init_cur_cpu_trap(struct thread_info *);
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extern void setup_tba(void);
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struct cpuid_patch_entry {
	unsigned int	addr;
	unsigned int	cheetah_safari[4];
	unsigned int	cheetah_jbus[4];
	unsigned int	starfire[4];
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	unsigned int	sun4v[4];
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};
extern struct cpuid_patch_entry __cpuid_patch, __cpuid_patch_end;

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struct sun4v_1insn_patch_entry {
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	unsigned int	addr;
	unsigned int	insn;
};
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extern struct sun4v_1insn_patch_entry __sun4v_1insn_patch,
	__sun4v_1insn_patch_end;
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struct sun4v_2insn_patch_entry {
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	unsigned int	addr;
	unsigned int	insns[2];
};
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extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
	__sun4v_2insn_patch_end;

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#endif /* !(__ASSEMBLY__) */

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#define TRAP_PER_CPU_THREAD		0x00
#define TRAP_PER_CPU_PGD_PADDR		0x08
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#define TRAP_PER_CPU_CPU_MONDO_PA	0x10
#define TRAP_PER_CPU_DEV_MONDO_PA	0x18
#define TRAP_PER_CPU_RESUM_MONDO_PA	0x20
#define TRAP_PER_CPU_RESUM_KBUF_PA	0x28
#define TRAP_PER_CPU_NONRESUM_MONDO_PA	0x30
#define TRAP_PER_CPU_NONRESUM_KBUF_PA	0x38
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#define TRAP_PER_CPU_FAULT_INFO		0x40
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#define TRAP_PER_CPU_CPU_MONDO_BLOCK_PA	0xc0
#define TRAP_PER_CPU_CPU_LIST_PA	0xc8
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#define TRAP_PER_CPU_TSB_HUGE		0xd0
#define TRAP_PER_CPU_TSB_HUGE_TEMP	0xd8
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#define TRAP_BLOCK_SZ_SHIFT		8
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#include <asm/scratchpad.h>

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#define __GET_CPUID(REG)				\
	/* Spitfire implementation (default). */	\
661:	ldxa		[%g0] ASI_UPA_CONFIG, REG;	\
	srlx		REG, 17, REG;			\
	 and		REG, 0x1f, REG;			\
	nop;						\
	.section	.cpuid_patch, "ax";		\
	/* Instruction location. */			\
	.word		661b;				\
	/* Cheetah Safari implementation. */		\
	ldxa		[%g0] ASI_SAFARI_CONFIG, REG;	\
	srlx		REG, 17, REG;			\
	and		REG, 0x3ff, REG;		\
	nop;						\
	/* Cheetah JBUS implementation. */		\
	ldxa		[%g0] ASI_JBUS_CONFIG, REG;	\
	srlx		REG, 17, REG;			\
	and		REG, 0x1f, REG;			\
	nop;						\
	/* Starfire implementation. */			\
	sethi		%hi(0x1fff40000d0 >> 9), REG;	\
	sllx		REG, 9, REG;			\
	or		REG, 0xd0, REG;			\
	lduwa		[REG] ASI_PHYS_BYPASS_EC_E, REG;\
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	/* sun4v implementation. */			\
	mov		SCRATCHPAD_CPUID, REG;		\
	ldxa		[REG] ASI_SCRATCHPAD, REG;	\
	nop;						\
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	nop;						\
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	.previous;
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#ifdef CONFIG_SMP

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#define TRAP_LOAD_TRAP_BLOCK(DEST, TMP)		\
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	__GET_CPUID(TMP)			\
	sethi	%hi(trap_block), DEST;		\
	sllx	TMP, TRAP_BLOCK_SZ_SHIFT, TMP;	\
	or	DEST, %lo(trap_block), DEST;	\
	add	DEST, TMP, DEST;		\
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/* Clobbers TMP, current address space PGD phys address into DEST.  */
#define TRAP_LOAD_PGD_PHYS(DEST, TMP)		\
	TRAP_LOAD_TRAP_BLOCK(DEST, TMP)		\
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	ldx	[DEST + TRAP_PER_CPU_PGD_PADDR], DEST;

/* Clobbers TMP, loads local processor's IRQ work area into DEST.  */
#define TRAP_LOAD_IRQ_WORK(DEST, TMP)		\
	__GET_CPUID(TMP)			\
	sethi	%hi(__irq_work), DEST;		\
	sllx	TMP, 6, TMP;			\
	or	DEST, %lo(__irq_work), DEST;	\
	add	DEST, TMP, DEST;

/* Clobbers TMP, loads DEST with current thread info pointer.  */
#define TRAP_LOAD_THREAD_REG(DEST, TMP)		\
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	TRAP_LOAD_TRAP_BLOCK(DEST, TMP)		\
	ldx	[DEST + TRAP_PER_CPU_THREAD], DEST;
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/* Given the current thread info pointer in THR, load the per-cpu
 * area base of the current processor into DEST.  REG1, REG2, and REG3 are
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 * clobbered.
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 *
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 * You absolutely cannot use DEST as a temporary in this code.  The
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 * reason is that traps can happen during execution, and return from
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 * trap will load the fully resolved DEST per-cpu base.  This can corrupt
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 * the calculations done by the macro mid-stream.
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 */
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#define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3)	\
	ldub	[THR + TI_CPU], REG1;			\
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	sethi	%hi(__per_cpu_shift), REG3;		\
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	sethi	%hi(__per_cpu_base), REG2;		\
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	ldx	[REG3 + %lo(__per_cpu_shift)], REG3;	\
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	ldx	[REG2 + %lo(__per_cpu_base)], REG2;	\
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	sllx	REG1, REG3, REG3;			\
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	add	REG3, REG2, DEST;
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#else
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#define TRAP_LOAD_TRAP_BLOCK(DEST, TMP)		\
	sethi	%hi(trap_block), DEST;		\
	or	DEST, %lo(trap_block), DEST;	\
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/* Uniprocessor versions, we know the cpuid is zero.  */
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#define TRAP_LOAD_PGD_PHYS(DEST, TMP)		\
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	TRAP_LOAD_TRAP_BLOCK(DEST, TMP)		\
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	ldx	[DEST + TRAP_PER_CPU_PGD_PADDR], DEST;
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#define TRAP_LOAD_IRQ_WORK(DEST, TMP)		\
	sethi	%hi(__irq_work), DEST;		\
	or	DEST, %lo(__irq_work), DEST;
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#define TRAP_LOAD_THREAD_REG(DEST, TMP)		\
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	TRAP_LOAD_TRAP_BLOCK(DEST, TMP)		\
	ldx	[DEST + TRAP_PER_CPU_THREAD], DEST;
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/* No per-cpu areas on uniprocessor, so no need to load DEST.  */
#define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3)
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#endif /* !(CONFIG_SMP) */
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#endif /* _SPARC64_CPUDATA_H */