tw9910.c 23.1 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
/*
 * tw9910 Video Driver
 *
 * Copyright (C) 2008 Renesas Solutions Corp.
 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
 *
 * Based on ov772x driver,
 *
 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
 * Copyright (C) 2008 Magnus Damm
 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/init.h>
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/videodev2.h>
#include <media/v4l2-chip-ident.h>
27
#include <media/v4l2-subdev.h>
28 29 30 31
#include <media/soc_camera.h>
#include <media/tw9910.h>

#define GET_ID(val)  ((val & 0xF8) >> 3)
32
#define GET_REV(val) (val & 0x07)
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119

/*
 * register offset
 */
#define ID		0x00 /* Product ID Code Register */
#define STATUS1		0x01 /* Chip Status Register I */
#define INFORM		0x02 /* Input Format */
#define OPFORM		0x03 /* Output Format Control Register */
#define DLYCTR		0x04 /* Hysteresis and HSYNC Delay Control */
#define OUTCTR1		0x05 /* Output Control I */
#define ACNTL1		0x06 /* Analog Control Register 1 */
#define CROP_HI		0x07 /* Cropping Register, High */
#define VDELAY_LO	0x08 /* Vertical Delay Register, Low */
#define VACTIVE_LO	0x09 /* Vertical Active Register, Low */
#define HDELAY_LO	0x0A /* Horizontal Delay Register, Low */
#define HACTIVE_LO	0x0B /* Horizontal Active Register, Low */
#define CNTRL1		0x0C /* Control Register I */
#define VSCALE_LO	0x0D /* Vertical Scaling Register, Low */
#define SCALE_HI	0x0E /* Scaling Register, High */
#define HSCALE_LO	0x0F /* Horizontal Scaling Register, Low */
#define BRIGHT		0x10 /* BRIGHTNESS Control Register */
#define CONTRAST	0x11 /* CONTRAST Control Register */
#define SHARPNESS	0x12 /* SHARPNESS Control Register I */
#define SAT_U		0x13 /* Chroma (U) Gain Register */
#define SAT_V		0x14 /* Chroma (V) Gain Register */
#define HUE		0x15 /* Hue Control Register */
#define CORING1		0x17
#define CORING2		0x18 /* Coring and IF compensation */
#define VBICNTL		0x19 /* VBI Control Register */
#define ACNTL2		0x1A /* Analog Control 2 */
#define OUTCTR2		0x1B /* Output Control 2 */
#define SDT		0x1C /* Standard Selection */
#define SDTR		0x1D /* Standard Recognition */
#define TEST		0x1F /* Test Control Register */
#define CLMPG		0x20 /* Clamping Gain */
#define IAGC		0x21 /* Individual AGC Gain */
#define AGCGAIN		0x22 /* AGC Gain */
#define PEAKWT		0x23 /* White Peak Threshold */
#define CLMPL		0x24 /* Clamp level */
#define SYNCT		0x25 /* Sync Amplitude */
#define MISSCNT		0x26 /* Sync Miss Count Register */
#define PCLAMP		0x27 /* Clamp Position Register */
#define VCNTL1		0x28 /* Vertical Control I */
#define VCNTL2		0x29 /* Vertical Control II */
#define CKILL		0x2A /* Color Killer Level Control */
#define COMB		0x2B /* Comb Filter Control */
#define LDLY		0x2C /* Luma Delay and H Filter Control */
#define MISC1		0x2D /* Miscellaneous Control I */
#define LOOP		0x2E /* LOOP Control Register */
#define MISC2		0x2F /* Miscellaneous Control II */
#define MVSN		0x30 /* Macrovision Detection */
#define STATUS2		0x31 /* Chip STATUS II */
#define HFREF		0x32 /* H monitor */
#define CLMD		0x33 /* CLAMP MODE */
#define IDCNTL		0x34 /* ID Detection Control */
#define CLCNTL1		0x35 /* Clamp Control I */
#define ANAPLLCTL	0x4C
#define VBIMIN		0x4D
#define HSLOWCTL	0x4E
#define WSS3		0x4F
#define FILLDATA	0x50
#define SDID		0x51
#define DID		0x52
#define WSS1		0x53
#define WSS2		0x54
#define VVBI		0x55
#define LCTL6		0x56
#define LCTL7		0x57
#define LCTL8		0x58
#define LCTL9		0x59
#define LCTL10		0x5A
#define LCTL11		0x5B
#define LCTL12		0x5C
#define LCTL13		0x5D
#define LCTL14		0x5E
#define LCTL15		0x5F
#define LCTL16		0x60
#define LCTL17		0x61
#define LCTL18		0x62
#define LCTL19		0x63
#define LCTL20		0x64
#define LCTL21		0x65
#define LCTL22		0x66
#define LCTL23		0x67
#define LCTL24		0x68
#define LCTL25		0x69
#define LCTL26		0x6A
120
#define HSBEGIN		0x6B
121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154
#define HSEND		0x6C
#define OVSDLY		0x6D
#define OVSEND		0x6E
#define VBIDELAY	0x6F

/*
 * register detail
 */

/* INFORM */
#define FC27_ON     0x40 /* 1 : Input crystal clock frequency is 27MHz */
#define FC27_FF     0x00 /* 0 : Square pixel mode. */
			 /*     Must use 24.54MHz for 60Hz field rate */
			 /*     source or 29.5MHz for 50Hz field rate */
#define IFSEL_S     0x10 /* 01 : S-video decoding */
#define IFSEL_C     0x00 /* 00 : Composite video decoding */
			 /* Y input video selection */
#define YSEL_M0     0x00 /*  00 : Mux0 selected */
#define YSEL_M1     0x04 /*  01 : Mux1 selected */
#define YSEL_M2     0x08 /*  10 : Mux2 selected */
#define YSEL_M3     0x10 /*  11 : Mux3 selected */

/* OPFORM */
#define MODE        0x80 /* 0 : CCIR601 compatible YCrCb 4:2:2 format */
			 /* 1 : ITU-R-656 compatible data sequence format */
#define LEN         0x40 /* 0 : 8-bit YCrCb 4:2:2 output format */
			 /* 1 : 16-bit YCrCb 4:2:2 output format.*/
#define LLCMODE     0x20 /* 1 : LLC output mode. */
			 /* 0 : free-run output mode */
#define AINC        0x10 /* Serial interface auto-indexing control */
			 /* 0 : auto-increment */
			 /* 1 : non-auto */
#define VSCTL       0x08 /* 1 : Vertical out ctrl by DVALID */
			 /* 0 : Vertical out ctrl by HACTIVE and DVALID */
155 156 157 158
#define OEN_TRI_SEL_MASK	0x07
#define OEN_TRI_SEL_ALL_ON	0x00 /* Enable output for Rev0/Rev1 */
#define OEN_TRI_SEL_ALL_OFF_r0	0x06 /* All tri-stated for Rev0 */
#define OEN_TRI_SEL_ALL_OFF_r1	0x07 /* All tri-stated for Rev1 */
159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183

/* OUTCTR1 */
#define VSP_LO      0x00 /* 0 : VS pin output polarity is active low */
#define VSP_HI      0x80 /* 1 : VS pin output polarity is active high. */
			 /* VS pin output control */
#define VSSL_VSYNC  0x00 /*   0 : VSYNC  */
#define VSSL_VACT   0x10 /*   1 : VACT   */
#define VSSL_FIELD  0x20 /*   2 : FIELD  */
#define VSSL_VVALID 0x30 /*   3 : VVALID */
#define VSSL_ZERO   0x70 /*   7 : 0      */
#define HSP_LOW     0x00 /* 0 : HS pin output polarity is active low */
#define HSP_HI      0x08 /* 1 : HS pin output polarity is active high.*/
			 /* HS pin output control */
#define HSSL_HACT   0x00 /*   0 : HACT   */
#define HSSL_HSYNC  0x01 /*   1 : HSYNC  */
#define HSSL_DVALID 0x02 /*   2 : DVALID */
#define HSSL_HLOCK  0x03 /*   3 : HLOCK  */
#define HSSL_ASYNCW 0x04 /*   4 : ASYNCW */
#define HSSL_ZERO   0x07 /*   7 : 0      */

/* ACNTL1 */
#define SRESET      0x80 /* resets the device to its default state
			  * but all register content remain unchanged.
			  * This bit is self-resetting.
			  */
184 185 186 187 188 189 190 191
#define ACNTL1_PDN_MASK	0x0e
#define CLK_PDN		0x08 /* system clock power down */
#define Y_PDN		0x04 /* Luma ADC power down */
#define C_PDN		0x02 /* Chroma ADC power down */

/* ACNTL2 */
#define ACNTL2_PDN_MASK	0x40
#define PLL_PDN		0x40 /* PLL power down */
192 193

/* VBICNTL */
194 195

/* RTSEL : control the real time signal output from the MPOUT pin */
196 197 198 199 200 201 202 203 204 205
#define RTSEL_MASK  0x07
#define RTSEL_VLOSS 0x00 /* 0000 = Video loss */
#define RTSEL_HLOCK 0x01 /* 0001 = H-lock */
#define RTSEL_SLOCK 0x02 /* 0010 = S-lock */
#define RTSEL_VLOCK 0x03 /* 0011 = V-lock */
#define RTSEL_MONO  0x04 /* 0100 = MONO */
#define RTSEL_DET50 0x05 /* 0101 = DET50 */
#define RTSEL_FIELD 0x06 /* 0110 = FIELD */
#define RTSEL_RTCO  0x07 /* 0111 = RTCO ( Real Time Control ) */

206 207 208 209
/* HSYNC start and end are constant for now */
#define HSYNC_START	0x0260
#define HSYNC_END	0x0300

210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227
/*
 * structure
 */

struct regval_list {
	unsigned char reg_num;
	unsigned char value;
};

struct tw9910_scale_ctrl {
	char           *name;
	unsigned short  width;
	unsigned short  height;
	u16             hscale;
	u16             vscale;
};

struct tw9910_priv {
228 229 230 231
	struct v4l2_subdev		subdev;
	struct tw9910_video_info	*info;
	const struct tw9910_scale_ctrl	*scale;
	u32				revision;
232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326
};

static const struct tw9910_scale_ctrl tw9910_ntsc_scales[] = {
	{
		.name   = "NTSC SQ",
		.width  = 640,
		.height = 480,
		.hscale = 0x0100,
		.vscale = 0x0100,
	},
	{
		.name   = "NTSC CCIR601",
		.width  = 720,
		.height = 480,
		.hscale = 0x0100,
		.vscale = 0x0100,
	},
	{
		.name   = "NTSC SQ (CIF)",
		.width  = 320,
		.height = 240,
		.hscale = 0x0200,
		.vscale = 0x0200,
	},
	{
		.name   = "NTSC CCIR601 (CIF)",
		.width  = 360,
		.height = 240,
		.hscale = 0x0200,
		.vscale = 0x0200,
	},
	{
		.name   = "NTSC SQ (QCIF)",
		.width  = 160,
		.height = 120,
		.hscale = 0x0400,
		.vscale = 0x0400,
	},
	{
		.name   = "NTSC CCIR601 (QCIF)",
		.width  = 180,
		.height = 120,
		.hscale = 0x0400,
		.vscale = 0x0400,
	},
};

static const struct tw9910_scale_ctrl tw9910_pal_scales[] = {
	{
		.name   = "PAL SQ",
		.width  = 768,
		.height = 576,
		.hscale = 0x0100,
		.vscale = 0x0100,
	},
	{
		.name   = "PAL CCIR601",
		.width  = 720,
		.height = 576,
		.hscale = 0x0100,
		.vscale = 0x0100,
	},
	{
		.name   = "PAL SQ (CIF)",
		.width  = 384,
		.height = 288,
		.hscale = 0x0200,
		.vscale = 0x0200,
	},
	{
		.name   = "PAL CCIR601 (CIF)",
		.width  = 360,
		.height = 288,
		.hscale = 0x0200,
		.vscale = 0x0200,
	},
	{
		.name   = "PAL SQ (QCIF)",
		.width  = 192,
		.height = 144,
		.hscale = 0x0400,
		.vscale = 0x0400,
	},
	{
		.name   = "PAL CCIR601 (QCIF)",
		.width  = 180,
		.height = 144,
		.hscale = 0x0400,
		.vscale = 0x0400,
	},
};

/*
 * general function
 */
327 328
static struct tw9910_priv *to_tw9910(const struct i2c_client *client)
{
329 330
	return container_of(i2c_get_clientdata(client), struct tw9910_priv,
			    subdev);
331 332
}

333 334 335 336 337 338 339 340 341 342 343 344 345
static int tw9910_mask_set(struct i2c_client *client, u8 command,
			   u8 mask, u8 set)
{
	s32 val = i2c_smbus_read_byte_data(client, command);
	if (val < 0)
		return val;

	val &= ~mask;
	val |= set & mask;

	return i2c_smbus_write_byte_data(client, command, val);
}

346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367
static int tw9910_set_scale(struct i2c_client *client,
			    const struct tw9910_scale_ctrl *scale)
{
	int ret;

	ret = i2c_smbus_write_byte_data(client, SCALE_HI,
					(scale->vscale & 0x0F00) >> 4 |
					(scale->hscale & 0x0F00) >> 8);
	if (ret < 0)
		return ret;

	ret = i2c_smbus_write_byte_data(client, HSCALE_LO,
					scale->hscale & 0x00FF);
	if (ret < 0)
		return ret;

	ret = i2c_smbus_write_byte_data(client, VSCALE_LO,
					scale->vscale & 0x00FF);

	return ret;
}

368
static int tw9910_set_hsync(struct i2c_client *client)
369
{
370
	struct tw9910_priv *priv = to_tw9910(client);
371 372 373
	int ret;

	/* bit 10 - 3 */
374
	ret = i2c_smbus_write_byte_data(client, HSBEGIN,
375
					(HSYNC_START & 0x07F8) >> 3);
376 377 378 379 380
	if (ret < 0)
		return ret;

	/* bit 10 - 3 */
	ret = i2c_smbus_write_byte_data(client, HSEND,
381
					(HSYNC_END & 0x07F8) >> 3);
382 383 384
	if (ret < 0)
		return ret;

385
	/* So far only revisions 0 and 1 have been seen */
386
	/* bit 2 - 0 */
387 388
	if (1 == priv->revision)
		ret = tw9910_mask_set(client, HSLOWCTL, 0x77,
389 390
				      (HSYNC_START & 0x0007) << 4 |
				      (HSYNC_END   & 0x0007));
391 392 393 394 395 396

	return ret;
}

static void tw9910_reset(struct i2c_client *client)
{
397
	tw9910_mask_set(client, ACNTL1, SRESET, SRESET);
398 399 400
	msleep(1);
}

401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421
static int tw9910_power(struct i2c_client *client, int enable)
{
	int ret;
	u8 acntl1;
	u8 acntl2;

	if (enable) {
		acntl1 = 0;
		acntl2 = 0;
	} else {
		acntl1 = CLK_PDN | Y_PDN | C_PDN;
		acntl2 = PLL_PDN;
	}

	ret = tw9910_mask_set(client, ACNTL1, ACNTL1_PDN_MASK, acntl1);
	if (ret < 0)
		return ret;

	return tw9910_mask_set(client, ACNTL2, ACNTL2_PDN_MASK, acntl2);
}

422 423
static const struct tw9910_scale_ctrl *tw9910_select_norm(struct soc_camera_device *icd,
							  u32 width, u32 height)
424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455
{
	const struct tw9910_scale_ctrl *scale;
	const struct tw9910_scale_ctrl *ret = NULL;
	v4l2_std_id norm = icd->vdev->current_norm;
	__u32 diff = 0xffffffff, tmp;
	int size, i;

	if (norm & V4L2_STD_NTSC) {
		scale = tw9910_ntsc_scales;
		size = ARRAY_SIZE(tw9910_ntsc_scales);
	} else if (norm & V4L2_STD_PAL) {
		scale = tw9910_pal_scales;
		size = ARRAY_SIZE(tw9910_pal_scales);
	} else {
		return NULL;
	}

	for (i = 0; i < size; i++) {
		tmp = abs(width - scale[i].width) +
			abs(height - scale[i].height);
		if (tmp < diff) {
			diff = tmp;
			ret = scale + i;
		}
	}

	return ret;
}

/*
 * soc_camera_ops function
 */
456
static int tw9910_s_stream(struct v4l2_subdev *sd, int enable)
457
{
458
	struct i2c_client *client = v4l2_get_subdevdata(sd);
459
	struct tw9910_priv *priv = to_tw9910(client);
460
	u8 val;
461
	int ret;
462 463 464 465 466 467 468 469 470 471 472 473 474 475 476

	if (!enable) {
		switch (priv->revision) {
		case 0:
			val = OEN_TRI_SEL_ALL_OFF_r0;
			break;
		case 1:
			val = OEN_TRI_SEL_ALL_OFF_r1;
			break;
		default:
			dev_err(&client->dev, "un-supported revision\n");
			return -EINVAL;
		}
	} else {
		val = OEN_TRI_SEL_ALL_ON;
477

478 479 480 481
		if (!priv->scale) {
			dev_err(&client->dev, "norm select error\n");
			return -EPERM;
		}
482

483 484 485 486 487
		dev_dbg(&client->dev, "%s %dx%d\n",
			priv->scale->name,
			priv->scale->width,
			priv->scale->height);
	}
488

489 490 491 492 493
	ret = tw9910_mask_set(client, OPFORM, OEN_TRI_SEL_MASK, val);
	if (ret < 0)
		return ret;

	return tw9910_power(client, enable);
494 495 496 497 498
}

static int tw9910_set_bus_param(struct soc_camera_device *icd,
				unsigned long flags)
{
499
	struct soc_camera_link *icl = to_soc_camera_link(icd);
500
	struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
501
	struct i2c_client *client = v4l2_get_subdevdata(sd);
502
	u8 val = VSSL_VVALID | HSSL_DVALID;
503

504 505
	flags = soc_camera_apply_sensor_flags(icl, flags);

506 507
	/*
	 * set OUTCTR1
508 509 510
	 *
	 * We use VVALID and DVALID signals to control VSYNC and HSYNC
	 * outputs, in this mode their polarity is inverted.
511
	 */
512 513 514 515 516 517 518
	if (flags & SOCAM_HSYNC_ACTIVE_LOW)
		val |= HSP_HI;

	if (flags & SOCAM_VSYNC_ACTIVE_LOW)
		val |= VSP_HI;

	return i2c_smbus_write_byte_data(client, OUTCTR1, val);
519 520 521 522
}

static unsigned long tw9910_query_bus_param(struct soc_camera_device *icd)
{
523
	struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd));
524
	struct tw9910_priv *priv = to_tw9910(client);
525
	struct soc_camera_link *icl = to_soc_camera_link(icd);
526 527
	unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
		SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
528
		SOCAM_VSYNC_ACTIVE_LOW  | SOCAM_HSYNC_ACTIVE_LOW  |
529 530 531 532 533
		SOCAM_DATA_ACTIVE_HIGH | priv->info->buswidth;

	return soc_camera_apply_sensor_flags(icl, flags);
}

534
static int tw9910_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
535 536 537
{
	int ret = -EINVAL;

538
	if (norm & (V4L2_STD_NTSC | V4L2_STD_PAL))
539 540 541 542 543
		ret = 0;

	return ret;
}

544 545 546
static int tw9910_g_chip_ident(struct v4l2_subdev *sd,
			       struct v4l2_dbg_chip_ident *id)
{
547
	struct i2c_client *client = v4l2_get_subdevdata(sd);
548 549
	struct tw9910_priv *priv = to_tw9910(client);

550
	id->ident = V4L2_IDENT_TW9910;
551
	id->revision = priv->revision;
552 553 554 555

	return 0;
}

556
#ifdef CONFIG_VIDEO_ADV_DEBUG
557 558
static int tw9910_g_register(struct v4l2_subdev *sd,
			     struct v4l2_dbg_register *reg)
559
{
560
	struct i2c_client *client = v4l2_get_subdevdata(sd);
561 562 563 564 565
	int ret;

	if (reg->reg > 0xff)
		return -EINVAL;

566
	ret = i2c_smbus_read_byte_data(client, reg->reg);
567 568 569
	if (ret < 0)
		return ret;

570 571
	/*
	 * ret      = int
572 573 574 575 576 577 578
	 * reg->val = __u64
	 */
	reg->val = (__u64)ret;

	return 0;
}

579 580
static int tw9910_s_register(struct v4l2_subdev *sd,
			     struct v4l2_dbg_register *reg)
581
{
582
	struct i2c_client *client = v4l2_get_subdevdata(sd);
583 584 585 586 587

	if (reg->reg > 0xff ||
	    reg->val > 0xff)
		return -EINVAL;

588
	return i2c_smbus_write_byte_data(client, reg->reg, reg->val);
589 590 591
}
#endif

592
static int tw9910_set_frame(struct v4l2_subdev *sd, u32 *width, u32 *height)
593
{
594
	struct i2c_client *client = v4l2_get_subdevdata(sd);
595
	struct tw9910_priv *priv = to_tw9910(client);
596
	struct soc_camera_device *icd = client->dev.platform_data;
597 598
	int ret = -EINVAL;
	u8 val;
599 600 601 602

	/*
	 * select suitable norm
	 */
603
	priv->scale = tw9910_select_norm(icd, *width, *height);
604
	if (!priv->scale)
605
		goto tw9910_set_fmt_error;
606 607 608 609

	/*
	 * reset hardware
	 */
610
	tw9910_reset(client);
611

612 613 614 615 616 617 618
	/*
	 * set bus width
	 */
	val = 0x00;
	if (SOCAM_DATAWIDTH_16 == priv->info->buswidth)
		val = LEN;

619
	ret = tw9910_mask_set(client, OPFORM, LEN, val);
620
	if (ret < 0)
621
		goto tw9910_set_fmt_error;
622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646

	/*
	 * select MPOUT behavior
	 */
	switch (priv->info->mpout) {
	case TW9910_MPO_VLOSS:
		val = RTSEL_VLOSS; break;
	case TW9910_MPO_HLOCK:
		val = RTSEL_HLOCK; break;
	case TW9910_MPO_SLOCK:
		val = RTSEL_SLOCK; break;
	case TW9910_MPO_VLOCK:
		val = RTSEL_VLOCK; break;
	case TW9910_MPO_MONO:
		val = RTSEL_MONO;  break;
	case TW9910_MPO_DET50:
		val = RTSEL_DET50; break;
	case TW9910_MPO_FIELD:
		val = RTSEL_FIELD; break;
	case TW9910_MPO_RTCO:
		val = RTSEL_RTCO;  break;
	default:
		val = 0;
	}

647
	ret = tw9910_mask_set(client, VBICNTL, RTSEL_MASK, val);
648
	if (ret < 0)
649
		goto tw9910_set_fmt_error;
650 651 652 653

	/*
	 * set scale
	 */
654
	ret = tw9910_set_scale(client, priv->scale);
655
	if (ret < 0)
656
		goto tw9910_set_fmt_error;
657 658 659 660

	/*
	 * set hsync
	 */
661
	ret = tw9910_set_hsync(client);
662 663 664
	if (ret < 0)
		goto tw9910_set_fmt_error;

665 666
	*width = priv->scale->width;
	*height = priv->scale->height;
667

668 669 670 671
	return ret;

tw9910_set_fmt_error:

672
	tw9910_reset(client);
673
	priv->scale = NULL;
674 675 676 677

	return ret;
}

678 679
static int tw9910_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
{
680
	struct i2c_client *client = v4l2_get_subdevdata(sd);
681
	struct soc_camera_device *icd = client->dev.platform_data;
682 683 684

	a->c.left	= 0;
	a->c.top	= 0;
685 686 687 688 689 690 691
	if (icd->vdev->current_norm & V4L2_STD_NTSC) {
		a->c.width	= 640;
		a->c.height	= 480;
	} else {
		a->c.width	= 768;
		a->c.height	= 576;
	}
692 693 694 695 696 697 698
	a->type		= V4L2_BUF_TYPE_VIDEO_CAPTURE;

	return 0;
}

static int tw9910_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
{
699 700 701
	struct i2c_client *client = v4l2_get_subdevdata(sd);
	struct soc_camera_device *icd = client->dev.platform_data;

702 703
	a->bounds.left			= 0;
	a->bounds.top			= 0;
704 705 706 707 708 709 710 711
	if (icd->vdev->current_norm & V4L2_STD_NTSC) {
		a->bounds.width		= 640;
		a->bounds.height	= 480;
	} else {
		a->bounds.width		= 768;
		a->bounds.height	= 576;
	}
	a->defrect			= a->bounds;
712 713 714 715 716 717 718
	a->type				= V4L2_BUF_TYPE_VIDEO_CAPTURE;
	a->pixelaspect.numerator	= 1;
	a->pixelaspect.denominator	= 1;

	return 0;
}

719 720
static int tw9910_g_fmt(struct v4l2_subdev *sd,
			struct v4l2_mbus_framefmt *mf)
721
{
722
	struct i2c_client *client = v4l2_get_subdevdata(sd);
723 724 725 726
	struct tw9910_priv *priv = to_tw9910(client);

	if (!priv->scale) {
		int ret;
727 728
		u32 width = 640, height = 480;
		ret = tw9910_set_frame(sd, &width, &height);
729 730 731 732
		if (ret < 0)
			return ret;
	}

733 734
	mf->width	= priv->scale->width;
	mf->height	= priv->scale->height;
735
	mf->code	= V4L2_MBUS_FMT_UYVY8_2X8;
736
	mf->colorspace	= V4L2_COLORSPACE_JPEG;
737
	mf->field	= V4L2_FIELD_INTERLACED_BT;
738 739 740 741

	return 0;
}

742 743
static int tw9910_s_fmt(struct v4l2_subdev *sd,
			struct v4l2_mbus_framefmt *mf)
744
{
745
	u32 width = mf->width, height = mf->height;
746 747 748
	int ret;

	WARN_ON(mf->field != V4L2_FIELD_ANY &&
749
		mf->field != V4L2_FIELD_INTERLACED_BT);
750 751 752 753

	/*
	 * check color format
	 */
754
	if (mf->code != V4L2_MBUS_FMT_UYVY8_2X8)
755 756
		return -EINVAL;

757 758
	mf->colorspace = V4L2_COLORSPACE_JPEG;

759
	ret = tw9910_set_frame(sd, &width, &height);
760
	if (!ret) {
761 762
		mf->width	= width;
		mf->height	= height;
763 764
	}
	return ret;
765 766
}

767 768
static int tw9910_try_fmt(struct v4l2_subdev *sd,
			  struct v4l2_mbus_framefmt *mf)
769
{
770
	struct i2c_client *client = v4l2_get_subdevdata(sd);
771
	struct soc_camera_device *icd = client->dev.platform_data;
772 773
	const struct tw9910_scale_ctrl *scale;

774
	if (V4L2_FIELD_ANY == mf->field) {
775 776
		mf->field = V4L2_FIELD_INTERLACED_BT;
	} else if (V4L2_FIELD_INTERLACED_BT != mf->field) {
777
		dev_err(&client->dev, "Field type %d invalid.\n", mf->field);
778 779 780
		return -EINVAL;
	}

781
	mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
782 783
	mf->colorspace = V4L2_COLORSPACE_JPEG;

784 785 786
	/*
	 * select suitable norm
	 */
787
	scale = tw9910_select_norm(icd, mf->width, mf->height);
788 789 790
	if (!scale)
		return -EINVAL;

791 792
	mf->width	= scale->width;
	mf->height	= scale->height;
793 794 795 796

	return 0;
}

797 798
static int tw9910_video_probe(struct soc_camera_device *icd,
			      struct i2c_client *client)
799
{
800
	struct tw9910_priv *priv = to_tw9910(client);
801
	s32 id;
802

803 804 805
	/* We must have a parent by now. And it cannot be a wrong one. */
	BUG_ON(!icd->parent ||
	       to_soc_camera_host(icd->parent)->nr != icd->iface);
806 807 808 809 810 811

	/*
	 * tw9910 only use 8 or 16 bit bus width
	 */
	if (SOCAM_DATAWIDTH_16 != priv->info->buswidth &&
	    SOCAM_DATAWIDTH_8  != priv->info->buswidth) {
812
		dev_err(&client->dev, "bus width error\n");
813 814 815 816 817
		return -ENODEV;
	}

	/*
	 * check and show Product ID
818
	 * So far only revisions 0 and 1 have been seen
819
	 */
820 821 822
	id = i2c_smbus_read_byte_data(client, ID);
	priv->revision = GET_REV(id);
	id = GET_ID(id);
823

824
	if (0x0B != id ||
825
	    0x01 < priv->revision) {
826
		dev_err(&client->dev,
827
			"Product ID error %x:%x\n",
828
			id, priv->revision);
829 830 831
		return -ENODEV;
	}

832
	dev_info(&client->dev,
833
		 "tw9910 Product ID %0x:%0x\n", id, priv->revision);
834 835 836 837

	icd->vdev->tvnorms      = V4L2_STD_NTSC | V4L2_STD_PAL;
	icd->vdev->current_norm = V4L2_STD_NTSC;

838
	return 0;
839 840 841 842 843
}

static struct soc_camera_ops tw9910_ops = {
	.set_bus_param		= tw9910_set_bus_param,
	.query_bus_param	= tw9910_query_bus_param,
844 845 846 847 848
};

static struct v4l2_subdev_core_ops tw9910_subdev_core_ops = {
	.g_chip_ident	= tw9910_g_chip_ident,
	.s_std		= tw9910_s_std,
849
#ifdef CONFIG_VIDEO_ADV_DEBUG
850 851
	.g_register	= tw9910_g_register,
	.s_register	= tw9910_s_register,
852 853 854
#endif
};

855
static int tw9910_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
856 857 858 859 860
			   enum v4l2_mbus_pixelcode *code)
{
	if (index)
		return -EINVAL;

861
	*code = V4L2_MBUS_FMT_UYVY8_2X8;
862 863 864
	return 0;
}

865 866
static struct v4l2_subdev_video_ops tw9910_subdev_video_ops = {
	.s_stream	= tw9910_s_stream,
867 868 869
	.g_mbus_fmt	= tw9910_g_fmt,
	.s_mbus_fmt	= tw9910_s_fmt,
	.try_mbus_fmt	= tw9910_try_fmt,
870 871
	.cropcap	= tw9910_cropcap,
	.g_crop		= tw9910_g_crop,
872
	.enum_mbus_fmt	= tw9910_enum_fmt,
873 874 875 876 877 878 879
};

static struct v4l2_subdev_ops tw9910_subdev_ops = {
	.core	= &tw9910_subdev_core_ops,
	.video	= &tw9910_subdev_video_ops,
};

880 881 882 883 884 885 886 887 888 889
/*
 * i2c_driver function
 */

static int tw9910_probe(struct i2c_client *client,
			const struct i2c_device_id *did)

{
	struct tw9910_priv             *priv;
	struct tw9910_video_info       *info;
890 891 892 893
	struct soc_camera_device       *icd = client->dev.platform_data;
	struct i2c_adapter             *adapter =
		to_i2c_adapter(client->dev.parent);
	struct soc_camera_link         *icl;
894
	int                             ret;
895

896 897
	if (!icd) {
		dev_err(&client->dev, "TW9910: missing soc-camera data!\n");
898
		return -EINVAL;
899
	}
900

901
	icl = to_soc_camera_link(icd);
902
	if (!icl || !icl->priv)
903
		return -EINVAL;
904

905
	info = icl->priv;
906 907

	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
908 909 910 911 912 913 914 915 916 917 918
		dev_err(&client->dev,
			"I2C-Adapter doesn't support "
			"I2C_FUNC_SMBUS_BYTE_DATA\n");
		return -EIO;
	}

	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
	if (!priv)
		return -ENOMEM;

	priv->info   = info;
919 920

	v4l2_i2c_subdev_init(&priv->subdev, client, &tw9910_subdev_ops);
921 922

	icd->ops     = &tw9910_ops;
923
	icd->iface   = icl->bus_id;
924

925
	ret = tw9910_video_probe(icd, client);
926
	if (ret) {
927
		icd->ops = NULL;
928 929 930 931 932 933 934 935
		kfree(priv);
	}

	return ret;
}

static int tw9910_remove(struct i2c_client *client)
{
936
	struct tw9910_priv *priv = to_tw9910(client);
937
	struct soc_camera_device *icd = client->dev.platform_data;
938

939
	icd->ops = NULL;
940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977
	kfree(priv);
	return 0;
}

static const struct i2c_device_id tw9910_id[] = {
	{ "tw9910", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, tw9910_id);

static struct i2c_driver tw9910_i2c_driver = {
	.driver = {
		.name = "tw9910",
	},
	.probe    = tw9910_probe,
	.remove   = tw9910_remove,
	.id_table = tw9910_id,
};

/*
 * module function
 */
static int __init tw9910_module_init(void)
{
	return i2c_add_driver(&tw9910_i2c_driver);
}

static void __exit tw9910_module_exit(void)
{
	i2c_del_driver(&tw9910_i2c_driver);
}

module_init(tw9910_module_init);
module_exit(tw9910_module_exit);

MODULE_DESCRIPTION("SoC Camera driver for tw9910");
MODULE_AUTHOR("Kuninori Morimoto");
MODULE_LICENSE("GPL v2");