iwl-config.h 19.9 KB
Newer Older
1 2 3 4 5 6 7
/******************************************************************************
 *
 * This file is provided under a dual BSD/GPLv2 license.  When using or
 * redistributing this file, you may do so under either license.
 *
 * GPL LICENSE SUMMARY
 *
8
 * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
9
 * Copyright (C) 2016 - 2017 Intel Deutschland GmbH
10
 * Copyright(c) 2018 Intel Corporation
11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
 * USA
 *
 * The full GNU General Public License is included in this distribution
27
 * in the file called COPYING.
28 29
 *
 * Contact Information:
30
 *  Intel Linux Wireless <linuxwifi@intel.com>
31 32 33 34
 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 *
 * BSD LICENSE
 *
35
 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
36
 * Copyright (C) 2016 - 2017 Intel Deutschland GmbH
37
 * Copyright(c) 2018 Intel Corporation
38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name Intel Corporation nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *****************************************************************************/
#ifndef __IWL_CONFIG_H__
#define __IWL_CONFIG_H__

#include <linux/types.h>
71 72 73
#include <linux/netdevice.h>
#include <linux/ieee80211.h>
#include <linux/nl80211.h>
74
#include "iwl-csr.h"
75

76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91
enum iwl_device_family {
	IWL_DEVICE_FAMILY_UNDEFINED,
	IWL_DEVICE_FAMILY_1000,
	IWL_DEVICE_FAMILY_100,
	IWL_DEVICE_FAMILY_2000,
	IWL_DEVICE_FAMILY_2030,
	IWL_DEVICE_FAMILY_105,
	IWL_DEVICE_FAMILY_135,
	IWL_DEVICE_FAMILY_5000,
	IWL_DEVICE_FAMILY_5150,
	IWL_DEVICE_FAMILY_6000,
	IWL_DEVICE_FAMILY_6000i,
	IWL_DEVICE_FAMILY_6005,
	IWL_DEVICE_FAMILY_6030,
	IWL_DEVICE_FAMILY_6050,
	IWL_DEVICE_FAMILY_6150,
92
	IWL_DEVICE_FAMILY_7000,
93
	IWL_DEVICE_FAMILY_8000,
94
	IWL_DEVICE_FAMILY_9000,
95
	IWL_DEVICE_FAMILY_22000,
96 97
};

98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113
/*
 * LED mode
 *    IWL_LED_DEFAULT:  use device default
 *    IWL_LED_RF_STATE: turn LED on/off based on RF state
 *			LED ON  = RF ON
 *			LED OFF = RF OFF
 *    IWL_LED_BLINK:    adjust led blink rate based on blink table
 *    IWL_LED_DISABLE:	led disabled
 */
enum iwl_led_mode {
	IWL_LED_DEFAULT,
	IWL_LED_RF_STATE,
	IWL_LED_BLINK,
	IWL_LED_DISABLE,
};

114 115 116 117 118 119 120 121 122 123 124 125
/**
 * enum iwl_nvm_type - nvm formats
 * @IWL_NVM: the regular format
 * @IWL_NVM_EXT: extended NVM format
 * @IWL_NVM_SDP: NVM format used by 3168 series
 */
enum iwl_nvm_type {
	IWL_NVM,
	IWL_NVM_EXT,
	IWL_NVM_SDP,
};

126 127 128 129 130 131 132 133 134 135 136
/*
 * This is the threshold value of plcp error rate per 100mSecs.  It is
 * used to set and check for the validity of plcp_delta.
 */
#define IWL_MAX_PLCP_ERR_THRESHOLD_MIN		1
#define IWL_MAX_PLCP_ERR_THRESHOLD_DEF		50
#define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF	100
#define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF	200
#define IWL_MAX_PLCP_ERR_THRESHOLD_MAX		255
#define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE	0

137
/* TX queue watchdog timeouts in mSecs */
138
#define IWL_WATCHDOG_DISABLED	0
139
#define IWL_DEF_WD_TIMEOUT	2500
140 141 142
#define IWL_LONG_WD_TIMEOUT	10000
#define IWL_MAX_WD_TIMEOUT	120000

143
#define IWL_DEFAULT_MAX_TX_POWER 22
144 145
#define IWL_TX_CSUM_NETIF_FLAGS (NETIF_F_IPV6_CSUM | NETIF_F_IP_CSUM |\
				 NETIF_F_TSO | NETIF_F_TSO6)
146

147 148
/* Antenna presence definitions */
#define	ANT_NONE	0x0
149
#define	ANT_INVALID	0xff
150 151 152 153 154 155 156
#define	ANT_A		BIT(0)
#define	ANT_B		BIT(1)
#define ANT_C		BIT(2)
#define	ANT_AB		(ANT_A | ANT_B)
#define	ANT_AC		(ANT_A | ANT_C)
#define ANT_BC		(ANT_B | ANT_C)
#define ANT_ABC		(ANT_A | ANT_B | ANT_C)
157 158
#define MAX_ANT_NUM 3

159

160 161 162 163 164 165
static inline u8 num_of_ant(u8 mask)
{
	return  !!((mask) & ANT_A) +
		!!((mask) & ANT_B) +
		!!((mask) & ANT_C);
}
166

167 168 169 170 171 172 173 174
/*
 * @max_ll_items: max number of OTP blocks
 * @shadow_ram_support: shadow support for OTP memory
 * @led_compensation: compensate on the led on/off time per HW according
 *	to the deviation to achieve the desired led frequency.
 *	The detail algorithm is described in iwl-led.c
 * @wd_timeout: TX queues watchdog timeout
 * @max_event_log_size: size of event log buffer size for ucode event logging
175
 * @shadow_reg_enable: HW shadow register support
176 177
 * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command
 *	is in flight. This is due to a HW bug in 7260, 3160 and 7265.
178
 * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled.
179 180 181
 */
struct iwl_base_params {
	unsigned int wd_timeout;
182 183 184 185 186 187 188 189 190 191 192

	u16 eeprom_size;
	u16 max_event_log_size;

	u8 pll_cfg:1, /* for iwl_pcie_apm_init() */
	   shadow_ram_support:1,
	   shadow_reg_enable:1,
	   pcie_l1_allowed:1,
	   apmg_wake_up_wa:1,
	   scd_chain_ext_wa:1;

S
Sara Sharon 已提交
193
	u16 num_of_queues;	/* def: HW dependent */
194 195 196

	u8 max_ll_items;
	u8 led_compensation;
197
};
198

199
/*
E
Eyal Shapira 已提交
200
 * @stbc: support Tx STBC and 1*SS Rx STBC
E
Eyal Shapira 已提交
201
 * @ldpc: support Tx/Rx with LDPC
202
 * @use_rts_for_aggregation: use rts/cts protection for HT traffic
203
 * @ht40_bands: bitmap of bands (using %NL80211_BAND_*) that support HT40
204 205
 */
struct iwl_ht_params {
206 207 208 209
	u8 ht_greenfield_support:1,
	   stbc:1,
	   ldpc:1,
	   use_rts_for_aggregation:1;
210
	u8 ht40_bands;
211 212
};

213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241
/*
 * Tx-backoff threshold
 * @temperature: The threshold in Celsius
 * @backoff: The tx-backoff in uSec
 */
struct iwl_tt_tx_backoff {
	s32 temperature;
	u32 backoff;
};

#define TT_TX_BACKOFF_SIZE 6

/**
 * struct iwl_tt_params - thermal throttling parameters
 * @ct_kill_entry: CT Kill entry threshold
 * @ct_kill_exit: CT Kill exit threshold
 * @ct_kill_duration: The time  intervals (in uSec) in which the driver needs
 *	to checks whether to exit CT Kill.
 * @dynamic_smps_entry: Dynamic SMPS entry threshold
 * @dynamic_smps_exit: Dynamic SMPS exit threshold
 * @tx_protection_entry: TX protection entry threshold
 * @tx_protection_exit: TX protection exit threshold
 * @tx_backoff: Array of thresholds for tx-backoff , in ascending order.
 * @support_ct_kill: Support CT Kill?
 * @support_dynamic_smps: Support dynamic SMPS?
 * @support_tx_protection: Support tx protection?
 * @support_tx_backoff: Support tx-backoff?
 */
struct iwl_tt_params {
242 243
	u32 ct_kill_entry;
	u32 ct_kill_exit;
244
	u32 ct_kill_duration;
245 246 247 248
	u32 dynamic_smps_entry;
	u32 dynamic_smps_exit;
	u32 tx_protection_entry;
	u32 tx_protection_exit;
249
	struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE];
250 251 252 253
	u8 support_ct_kill:1,
	   support_dynamic_smps:1,
	   support_tx_protection:1,
	   support_tx_backoff:1;
254 255
};

256 257 258 259 260 261 262 263 264 265 266 267 268
/*
 * information on how to parse the EEPROM
 */
#define EEPROM_REG_BAND_1_CHANNELS		0x08
#define EEPROM_REG_BAND_2_CHANNELS		0x26
#define EEPROM_REG_BAND_3_CHANNELS		0x42
#define EEPROM_REG_BAND_4_CHANNELS		0x5C
#define EEPROM_REG_BAND_5_CHANNELS		0x74
#define EEPROM_REG_BAND_24_HT40_CHANNELS	0x82
#define EEPROM_REG_BAND_52_HT40_CHANNELS	0x92
#define EEPROM_6000_REG_BAND_24_HT40_CHANNELS	0x80
#define EEPROM_REGULATORY_BAND_NO_HT40		0

269 270
/* lower blocks contain EEPROM image and calibration data */
#define OTP_LOW_IMAGE_SIZE		(2 * 512 * sizeof(u16)) /* 2 KB */
271
#define OTP_LOW_IMAGE_SIZE_FAMILY_7000	(16 * 512 * sizeof(u16)) /* 16 KB */
272
#define OTP_LOW_IMAGE_SIZE_FAMILY_8000	(32 * 512 * sizeof(u16)) /* 32 KB */
273
#define OTP_LOW_IMAGE_SIZE_FAMILY_9000	OTP_LOW_IMAGE_SIZE_FAMILY_8000
274
#define OTP_LOW_IMAGE_SIZE_FAMILY_22000	OTP_LOW_IMAGE_SIZE_FAMILY_9000
275

276 277 278 279 280
struct iwl_eeprom_params {
	const u8 regulatory_bands[7];
	bool enhanced_txpower;
};

281 282 283 284 285 286 287 288 289
/* Tx-backoff power threshold
 * @pwr: The power limit in mw
 * @backoff: The tx-backoff in uSec
 */
struct iwl_pwr_tx_backoff {
	u32 pwr;
	u32 backoff;
};

290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315
/**
 * struct iwl_csr_params
 *
 * @flag_sw_reset: reset the device
 * @flag_mac_clock_ready:
 *	Indicates MAC (ucode processor, etc.) is powered up and can run.
 *	Internal resources are accessible.
 *	NOTE:  This does not indicate that the processor is actually running.
 *	NOTE:  This does not indicate that device has completed
 *	       init or post-power-down restore of internal SRAM memory.
 *	       Use CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP as indication that
 *	       SRAM is restored and uCode is in normal operation mode.
 *	       This note is relevant only for pre 5xxx devices.
 *	NOTE:  After device reset, this bit remains "0" until host sets
 *	       INIT_DONE
 * @flag_init_done: Host sets this to put device into fully operational
 *	D0 power mode. Host resets this after SW_RESET to put device into
 *	low power mode.
 * @flag_mac_access_req: Host sets this to request and maintain MAC wakeup,
 *	to allow host access to device-internal resources. Host must wait for
 *	mac_clock_ready (and !GOING_TO_SLEEP) before accessing non-CSR device
 *	registers.
 * @flag_val_mac_access_en: mac access is enabled
 * @flag_master_dis: disable master
 * @flag_stop_master: stop master
 * @addr_sw_reset: address for resetting the device
316 317 318 319
 * @mac_addr0_otp: first part of MAC address from OTP
 * @mac_addr1_otp: second part of MAC address from OTP
 * @mac_addr0_strap: first part of MAC address from strap
 * @mac_addr1_strap: second part of MAC address from strap
320 321 322 323 324 325 326 327 328 329
 */
struct iwl_csr_params {
	u8 flag_sw_reset;
	u8 flag_mac_clock_ready;
	u8 flag_init_done;
	u8 flag_mac_access_req;
	u8 flag_val_mac_access_en;
	u8 flag_master_dis;
	u8 flag_stop_master;
	u8 addr_sw_reset;
330 331 332 333
	u32 mac_addr0_otp;
	u32 mac_addr1_otp;
	u32 mac_addr0_strap;
	u32 mac_addr1_strap;
334 335
};

336 337
/**
 * struct iwl_cfg
S
Sara Sharon 已提交
338
 * @name: Official name of the device
339 340 341
 * @fw_name_pre: Firmware filename prefix. The api version and extension
 *	(.ucode) will be added to filename before loading from disk. The
 *	filename is constructed as fw_name_pre<api>.ucode.
342
 * @fw_name_pre_b_or_c_step: same as @fw_name_pre, only for b or c steps
343
 *	(if supported)
344 345
 * @fw_name_pre_rf_next_step: same as @fw_name_pre_b_or_c_step, only for rf
 *	next step. Supported only in integrated solutions.
346 347
 * @ucode_api_max: Highest version of uCode API supported by driver.
 * @ucode_api_min: Lowest version of uCode API supported by driver.
348 349
 * @max_inst_size: The maximal length of the fw inst section (only DVM)
 * @max_data_size: The maximal length of the fw data section (only DVM)
350 351
 * @valid_tx_ant: valid transmit antenna
 * @valid_rx_ant: valid receive antenna
352
 * @non_shared_ant: the antenna that is for WiFi only
353 354
 * @nvm_ver: NVM version
 * @nvm_calib_ver: NVM calibration version
355 356
 * @lib: pointer to the lib ops
 * @base_params: pointer to basic parameters
357
 * @ht_params: point to ht parameters
358 359 360
 * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
 * @rx_with_siso_diversity: 1x1 device with rx antenna diversity
 * @internal_wimax_coex: internal wifi/wimax combo device
361
 * @high_temp: Is this NIC is designated to be in high temperature.
362 363
 * @host_interrupt_operation_mode: device needs host interrupt operation
 *	mode set
364
 * @nvm_hw_section_num: the ID of the HW NVM section
365
 * @mac_addr_from_csr: read HW address from CSR registers
366
 * @features: hw features, any combination of feature_whitelist
367
 * @pwr_tx_backoffs: translation table between power limits and backoffs
368
 * @csr: csr flags and addresses that are different across devices
369
 * @max_rx_agg_size: max RX aggregation size of the ADDBA request/response
370
 * @max_tx_agg_size: max TX aggregation size of the ADDBA request/response
371 372 373 374
 * @max_ht_ampdu_factor: the exponent of the max length of A-MPDU that the
 *	station can receive in HT
 * @max_vht_ampdu_exponent: the exponent of the max length of A-MPDU that the
 *	station can receive in VHT
375 376
 * @dccm_offset: offset from which DCCM begins
 * @dccm_len: length of DCCM (including runtime stack CCM)
377 378
 * @dccm2_offset: offset from which the second DCCM begins
 * @dccm2_len: length of the second DCCM
379 380
 * @smem_offset: offset from which the SMEM begins
 * @smem_len: the length of SMEM
381
 * @mq_rx_supported: multi-queue rx support
382
 * @vht_mu_mimo_supported: VHT MU-MIMO support
383
 * @rf_id: need to read rf_id to determine the firmware image
384
 * @integrated: discrete or integrated
385
 * @gen2: 22000 and on transport operation
S
Sara Sharon 已提交
386
 * @cdb: CDB support
387
 * @nvm_type: see &enum iwl_nvm_type
388 389 390 391 392 393 394 395 396
 *
 * We enable the driver to be backward compatible wrt. hardware features.
 * API differences in uCode shouldn't be handled here but through TLVs
 * and/or the uCode API version instead.
 */
struct iwl_cfg {
	/* params specific to an individual device within a device family */
	const char *name;
	const char *fw_name_pre;
397
	const char *fw_name_pre_b_or_c_step;
398
	const char *fw_name_pre_rf_next_step;
399 400 401 402
	/* params not likely to change within a device family */
	const struct iwl_base_params *base_params;
	/* params likely to change within a device family */
	const struct iwl_ht_params *ht_params;
403
	const struct iwl_eeprom_params *eeprom_params;
404
	const struct iwl_pwr_tx_backoff *pwr_tx_backoffs;
405
	const char *default_nvm_file_C_step;
406
	const struct iwl_tt_params *thermal_params;
407
	const struct iwl_csr_params *csr;
408 409
	enum iwl_device_family device_family;
	enum iwl_led_mode led_mode;
410
	enum iwl_nvm_type nvm_type;
411 412 413 414 415 416 417 418 419
	u32 max_data_size;
	u32 max_inst_size;
	netdev_features_t features;
	u32 dccm_offset;
	u32 dccm_len;
	u32 dccm2_offset;
	u32 dccm2_len;
	u32 smem_offset;
	u32 smem_len;
420
	u32 soc_latency;
421 422
	u16 nvm_ver;
	u16 nvm_calib_ver;
423
	u32 rx_with_siso_diversity:1,
424 425 426 427 428 429 430 431 432 433
	    bt_shared_single_ant:1,
	    internal_wimax_coex:1,
	    host_interrupt_operation_mode:1,
	    high_temp:1,
	    mac_addr_from_csr:1,
	    lp_xtal_workaround:1,
	    disable_dummy_notification:1,
	    apmg_not_supported:1,
	    mq_rx_supported:1,
	    vht_mu_mimo_supported:1,
434
	    rf_id:1,
435
	    integrated:1,
436
	    use_tfh:1,
S
Sara Sharon 已提交
437
	    gen2:1,
438
	    cdb:1,
439
	    dbgc_supported:1;
440 441 442 443 444 445 446 447 448 449
	u8 valid_tx_ant;
	u8 valid_rx_ant;
	u8 non_shared_ant;
	u8 nvm_hw_section_num;
	u8 max_rx_agg_size;
	u8 max_tx_agg_size;
	u8 max_ht_ampdu_exponent;
	u8 max_vht_ampdu_exponent;
	u8 ucode_api_max;
	u8 ucode_api_min;
450
	u32 min_umac_error_event_table;
451
	u32 extra_phy_cfg_flags;
452 453
};

454 455 456 457 458 459 460 461
static const struct iwl_csr_params iwl_csr_v1 = {
	.flag_mac_clock_ready = 0,
	.flag_val_mac_access_en = 0,
	.flag_init_done = 2,
	.flag_mac_access_req = 3,
	.flag_sw_reset = 7,
	.flag_master_dis = 8,
	.flag_stop_master = 9,
462 463 464 465 466
	.addr_sw_reset = (CSR_BASE + 0x020),
	.mac_addr0_otp = 0x380,
	.mac_addr1_otp = 0x384,
	.mac_addr0_strap = 0x388,
	.mac_addr1_strap = 0x38C
467 468 469 470 471 472 473 474 475 476
};

static const struct iwl_csr_params iwl_csr_v2 = {
	.flag_init_done = 6,
	.flag_mac_clock_ready = 20,
	.flag_val_mac_access_en = 20,
	.flag_mac_access_req = 21,
	.flag_master_dis = 28,
	.flag_stop_master = 29,
	.flag_sw_reset = 31,
477 478 479 480 481
	.addr_sw_reset = (CSR_BASE + 0x024),
	.mac_addr0_otp = 0x30,
	.mac_addr1_otp = 0x34,
	.mac_addr0_strap = 0x38,
	.mac_addr1_strap = 0x3C
482 483
};

484 485 486
/*
 * This list declares the config structures for all devices.
 */
487
#if IS_ENABLED(CONFIG_IWLDVM)
488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525
extern const struct iwl_cfg iwl5300_agn_cfg;
extern const struct iwl_cfg iwl5100_agn_cfg;
extern const struct iwl_cfg iwl5350_agn_cfg;
extern const struct iwl_cfg iwl5100_bgn_cfg;
extern const struct iwl_cfg iwl5100_abg_cfg;
extern const struct iwl_cfg iwl5150_agn_cfg;
extern const struct iwl_cfg iwl5150_abg_cfg;
extern const struct iwl_cfg iwl6005_2agn_cfg;
extern const struct iwl_cfg iwl6005_2abg_cfg;
extern const struct iwl_cfg iwl6005_2bg_cfg;
extern const struct iwl_cfg iwl6005_2agn_sff_cfg;
extern const struct iwl_cfg iwl6005_2agn_d_cfg;
extern const struct iwl_cfg iwl6005_2agn_mow1_cfg;
extern const struct iwl_cfg iwl6005_2agn_mow2_cfg;
extern const struct iwl_cfg iwl1030_bgn_cfg;
extern const struct iwl_cfg iwl1030_bg_cfg;
extern const struct iwl_cfg iwl6030_2agn_cfg;
extern const struct iwl_cfg iwl6030_2abg_cfg;
extern const struct iwl_cfg iwl6030_2bgn_cfg;
extern const struct iwl_cfg iwl6030_2bg_cfg;
extern const struct iwl_cfg iwl6000i_2agn_cfg;
extern const struct iwl_cfg iwl6000i_2abg_cfg;
extern const struct iwl_cfg iwl6000i_2bg_cfg;
extern const struct iwl_cfg iwl6000_3agn_cfg;
extern const struct iwl_cfg iwl6050_2agn_cfg;
extern const struct iwl_cfg iwl6050_2abg_cfg;
extern const struct iwl_cfg iwl6150_bgn_cfg;
extern const struct iwl_cfg iwl6150_bg_cfg;
extern const struct iwl_cfg iwl1000_bgn_cfg;
extern const struct iwl_cfg iwl1000_bg_cfg;
extern const struct iwl_cfg iwl100_bgn_cfg;
extern const struct iwl_cfg iwl100_bg_cfg;
extern const struct iwl_cfg iwl130_bgn_cfg;
extern const struct iwl_cfg iwl130_bg_cfg;
extern const struct iwl_cfg iwl2000_2bgn_cfg;
extern const struct iwl_cfg iwl2000_2bgn_d_cfg;
extern const struct iwl_cfg iwl2030_2bgn_cfg;
extern const struct iwl_cfg iwl6035_2agn_cfg;
526
extern const struct iwl_cfg iwl6035_2agn_sff_cfg;
527 528 529
extern const struct iwl_cfg iwl105_bgn_cfg;
extern const struct iwl_cfg iwl105_bgn_d_cfg;
extern const struct iwl_cfg iwl135_bgn_cfg;
530 531
#endif /* CONFIG_IWLDVM */
#if IS_ENABLED(CONFIG_IWLMVM)
532
extern const struct iwl_cfg iwl7260_2ac_cfg;
533
extern const struct iwl_cfg iwl7260_2ac_cfg_high_temp;
534 535 536 537 538
extern const struct iwl_cfg iwl7260_2n_cfg;
extern const struct iwl_cfg iwl7260_n_cfg;
extern const struct iwl_cfg iwl3160_2ac_cfg;
extern const struct iwl_cfg iwl3160_2n_cfg;
extern const struct iwl_cfg iwl3160_n_cfg;
539
extern const struct iwl_cfg iwl3165_2ac_cfg;
540
extern const struct iwl_cfg iwl3168_2ac_cfg;
E
Eran Harary 已提交
541
extern const struct iwl_cfg iwl7265_2ac_cfg;
O
Oren Givon 已提交
542 543
extern const struct iwl_cfg iwl7265_2n_cfg;
extern const struct iwl_cfg iwl7265_n_cfg;
544 545 546
extern const struct iwl_cfg iwl7265d_2ac_cfg;
extern const struct iwl_cfg iwl7265d_2n_cfg;
extern const struct iwl_cfg iwl7265d_n_cfg;
547
extern const struct iwl_cfg iwl8260_2n_cfg;
548
extern const struct iwl_cfg iwl8260_2ac_cfg;
549
extern const struct iwl_cfg iwl8265_2ac_cfg;
O
Oren Givon 已提交
550
extern const struct iwl_cfg iwl8275_2ac_cfg;
551
extern const struct iwl_cfg iwl4165_2ac_cfg;
O
Oren Givon 已提交
552
extern const struct iwl_cfg iwl9160_2ac_cfg;
553
extern const struct iwl_cfg iwl9260_2ac_cfg;
O
Oren Givon 已提交
554
extern const struct iwl_cfg iwl9270_2ac_cfg;
555
extern const struct iwl_cfg iwl9460_2ac_cfg;
O
Oren Givon 已提交
556
extern const struct iwl_cfg iwl9560_2ac_cfg;
557 558 559 560
extern const struct iwl_cfg iwl9460_2ac_cfg_soc;
extern const struct iwl_cfg iwl9461_2ac_cfg_soc;
extern const struct iwl_cfg iwl9462_2ac_cfg_soc;
extern const struct iwl_cfg iwl9560_2ac_cfg_soc;
561 562 563 564
extern const struct iwl_cfg iwl9460_2ac_cfg_shared_clk;
extern const struct iwl_cfg iwl9461_2ac_cfg_shared_clk;
extern const struct iwl_cfg iwl9462_2ac_cfg_shared_clk;
extern const struct iwl_cfg iwl9560_2ac_cfg_shared_clk;
565 566 567 568 569 570 571
extern const struct iwl_cfg iwl22000_2ac_cfg_hr;
extern const struct iwl_cfg iwl22000_2ac_cfg_hr_cdb;
extern const struct iwl_cfg iwl22000_2ac_cfg_jf;
extern const struct iwl_cfg iwl22000_2ax_cfg_hr;
extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_f0;
extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_jf_b0;
extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0;
572
#endif /* CONFIG_IWLMVM */
573

574
#endif /* __IWL_CONFIG_H__ */