be_main.c 127.2 KB
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/**
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 * Copyright (C) 2005 - 2011 Emulex
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 * All rights reserved.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License version 2
 * as published by the Free Software Foundation.  The full GNU General
 * Public License is included in this distribution in the file called COPYING.
 *
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 * Written by: Jayamohan Kallickal (jayamohan.kallickal@emulex.com)
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 *
 * Contact Information:
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 * linux-drivers@emulex.com
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 *
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 * Emulex
 * 3333 Susan Street
 * Costa Mesa, CA 92626
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 */
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#include <linux/reboot.h>
#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
#include <linux/blkdev.h>
#include <linux/pci.h>
#include <linux/string.h>
#include <linux/kernel.h>
#include <linux/semaphore.h>
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#include <linux/iscsi_boot_sysfs.h>
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#include <linux/module.h>
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#include <scsi/libiscsi.h>
#include <scsi/scsi_transport_iscsi.h>
#include <scsi/scsi_transport.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_device.h>
#include <scsi/scsi_host.h>
#include <scsi/scsi.h>
#include "be_main.h"
#include "be_iscsi.h"
#include "be_mgmt.h"

static unsigned int be_iopoll_budget = 10;
static unsigned int be_max_phys_size = 64;
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static unsigned int enable_msix = 1;
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static unsigned int gcrashmode = 0;
static unsigned int num_hba = 0;
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MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
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MODULE_VERSION(BUILD_STR);
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MODULE_AUTHOR("Emulex Corporation");
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MODULE_LICENSE("GPL");
module_param(be_iopoll_budget, int, 0);
module_param(enable_msix, int, 0);
module_param(be_max_phys_size, uint, S_IRUGO);
MODULE_PARM_DESC(be_max_phys_size, "Maximum Size (In Kilobytes) of physically"
				   "contiguous memory that can be allocated."
				   "Range is 16 - 128");

static int beiscsi_slave_configure(struct scsi_device *sdev)
{
	blk_queue_max_segment_size(sdev->request_queue, 65536);
	return 0;
}

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static int beiscsi_eh_abort(struct scsi_cmnd *sc)
{
	struct iscsi_cls_session *cls_session;
	struct iscsi_task *aborted_task = (struct iscsi_task *)sc->SCp.ptr;
	struct beiscsi_io_task *aborted_io_task;
	struct iscsi_conn *conn;
	struct beiscsi_conn *beiscsi_conn;
	struct beiscsi_hba *phba;
	struct iscsi_session *session;
	struct invalidate_command_table *inv_tbl;
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	struct be_dma_mem nonemb_cmd;
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	unsigned int cid, tag, num_invalidate;

	cls_session = starget_to_session(scsi_target(sc->device));
	session = cls_session->dd_data;

	spin_lock_bh(&session->lock);
	if (!aborted_task || !aborted_task->sc) {
		/* we raced */
		spin_unlock_bh(&session->lock);
		return SUCCESS;
	}

	aborted_io_task = aborted_task->dd_data;
	if (!aborted_io_task->scsi_cmnd) {
		/* raced or invalid command */
		spin_unlock_bh(&session->lock);
		return SUCCESS;
	}
	spin_unlock_bh(&session->lock);
	conn = aborted_task->conn;
	beiscsi_conn = conn->dd_data;
	phba = beiscsi_conn->phba;

	/* invalidate iocb */
	cid = beiscsi_conn->beiscsi_conn_cid;
	inv_tbl = phba->inv_tbl;
	memset(inv_tbl, 0x0, sizeof(*inv_tbl));
	inv_tbl->cid = cid;
	inv_tbl->icd = aborted_io_task->psgl_handle->sgl_index;
	num_invalidate = 1;
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	nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
				sizeof(struct invalidate_commands_params_in),
				&nonemb_cmd.dma);
	if (nonemb_cmd.va == NULL) {
		SE_DEBUG(DBG_LVL_1,
			 "Failed to allocate memory for"
			 "mgmt_invalidate_icds\n");
		return FAILED;
	}
	nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);

	tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
				   cid, &nonemb_cmd);
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	if (!tag) {
		shost_printk(KERN_WARNING, phba->shost,
			     "mgmt_invalidate_icds could not be"
			     " submitted\n");
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		pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
				    nonemb_cmd.va, nonemb_cmd.dma);

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		return FAILED;
	} else {
		wait_event_interruptible(phba->ctrl.mcc_wait[tag],
					 phba->ctrl.mcc_numtag[tag]);
		free_mcc_tag(&phba->ctrl, tag);
	}
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	pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
			    nonemb_cmd.va, nonemb_cmd.dma);
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	return iscsi_eh_abort(sc);
}

static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
{
	struct iscsi_task *abrt_task;
	struct beiscsi_io_task *abrt_io_task;
	struct iscsi_conn *conn;
	struct beiscsi_conn *beiscsi_conn;
	struct beiscsi_hba *phba;
	struct iscsi_session *session;
	struct iscsi_cls_session *cls_session;
	struct invalidate_command_table *inv_tbl;
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	struct be_dma_mem nonemb_cmd;
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	unsigned int cid, tag, i, num_invalidate;

	/* invalidate iocbs */
	cls_session = starget_to_session(scsi_target(sc->device));
	session = cls_session->dd_data;
	spin_lock_bh(&session->lock);
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	if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
		spin_unlock_bh(&session->lock);
		return FAILED;
	}
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	conn = session->leadconn;
	beiscsi_conn = conn->dd_data;
	phba = beiscsi_conn->phba;
	cid = beiscsi_conn->beiscsi_conn_cid;
	inv_tbl = phba->inv_tbl;
	memset(inv_tbl, 0x0, sizeof(*inv_tbl) * BE2_CMDS_PER_CXN);
	num_invalidate = 0;
	for (i = 0; i < conn->session->cmds_max; i++) {
		abrt_task = conn->session->cmds[i];
		abrt_io_task = abrt_task->dd_data;
		if (!abrt_task->sc || abrt_task->state == ISCSI_TASK_FREE)
			continue;

		if (abrt_task->sc->device->lun != abrt_task->sc->device->lun)
			continue;

		inv_tbl->cid = cid;
		inv_tbl->icd = abrt_io_task->psgl_handle->sgl_index;
		num_invalidate++;
		inv_tbl++;
	}
	spin_unlock_bh(&session->lock);
	inv_tbl = phba->inv_tbl;

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	nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
				sizeof(struct invalidate_commands_params_in),
				&nonemb_cmd.dma);
	if (nonemb_cmd.va == NULL) {
		SE_DEBUG(DBG_LVL_1,
			 "Failed to allocate memory for"
			 "mgmt_invalidate_icds\n");
		return FAILED;
	}
	nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
	memset(nonemb_cmd.va, 0, nonemb_cmd.size);
	tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
				   cid, &nonemb_cmd);
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	if (!tag) {
		shost_printk(KERN_WARNING, phba->shost,
			     "mgmt_invalidate_icds could not be"
			     " submitted\n");
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		pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
				    nonemb_cmd.va, nonemb_cmd.dma);
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		return FAILED;
	} else {
		wait_event_interruptible(phba->ctrl.mcc_wait[tag],
					 phba->ctrl.mcc_numtag[tag]);
		free_mcc_tag(&phba->ctrl, tag);
	}
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	pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
			    nonemb_cmd.va, nonemb_cmd.dma);
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	return iscsi_eh_device_reset(sc);
}

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static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
{
	struct beiscsi_hba *phba = data;
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	struct mgmt_session_info *boot_sess = &phba->boot_sess;
	struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
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	char *str = buf;
	int rc;

	switch (type) {
	case ISCSI_BOOT_TGT_NAME:
		rc = sprintf(buf, "%.*s\n",
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			    (int)strlen(boot_sess->target_name),
			    (char *)&boot_sess->target_name);
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		break;
	case ISCSI_BOOT_TGT_IP_ADDR:
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		if (boot_conn->dest_ipaddr.ip_type == 0x1)
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			rc = sprintf(buf, "%pI4\n",
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				(char *)&boot_conn->dest_ipaddr.ip_address);
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		else
			rc = sprintf(str, "%pI6\n",
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				(char *)&boot_conn->dest_ipaddr.ip_address);
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		break;
	case ISCSI_BOOT_TGT_PORT:
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		rc = sprintf(str, "%d\n", boot_conn->dest_port);
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		break;

	case ISCSI_BOOT_TGT_CHAP_NAME:
		rc = sprintf(str,  "%.*s\n",
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			     boot_conn->negotiated_login_options.auth_data.chap.
			     target_chap_name_length,
			     (char *)&boot_conn->negotiated_login_options.
			     auth_data.chap.target_chap_name);
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		break;
	case ISCSI_BOOT_TGT_CHAP_SECRET:
		rc = sprintf(str,  "%.*s\n",
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			     boot_conn->negotiated_login_options.auth_data.chap.
			     target_secret_length,
			     (char *)&boot_conn->negotiated_login_options.
			     auth_data.chap.target_secret);
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		break;
	case ISCSI_BOOT_TGT_REV_CHAP_NAME:
		rc = sprintf(str,  "%.*s\n",
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			     boot_conn->negotiated_login_options.auth_data.chap.
			     intr_chap_name_length,
			     (char *)&boot_conn->negotiated_login_options.
			     auth_data.chap.intr_chap_name);
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		break;
	case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
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		rc = sprintf(str,  "%.*s\n",
			     boot_conn->negotiated_login_options.auth_data.chap.
			     intr_secret_length,
			     (char *)&boot_conn->negotiated_login_options.
			     auth_data.chap.intr_secret);
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		break;
	case ISCSI_BOOT_TGT_FLAGS:
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		rc = sprintf(str, "2\n");
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		break;
	case ISCSI_BOOT_TGT_NIC_ASSOC:
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		rc = sprintf(str, "0\n");
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		break;
	default:
		rc = -ENOSYS;
		break;
	}
	return rc;
}

static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
{
	struct beiscsi_hba *phba = data;
	char *str = buf;
	int rc;

	switch (type) {
	case ISCSI_BOOT_INI_INITIATOR_NAME:
		rc = sprintf(str, "%s\n", phba->boot_sess.initiator_iscsiname);
		break;
	default:
		rc = -ENOSYS;
		break;
	}
	return rc;
}

static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
{
	struct beiscsi_hba *phba = data;
	char *str = buf;
	int rc;

	switch (type) {
	case ISCSI_BOOT_ETH_FLAGS:
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		rc = sprintf(str, "2\n");
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		break;
	case ISCSI_BOOT_ETH_INDEX:
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		rc = sprintf(str, "0\n");
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		break;
	case ISCSI_BOOT_ETH_MAC:
		rc  = beiscsi_get_macaddr(buf, phba);
		if (rc < 0) {
			SE_DEBUG(DBG_LVL_1, "beiscsi_get_macaddr Failed\n");
			return rc;
		}
	break;
	default:
		rc = -ENOSYS;
		break;
	}
	return rc;
}


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static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
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{
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	umode_t rc;
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	switch (type) {
	case ISCSI_BOOT_TGT_NAME:
	case ISCSI_BOOT_TGT_IP_ADDR:
	case ISCSI_BOOT_TGT_PORT:
	case ISCSI_BOOT_TGT_CHAP_NAME:
	case ISCSI_BOOT_TGT_CHAP_SECRET:
	case ISCSI_BOOT_TGT_REV_CHAP_NAME:
	case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
	case ISCSI_BOOT_TGT_NIC_ASSOC:
	case ISCSI_BOOT_TGT_FLAGS:
		rc = S_IRUGO;
		break;
	default:
		rc = 0;
		break;
	}
	return rc;
}

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static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
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{
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	umode_t rc;
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	switch (type) {
	case ISCSI_BOOT_INI_INITIATOR_NAME:
		rc = S_IRUGO;
		break;
	default:
		rc = 0;
		break;
	}
	return rc;
}


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static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
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{
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	umode_t rc;
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	switch (type) {
	case ISCSI_BOOT_ETH_FLAGS:
	case ISCSI_BOOT_ETH_MAC:
	case ISCSI_BOOT_ETH_INDEX:
		rc = S_IRUGO;
		break;
	default:
		rc = 0;
		break;
	}
	return rc;
}

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/*------------------- PCI Driver operations and data ----------------- */
static DEFINE_PCI_DEVICE_TABLE(beiscsi_pci_id_table) = {
	{ PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
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	{ PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
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	{ PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
	{ PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
	{ PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
	{ 0 }
};
MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);

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static struct scsi_host_template beiscsi_sht = {
	.module = THIS_MODULE,
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	.name = "Emulex 10Gbe open-iscsi Initiator Driver",
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	.proc_name = DRV_NAME,
	.queuecommand = iscsi_queuecommand,
	.change_queue_depth = iscsi_change_queue_depth,
	.slave_configure = beiscsi_slave_configure,
	.target_alloc = iscsi_target_alloc,
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	.eh_abort_handler = beiscsi_eh_abort,
	.eh_device_reset_handler = beiscsi_eh_device_reset,
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	.eh_target_reset_handler = iscsi_eh_session_reset,
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	.sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
	.can_queue = BE2_IO_DEPTH,
	.this_id = -1,
	.max_sectors = BEISCSI_MAX_SECTORS,
	.cmd_per_lun = BEISCSI_CMD_PER_LUN,
	.use_clustering = ENABLE_CLUSTERING,
};

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static struct scsi_transport_template *beiscsi_scsi_transport;
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static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
{
	struct beiscsi_hba *phba;
	struct Scsi_Host *shost;

	shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
	if (!shost) {
		dev_err(&pcidev->dev, "beiscsi_hba_alloc -"
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			"iscsi_host_alloc failed\n");
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		return NULL;
	}
	shost->dma_boundary = pcidev->dma_mask;
	shost->max_id = BE2_MAX_SESSIONS;
	shost->max_channel = 0;
	shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
	shost->max_lun = BEISCSI_NUM_MAX_LUN;
	shost->transportt = beiscsi_scsi_transport;
	phba = iscsi_host_priv(shost);
	memset(phba, 0, sizeof(*phba));
	phba->shost = shost;
	phba->pcidev = pci_dev_get(pcidev);
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	pci_set_drvdata(pcidev, phba);
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	if (iscsi_host_add(shost, &phba->pcidev->dev))
		goto free_devices;
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	return phba;

free_devices:
	pci_dev_put(phba->pcidev);
	iscsi_host_free(phba->shost);
	return NULL;
}

static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
{
	if (phba->csr_va) {
		iounmap(phba->csr_va);
		phba->csr_va = NULL;
	}
	if (phba->db_va) {
		iounmap(phba->db_va);
		phba->db_va = NULL;
	}
	if (phba->pci_va) {
		iounmap(phba->pci_va);
		phba->pci_va = NULL;
	}
}

static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
				struct pci_dev *pcidev)
{
	u8 __iomem *addr;
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	int pcicfg_reg;
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	addr = ioremap_nocache(pci_resource_start(pcidev, 2),
			       pci_resource_len(pcidev, 2));
	if (addr == NULL)
		return -ENOMEM;
	phba->ctrl.csr = addr;
	phba->csr_va = addr;
	phba->csr_pa.u.a64.address = pci_resource_start(pcidev, 2);

	addr = ioremap_nocache(pci_resource_start(pcidev, 4), 128 * 1024);
	if (addr == NULL)
		goto pci_map_err;
	phba->ctrl.db = addr;
	phba->db_va = addr;
	phba->db_pa.u.a64.address =  pci_resource_start(pcidev, 4);

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	if (phba->generation == BE_GEN2)
		pcicfg_reg = 1;
	else
		pcicfg_reg = 0;

	addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
			       pci_resource_len(pcidev, pcicfg_reg));

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	if (addr == NULL)
		goto pci_map_err;
	phba->ctrl.pcicfg = addr;
	phba->pci_va = addr;
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	phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
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	return 0;

pci_map_err:
	beiscsi_unmap_pci_function(phba);
	return -ENOMEM;
}

static int beiscsi_enable_pci(struct pci_dev *pcidev)
{
	int ret;

	ret = pci_enable_device(pcidev);
	if (ret) {
		dev_err(&pcidev->dev, "beiscsi_enable_pci - enable device "
			"failed. Returning -ENODEV\n");
		return ret;
	}

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	pci_set_master(pcidev);
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	if (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64))) {
		ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
		if (ret) {
			dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
			pci_disable_device(pcidev);
			return ret;
		}
	}
	return 0;
}

static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
{
	struct be_ctrl_info *ctrl = &phba->ctrl;
	struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
	struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
	int status = 0;

	ctrl->pdev = pdev;
	status = beiscsi_map_pci_bars(phba, pdev);
	if (status)
		return status;
	mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
	mbox_mem_alloc->va = pci_alloc_consistent(pdev,
						  mbox_mem_alloc->size,
						  &mbox_mem_alloc->dma);
	if (!mbox_mem_alloc->va) {
		beiscsi_unmap_pci_function(phba);
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		return -ENOMEM;
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	}

	mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
	mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
	mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
	memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
	spin_lock_init(&ctrl->mbox_lock);
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	spin_lock_init(&phba->ctrl.mcc_lock);
	spin_lock_init(&phba->ctrl.mcc_cq_lock);

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	return status;
}

static void beiscsi_get_params(struct beiscsi_hba *phba)
{
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	phba->params.ios_per_ctrl = (phba->fw_config.iscsi_icd_count
				    - (phba->fw_config.iscsi_cid_count
				    + BE2_TMFS
				    + BE2_NOPOUT_REQ));
	phba->params.cxns_per_ctrl = phba->fw_config.iscsi_cid_count;
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	phba->params.asyncpdus_per_ctrl = phba->fw_config.iscsi_cid_count * 2;
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	phba->params.icds_per_ctrl = phba->fw_config.iscsi_icd_count;
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	phba->params.num_sge_per_io = BE2_SGE;
	phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
	phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
	phba->params.eq_timer = 64;
	phba->params.num_eq_entries =
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	    (((BE2_CMDS_PER_CXN * 2 + phba->fw_config.iscsi_cid_count * 2
				    + BE2_TMFS) / 512) + 1) * 512;
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	phba->params.num_eq_entries = (phba->params.num_eq_entries < 1024)
				? 1024 : phba->params.num_eq_entries;
577
	SE_DEBUG(DBG_LVL_8, "phba->params.num_eq_entries=%d\n",
578
			     phba->params.num_eq_entries);
579
	phba->params.num_cq_entries =
580 581
	    (((BE2_CMDS_PER_CXN * 2 +  phba->fw_config.iscsi_cid_count * 2
				    + BE2_TMFS) / 512) + 1) * 512;
582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601
	phba->params.wrbs_per_cxn = 256;
}

static void hwi_ring_eq_db(struct beiscsi_hba *phba,
			   unsigned int id, unsigned int clr_interrupt,
			   unsigned int num_processed,
			   unsigned char rearm, unsigned char event)
{
	u32 val = 0;
	val |= id & DB_EQ_RING_ID_MASK;
	if (rearm)
		val |= 1 << DB_EQ_REARM_SHIFT;
	if (clr_interrupt)
		val |= 1 << DB_EQ_CLR_SHIFT;
	if (event)
		val |= 1 << DB_EQ_EVNT_SHIFT;
	val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
	iowrite32(val, phba->db_va + DB_EQ_OFFSET);
}

602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708
/**
 * be_isr_mcc - The isr routine of the driver.
 * @irq: Not used
 * @dev_id: Pointer to host adapter structure
 */
static irqreturn_t be_isr_mcc(int irq, void *dev_id)
{
	struct beiscsi_hba *phba;
	struct be_eq_entry *eqe = NULL;
	struct be_queue_info *eq;
	struct be_queue_info *mcc;
	unsigned int num_eq_processed;
	struct be_eq_obj *pbe_eq;
	unsigned long flags;

	pbe_eq = dev_id;
	eq = &pbe_eq->q;
	phba =  pbe_eq->phba;
	mcc = &phba->ctrl.mcc_obj.cq;
	eqe = queue_tail_node(eq);
	if (!eqe)
		SE_DEBUG(DBG_LVL_1, "eqe is NULL\n");

	num_eq_processed = 0;

	while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
				& EQE_VALID_MASK) {
		if (((eqe->dw[offsetof(struct amap_eq_entry,
		     resource_id) / 32] &
		     EQE_RESID_MASK) >> 16) == mcc->id) {
			spin_lock_irqsave(&phba->isr_lock, flags);
			phba->todo_mcc_cq = 1;
			spin_unlock_irqrestore(&phba->isr_lock, flags);
		}
		AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
		queue_tail_inc(eq);
		eqe = queue_tail_node(eq);
		num_eq_processed++;
	}
	if (phba->todo_mcc_cq)
		queue_work(phba->wq, &phba->work_cqs);
	if (num_eq_processed)
		hwi_ring_eq_db(phba, eq->id, 1,	num_eq_processed, 1, 1);

	return IRQ_HANDLED;
}

/**
 * be_isr_msix - The isr routine of the driver.
 * @irq: Not used
 * @dev_id: Pointer to host adapter structure
 */
static irqreturn_t be_isr_msix(int irq, void *dev_id)
{
	struct beiscsi_hba *phba;
	struct be_eq_entry *eqe = NULL;
	struct be_queue_info *eq;
	struct be_queue_info *cq;
	unsigned int num_eq_processed;
	struct be_eq_obj *pbe_eq;
	unsigned long flags;

	pbe_eq = dev_id;
	eq = &pbe_eq->q;
	cq = pbe_eq->cq;
	eqe = queue_tail_node(eq);
	if (!eqe)
		SE_DEBUG(DBG_LVL_1, "eqe is NULL\n");

	phba = pbe_eq->phba;
	num_eq_processed = 0;
	if (blk_iopoll_enabled) {
		while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
					& EQE_VALID_MASK) {
			if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
				blk_iopoll_sched(&pbe_eq->iopoll);

			AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
			queue_tail_inc(eq);
			eqe = queue_tail_node(eq);
			num_eq_processed++;
		}
		if (num_eq_processed)
			hwi_ring_eq_db(phba, eq->id, 1,	num_eq_processed, 0, 1);

		return IRQ_HANDLED;
	} else {
		while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
						& EQE_VALID_MASK) {
			spin_lock_irqsave(&phba->isr_lock, flags);
			phba->todo_cq = 1;
			spin_unlock_irqrestore(&phba->isr_lock, flags);
			AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
			queue_tail_inc(eq);
			eqe = queue_tail_node(eq);
			num_eq_processed++;
		}
		if (phba->todo_cq)
			queue_work(phba->wq, &phba->work_cqs);

		if (num_eq_processed)
			hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 1, 1);

		return IRQ_HANDLED;
	}
}

709 710 711 712 713 714 715 716 717 718 719 720 721
/**
 * be_isr - The isr routine of the driver.
 * @irq: Not used
 * @dev_id: Pointer to host adapter structure
 */
static irqreturn_t be_isr(int irq, void *dev_id)
{
	struct beiscsi_hba *phba;
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	struct be_eq_entry *eqe = NULL;
	struct be_queue_info *eq;
	struct be_queue_info *cq;
722
	struct be_queue_info *mcc;
723
	unsigned long flags, index;
724
	unsigned int num_mcceq_processed, num_ioeq_processed;
725
	struct be_ctrl_info *ctrl;
726
	struct be_eq_obj *pbe_eq;
727 728 729
	int isr;

	phba = dev_id;
730
	ctrl = &phba->ctrl;
731 732 733 734
	isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
		       (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
	if (!isr)
		return IRQ_NONE;
735 736 737

	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
738 739 740 741
	pbe_eq = &phwi_context->be_eq[0];

	eq = &phwi_context->be_eq[0].q;
	mcc = &phba->ctrl.mcc_obj.cq;
742 743 744 745 746
	index = 0;
	eqe = queue_tail_node(eq);
	if (!eqe)
		SE_DEBUG(DBG_LVL_1, "eqe is NULL\n");

747 748
	num_ioeq_processed = 0;
	num_mcceq_processed = 0;
749 750 751
	if (blk_iopoll_enabled) {
		while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
					& EQE_VALID_MASK) {
752 753 754 755 756 757 758 759 760 761 762 763
			if (((eqe->dw[offsetof(struct amap_eq_entry,
			     resource_id) / 32] &
			     EQE_RESID_MASK) >> 16) == mcc->id) {
				spin_lock_irqsave(&phba->isr_lock, flags);
				phba->todo_mcc_cq = 1;
				spin_unlock_irqrestore(&phba->isr_lock, flags);
				num_mcceq_processed++;
			} else {
				if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
					blk_iopoll_sched(&pbe_eq->iopoll);
				num_ioeq_processed++;
			}
764 765 766 767
			AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
			queue_tail_inc(eq);
			eqe = queue_tail_node(eq);
		}
768 769 770 771
		if (num_ioeq_processed || num_mcceq_processed) {
			if (phba->todo_mcc_cq)
				queue_work(phba->wq, &phba->work_cqs);

772
			if ((num_mcceq_processed) && (!num_ioeq_processed))
773 774 775 776 777 778 779 780
				hwi_ring_eq_db(phba, eq->id, 0,
					      (num_ioeq_processed +
					       num_mcceq_processed) , 1, 1);
			else
				hwi_ring_eq_db(phba, eq->id, 0,
					       (num_ioeq_processed +
						num_mcceq_processed), 0, 1);

781 782 783 784
			return IRQ_HANDLED;
		} else
			return IRQ_NONE;
	} else {
785
		cq = &phwi_context->be_cq[0];
786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802
		while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
						& EQE_VALID_MASK) {

			if (((eqe->dw[offsetof(struct amap_eq_entry,
			     resource_id) / 32] &
			     EQE_RESID_MASK) >> 16) != cq->id) {
				spin_lock_irqsave(&phba->isr_lock, flags);
				phba->todo_mcc_cq = 1;
				spin_unlock_irqrestore(&phba->isr_lock, flags);
			} else {
				spin_lock_irqsave(&phba->isr_lock, flags);
				phba->todo_cq = 1;
				spin_unlock_irqrestore(&phba->isr_lock, flags);
			}
			AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
			queue_tail_inc(eq);
			eqe = queue_tail_node(eq);
803
			num_ioeq_processed++;
804 805 806 807
		}
		if (phba->todo_cq || phba->todo_mcc_cq)
			queue_work(phba->wq, &phba->work_cqs);

808 809 810
		if (num_ioeq_processed) {
			hwi_ring_eq_db(phba, eq->id, 0,
				       num_ioeq_processed, 1, 1);
811 812 813 814 815 816 817 818 819
			return IRQ_HANDLED;
		} else
			return IRQ_NONE;
	}
}

static int beiscsi_init_irqs(struct beiscsi_hba *phba)
{
	struct pci_dev *pcidev = phba->pcidev;
820 821
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
822
	int ret, msix_vec, i, j;
823

824 825 826 827 828
	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;

	if (phba->msix_enabled) {
		for (i = 0; i < phba->num_cpus; i++) {
829 830 831 832 833 834 835 836 837
			phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME,
						    GFP_KERNEL);
			if (!phba->msi_name[i]) {
				ret = -ENOMEM;
				goto free_msix_irqs;
			}

			sprintf(phba->msi_name[i], "beiscsi_%02x_%02x",
				phba->shost->host_no, i);
838
			msix_vec = phba->msix_entries[i].vector;
839 840
			ret = request_irq(msix_vec, be_isr_msix, 0,
					  phba->msi_name[i],
841
					  &phwi_context->be_eq[i]);
842 843 844 845
			if (ret) {
				shost_printk(KERN_ERR, phba->shost,
					     "beiscsi_init_irqs-Failed to"
					     "register msix for i = %d\n", i);
846
				kfree(phba->msi_name[i]);
847 848
				goto free_msix_irqs;
			}
849
		}
850 851 852 853 854 855 856
		phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME, GFP_KERNEL);
		if (!phba->msi_name[i]) {
			ret = -ENOMEM;
			goto free_msix_irqs;
		}
		sprintf(phba->msi_name[i], "beiscsi_mcc_%02x",
			phba->shost->host_no);
857
		msix_vec = phba->msix_entries[i].vector;
858
		ret = request_irq(msix_vec, be_isr_mcc, 0, phba->msi_name[i],
859
				  &phwi_context->be_eq[i]);
860 861 862
		if (ret) {
			shost_printk(KERN_ERR, phba->shost, "beiscsi_init_irqs-"
				     "Failed to register beiscsi_msix_mcc\n");
863
			kfree(phba->msi_name[i]);
864 865 866
			goto free_msix_irqs;
		}

867 868 869 870 871 872 873 874
	} else {
		ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
				  "beiscsi", phba);
		if (ret) {
			shost_printk(KERN_ERR, phba->shost, "beiscsi_init_irqs-"
				     "Failed to register irq\\n");
			return ret;
		}
875 876
	}
	return 0;
877
free_msix_irqs:
878 879 880
	for (j = i - 1; j >= 0; j--) {
		kfree(phba->msi_name[j]);
		msix_vec = phba->msix_entries[j].vector;
881
		free_irq(msix_vec, &phwi_context->be_eq[j]);
882
	}
883
	return ret;
884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907
}

static void hwi_ring_cq_db(struct beiscsi_hba *phba,
			   unsigned int id, unsigned int num_processed,
			   unsigned char rearm, unsigned char event)
{
	u32 val = 0;
	val |= id & DB_CQ_RING_ID_MASK;
	if (rearm)
		val |= 1 << DB_CQ_REARM_SHIFT;
	val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
	iowrite32(val, phba->db_va + DB_CQ_OFFSET);
}

static unsigned int
beiscsi_process_async_pdu(struct beiscsi_conn *beiscsi_conn,
			  struct beiscsi_hba *phba,
			  unsigned short cid,
			  struct pdu_base *ppdu,
			  unsigned long pdu_len,
			  void *pbuffer, unsigned long buf_len)
{
	struct iscsi_conn *conn = beiscsi_conn->conn;
	struct iscsi_session *session = conn->session;
908 909 910
	struct iscsi_task *task;
	struct beiscsi_io_task *io_task;
	struct iscsi_hdr *login_hdr;
911 912 913 914 915 916 917 918 919 920 921 922 923 924 925

	switch (ppdu->dw[offsetof(struct amap_pdu_base, opcode) / 32] &
						PDUBASE_OPCODE_MASK) {
	case ISCSI_OP_NOOP_IN:
		pbuffer = NULL;
		buf_len = 0;
		break;
	case ISCSI_OP_ASYNC_EVENT:
		break;
	case ISCSI_OP_REJECT:
		WARN_ON(!pbuffer);
		WARN_ON(!(buf_len == 48));
		SE_DEBUG(DBG_LVL_1, "In ISCSI_OP_REJECT\n");
		break;
	case ISCSI_OP_LOGIN_RSP:
926
	case ISCSI_OP_TEXT_RSP:
927 928 929 930
		task = conn->login_task;
		io_task = task->dd_data;
		login_hdr = (struct iscsi_hdr *)ppdu;
		login_hdr->itt = io_task->libiscsi_itt;
931 932 933
		break;
	default:
		shost_printk(KERN_WARNING, phba->shost,
934
			     "Unrecognized opcode 0x%x in async msg\n",
935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952
			     (ppdu->
			     dw[offsetof(struct amap_pdu_base, opcode) / 32]
						& PDUBASE_OPCODE_MASK));
		return 1;
	}

	spin_lock_bh(&session->lock);
	__iscsi_complete_pdu(conn, (struct iscsi_hdr *)ppdu, pbuffer, buf_len);
	spin_unlock_bh(&session->lock);
	return 0;
}

static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
{
	struct sgl_handle *psgl_handle;

	if (phba->io_sgl_hndl_avbl) {
		SE_DEBUG(DBG_LVL_8,
953
			 "In alloc_io_sgl_handle,io_sgl_alloc_index=%d\n",
954 955 956 957 958
			 phba->io_sgl_alloc_index);
		psgl_handle = phba->io_sgl_hndl_base[phba->
						io_sgl_alloc_index];
		phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
		phba->io_sgl_hndl_avbl--;
959 960
		if (phba->io_sgl_alloc_index == (phba->params.
						 ios_per_ctrl - 1))
961 962 963 964 965 966 967 968 969 970 971
			phba->io_sgl_alloc_index = 0;
		else
			phba->io_sgl_alloc_index++;
	} else
		psgl_handle = NULL;
	return psgl_handle;
}

static void
free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
{
972
	SE_DEBUG(DBG_LVL_8, "In free_,io_sgl_free_index=%d\n",
973 974 975 976 977 978 979 980
		 phba->io_sgl_free_index);
	if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
		/*
		 * this can happen if clean_task is called on a task that
		 * failed in xmit_task or alloc_pdu.
		 */
		 SE_DEBUG(DBG_LVL_8,
			 "Double Free in IO SGL io_sgl_free_index=%d,"
981
			 "value there=%p\n", phba->io_sgl_free_index,
982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999
			 phba->io_sgl_hndl_base[phba->io_sgl_free_index]);
		return;
	}
	phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
	phba->io_sgl_hndl_avbl++;
	if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
		phba->io_sgl_free_index = 0;
	else
		phba->io_sgl_free_index++;
}

/**
 * alloc_wrb_handle - To allocate a wrb handle
 * @phba: The hba pointer
 * @cid: The cid to use for allocation
 *
 * This happens under session_lock until submission to chip
 */
1000
struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid)
1001 1002 1003
{
	struct hwi_wrb_context *pwrb_context;
	struct hwi_controller *phwi_ctrlr;
1004
	struct wrb_handle *pwrb_handle, *pwrb_handle_tmp;
1005 1006 1007

	phwi_ctrlr = phba->phwi_ctrlr;
	pwrb_context = &phwi_ctrlr->wrb_context[cid];
1008
	if (pwrb_context->wrb_handles_available >= 2) {
1009 1010 1011 1012 1013 1014 1015 1016
		pwrb_handle = pwrb_context->pwrb_handle_base[
					    pwrb_context->alloc_index];
		pwrb_context->wrb_handles_available--;
		if (pwrb_context->alloc_index ==
						(phba->params.wrbs_per_cxn - 1))
			pwrb_context->alloc_index = 0;
		else
			pwrb_context->alloc_index++;
1017 1018 1019
		pwrb_handle_tmp = pwrb_context->pwrb_handle_base[
						pwrb_context->alloc_index];
		pwrb_handle->nxt_wrb_index = pwrb_handle_tmp->wrb_index;
1020 1021
	} else
		pwrb_handle = NULL;
1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036
	return pwrb_handle;
}

/**
 * free_wrb_handle - To free the wrb handle back to pool
 * @phba: The hba pointer
 * @pwrb_context: The context to free from
 * @pwrb_handle: The wrb_handle to free
 *
 * This happens under session_lock until submission to chip
 */
static void
free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
		struct wrb_handle *pwrb_handle)
{
1037
	pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
1038 1039 1040 1041 1042 1043
	pwrb_context->wrb_handles_available++;
	if (pwrb_context->free_index == (phba->params.wrbs_per_cxn - 1))
		pwrb_context->free_index = 0;
	else
		pwrb_context->free_index++;

1044
	SE_DEBUG(DBG_LVL_8,
1045
		 "FREE WRB: pwrb_handle=%p free_index=0x%x"
1046
		 "wrb_handles_available=%d\n",
1047
		 pwrb_handle, pwrb_context->free_index,
1048
		 pwrb_context->wrb_handles_available);
1049 1050 1051 1052 1053 1054 1055 1056 1057
}

static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
{
	struct sgl_handle *psgl_handle;

	if (phba->eh_sgl_hndl_avbl) {
		psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
		phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
1058
		SE_DEBUG(DBG_LVL_8, "mgmt_sgl_alloc_index=%d=0x%x\n",
1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075
			 phba->eh_sgl_alloc_index, phba->eh_sgl_alloc_index);
		phba->eh_sgl_hndl_avbl--;
		if (phba->eh_sgl_alloc_index ==
		    (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
		     1))
			phba->eh_sgl_alloc_index = 0;
		else
			phba->eh_sgl_alloc_index++;
	} else
		psgl_handle = NULL;
	return psgl_handle;
}

void
free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
{

1076
	SE_DEBUG(DBG_LVL_8, "In  free_mgmt_sgl_handle,eh_sgl_free_index=%d\n",
1077
			     phba->eh_sgl_free_index);
1078 1079 1080 1081 1082 1083
	if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
		/*
		 * this can happen if clean_task is called on a task that
		 * failed in xmit_task or alloc_pdu.
		 */
		SE_DEBUG(DBG_LVL_8,
1084
			 "Double Free in eh SGL ,eh_sgl_free_index=%d\n",
1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108
			 phba->eh_sgl_free_index);
		return;
	}
	phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
	phba->eh_sgl_hndl_avbl++;
	if (phba->eh_sgl_free_index ==
	    (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
		phba->eh_sgl_free_index = 0;
	else
		phba->eh_sgl_free_index++;
}

static void
be_complete_io(struct beiscsi_conn *beiscsi_conn,
	       struct iscsi_task *task, struct sol_cqe *psol)
{
	struct beiscsi_io_task *io_task = task->dd_data;
	struct be_status_bhs *sts_bhs =
				(struct be_status_bhs *)io_task->cmd_bhs;
	struct iscsi_conn *conn = beiscsi_conn->conn;
	unsigned char *sense;
	u32 resid = 0, exp_cmdsn, max_cmdsn;
	u8 rsp, status, flags;

1109
	exp_cmdsn = (psol->
1110 1111
			dw[offsetof(struct amap_sol_cqe, i_exp_cmd_sn) / 32]
			& SOL_EXP_CMD_SN_MASK);
1112
	max_cmdsn = ((psol->
1113 1114 1115 1116 1117 1118 1119 1120 1121 1122
			dw[offsetof(struct amap_sol_cqe, i_exp_cmd_sn) / 32]
			& SOL_EXP_CMD_SN_MASK) +
			((psol->dw[offsetof(struct amap_sol_cqe, i_cmd_wnd)
				/ 32] & SOL_CMD_WND_MASK) >> 24) - 1);
	rsp = ((psol->dw[offsetof(struct amap_sol_cqe, i_resp) / 32]
						& SOL_RESP_MASK) >> 16);
	status = ((psol->dw[offsetof(struct amap_sol_cqe, i_sts) / 32]
						& SOL_STS_MASK) >> 8);
	flags = ((psol->dw[offsetof(struct amap_sol_cqe, i_flags) / 32]
					& SOL_FLAGS_MASK) >> 24) | 0x80;
1123 1124 1125
	if (!task->sc) {
		if (io_task->scsi_cmnd)
			scsi_dma_unmap(io_task->scsi_cmnd);
1126

1127 1128
		return;
	}
1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151
	task->sc->result = (DID_OK << 16) | status;
	if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
		task->sc->result = DID_ERROR << 16;
		goto unmap;
	}

	/* bidi not initially supported */
	if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
		resid = (psol->dw[offsetof(struct amap_sol_cqe, i_res_cnt) /
				32] & SOL_RES_CNT_MASK);

		if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
			task->sc->result = DID_ERROR << 16;

		if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
			scsi_set_resid(task->sc, resid);
			if (!status && (scsi_bufflen(task->sc) - resid <
			    task->sc->underflow))
				task->sc->result = DID_ERROR << 16;
		}
	}

	if (status == SAM_STAT_CHECK_CONDITION) {
1152
		u16 sense_len;
1153
		unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
1154

1155
		sense = sts_bhs->sense_info + sizeof(unsigned short);
1156
		sense_len = be16_to_cpu(*slen);
1157 1158 1159
		memcpy(task->sc->sense_buffer, sense,
		       min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
	}
1160

1161 1162 1163 1164
	if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ) {
		if (psol->dw[offsetof(struct amap_sol_cqe, i_res_cnt) / 32]
							& SOL_RES_CNT_MASK)
			 conn->rxdata_octets += (psol->
1165 1166
			     dw[offsetof(struct amap_sol_cqe, i_res_cnt) / 32]
			     & SOL_RES_CNT_MASK);
1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177
	}
unmap:
	scsi_dma_unmap(io_task->scsi_cmnd);
	iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
}

static void
be_complete_logout(struct beiscsi_conn *beiscsi_conn,
		   struct iscsi_task *task, struct sol_cqe *psol)
{
	struct iscsi_logout_rsp *hdr;
1178
	struct beiscsi_io_task *io_task = task->dd_data;
1179 1180 1181
	struct iscsi_conn *conn = beiscsi_conn->conn;

	hdr = (struct iscsi_logout_rsp *)task->hdr;
1182
	hdr->opcode = ISCSI_OP_LOGOUT_RSP;
1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196
	hdr->t2wait = 5;
	hdr->t2retain = 0;
	hdr->flags = ((psol->dw[offsetof(struct amap_sol_cqe, i_flags) / 32]
					& SOL_FLAGS_MASK) >> 24) | 0x80;
	hdr->response = (psol->dw[offsetof(struct amap_sol_cqe, i_resp) /
					32] & SOL_RESP_MASK);
	hdr->exp_cmdsn = cpu_to_be32(psol->
			dw[offsetof(struct amap_sol_cqe, i_exp_cmd_sn) / 32]
					& SOL_EXP_CMD_SN_MASK);
	hdr->max_cmdsn = be32_to_cpu((psol->
			 dw[offsetof(struct amap_sol_cqe, i_exp_cmd_sn) / 32]
					& SOL_EXP_CMD_SN_MASK) +
			((psol->dw[offsetof(struct amap_sol_cqe, i_cmd_wnd)
					/ 32] & SOL_CMD_WND_MASK) >> 24) - 1);
1197 1198 1199
	hdr->dlength[0] = 0;
	hdr->dlength[1] = 0;
	hdr->dlength[2] = 0;
1200
	hdr->hlength = 0;
1201
	hdr->itt = io_task->libiscsi_itt;
1202 1203 1204 1205 1206 1207 1208 1209 1210
	__iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
}

static void
be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
		struct iscsi_task *task, struct sol_cqe *psol)
{
	struct iscsi_tm_rsp *hdr;
	struct iscsi_conn *conn = beiscsi_conn->conn;
1211
	struct beiscsi_io_task *io_task = task->dd_data;
1212 1213

	hdr = (struct iscsi_tm_rsp *)task->hdr;
1214
	hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
1215 1216 1217 1218 1219
	hdr->flags = ((psol->dw[offsetof(struct amap_sol_cqe, i_flags) / 32]
					& SOL_FLAGS_MASK) >> 24) | 0x80;
	hdr->response = (psol->dw[offsetof(struct amap_sol_cqe, i_resp) /
					32] & SOL_RESP_MASK);
	hdr->exp_cmdsn = cpu_to_be32(psol->dw[offsetof(struct amap_sol_cqe,
1220
				    i_exp_cmd_sn) / 32] & SOL_EXP_CMD_SN_MASK);
1221 1222 1223 1224
	hdr->max_cmdsn = be32_to_cpu((psol->dw[offsetof(struct amap_sol_cqe,
			i_exp_cmd_sn) / 32] & SOL_EXP_CMD_SN_MASK) +
			((psol->dw[offsetof(struct amap_sol_cqe, i_cmd_wnd)
			/ 32] & SOL_CMD_WND_MASK) >> 24) - 1);
1225
	hdr->itt = io_task->libiscsi_itt;
1226 1227 1228 1229 1230 1231 1232 1233
	__iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
}

static void
hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
		       struct beiscsi_hba *phba, struct sol_cqe *psol)
{
	struct hwi_wrb_context *pwrb_context;
1234
	struct wrb_handle *pwrb_handle = NULL;
1235
	struct hwi_controller *phwi_ctrlr;
1236 1237
	struct iscsi_task *task;
	struct beiscsi_io_task *io_task;
1238 1239 1240 1241
	struct iscsi_conn *conn = beiscsi_conn->conn;
	struct iscsi_session *session = conn->session;

	phwi_ctrlr = phba->phwi_ctrlr;
1242
	pwrb_context = &phwi_ctrlr->wrb_context[((psol->
1243
				dw[offsetof(struct amap_sol_cqe, cid) / 32] &
1244 1245
				SOL_CID_MASK) >> 6) -
				phba->fw_config.iscsi_cid_start];
1246
	pwrb_handle = pwrb_context->pwrb_handle_basestd[((psol->
1247 1248
				dw[offsetof(struct amap_sol_cqe, wrb_index) /
				32] & SOL_WRB_INDEX_MASK) >> 16)];
1249
	task = pwrb_handle->pio_handle;
1250

1251
	io_task = task->dd_data;
1252
	spin_lock_bh(&phba->mgmt_sgl_lock);
1253
	free_mgmt_sgl_handle(phba, io_task->psgl_handle);
1254
	spin_unlock_bh(&phba->mgmt_sgl_lock);
1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265
	spin_lock_bh(&session->lock);
	free_wrb_handle(phba, pwrb_context, pwrb_handle);
	spin_unlock_bh(&session->lock);
}

static void
be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
		       struct iscsi_task *task, struct sol_cqe *psol)
{
	struct iscsi_nopin *hdr;
	struct iscsi_conn *conn = beiscsi_conn->conn;
1266
	struct beiscsi_io_task *io_task = task->dd_data;
1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277

	hdr = (struct iscsi_nopin *)task->hdr;
	hdr->flags = ((psol->dw[offsetof(struct amap_sol_cqe, i_flags) / 32]
			& SOL_FLAGS_MASK) >> 24) | 0x80;
	hdr->exp_cmdsn = cpu_to_be32(psol->dw[offsetof(struct amap_sol_cqe,
				     i_exp_cmd_sn) / 32] & SOL_EXP_CMD_SN_MASK);
	hdr->max_cmdsn = be32_to_cpu((psol->dw[offsetof(struct amap_sol_cqe,
			i_exp_cmd_sn) / 32] & SOL_EXP_CMD_SN_MASK) +
			((psol->dw[offsetof(struct amap_sol_cqe, i_cmd_wnd)
			/ 32] & SOL_CMD_WND_MASK) >> 24) - 1);
	hdr->opcode = ISCSI_OP_NOOP_IN;
1278
	hdr->itt = io_task->libiscsi_itt;
1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289
	__iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
}

static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
			     struct beiscsi_hba *phba, struct sol_cqe *psol)
{
	struct hwi_wrb_context *pwrb_context;
	struct wrb_handle *pwrb_handle;
	struct iscsi_wrb *pwrb = NULL;
	struct hwi_controller *phwi_ctrlr;
	struct iscsi_task *task;
1290
	unsigned int type;
1291 1292 1293 1294
	struct iscsi_conn *conn = beiscsi_conn->conn;
	struct iscsi_session *session = conn->session;

	phwi_ctrlr = phba->phwi_ctrlr;
1295
	pwrb_context = &phwi_ctrlr->wrb_context[((psol->dw[offsetof
1296
				(struct amap_sol_cqe, cid) / 32]
1297 1298
				& SOL_CID_MASK) >> 6) -
				phba->fw_config.iscsi_cid_start];
1299
	pwrb_handle = pwrb_context->pwrb_handle_basestd[((psol->
1300 1301
				dw[offsetof(struct amap_sol_cqe, wrb_index) /
				32] & SOL_WRB_INDEX_MASK) >> 16)];
1302 1303 1304 1305 1306
	task = pwrb_handle->pio_handle;
	pwrb = pwrb_handle->pwrb;
	type = (pwrb->dw[offsetof(struct amap_iscsi_wrb, type) / 32] &
				 WRB_TYPE_MASK) >> 28;

1307 1308
	spin_lock_bh(&session->lock);
	switch (type) {
1309 1310 1311
	case HWH_TYPE_IO:
	case HWH_TYPE_IO_RD:
		if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
1312
		     ISCSI_OP_NOOP_OUT)
1313
			be_complete_nopin_resp(beiscsi_conn, task, psol);
1314
		else
1315 1316 1317 1318
			be_complete_io(beiscsi_conn, task, psol);
		break;

	case HWH_TYPE_LOGOUT:
1319 1320 1321 1322 1323
		if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
			be_complete_logout(beiscsi_conn, task, psol);
		else
			be_complete_tmf(beiscsi_conn, task, psol);

1324 1325 1326 1327 1328
		break;

	case HWH_TYPE_LOGIN:
		SE_DEBUG(DBG_LVL_1,
			 "\t\t No HWH_TYPE_LOGIN Expected in hwi_complete_cmd"
1329
			 "- Solicited path\n");
1330 1331 1332 1333 1334 1335 1336
		break;

	case HWH_TYPE_NOP:
		be_complete_nopin_resp(beiscsi_conn, task, psol);
		break;

	default:
1337
		shost_printk(KERN_WARNING, phba->shost,
1338 1339 1340 1341 1342 1343
				"In hwi_complete_cmd, unknown type = %d"
				"wrb_index 0x%x CID 0x%x\n", type,
				((psol->dw[offsetof(struct amap_iscsi_wrb,
				type) / 32] & SOL_WRB_INDEX_MASK) >> 16),
				((psol->dw[offsetof(struct amap_sol_cqe,
				cid) / 32] & SOL_CID_MASK) >> 6));
1344 1345
		break;
	}
1346

1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398
	spin_unlock_bh(&session->lock);
}

static struct list_head *hwi_get_async_busy_list(struct hwi_async_pdu_context
					  *pasync_ctx, unsigned int is_header,
					  unsigned int host_write_ptr)
{
	if (is_header)
		return &pasync_ctx->async_entry[host_write_ptr].
		    header_busy_list;
	else
		return &pasync_ctx->async_entry[host_write_ptr].data_busy_list;
}

static struct async_pdu_handle *
hwi_get_async_handle(struct beiscsi_hba *phba,
		     struct beiscsi_conn *beiscsi_conn,
		     struct hwi_async_pdu_context *pasync_ctx,
		     struct i_t_dpdu_cqe *pdpdu_cqe, unsigned int *pcq_index)
{
	struct be_bus_address phys_addr;
	struct list_head *pbusy_list;
	struct async_pdu_handle *pasync_handle = NULL;
	unsigned char is_header = 0;

	phys_addr.u.a32.address_lo =
	    pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, db_addr_lo) / 32] -
	    ((pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, dpl) / 32]
						& PDUCQE_DPL_MASK) >> 16);
	phys_addr.u.a32.address_hi =
	    pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, db_addr_hi) / 32];

	phys_addr.u.a64.address =
			*((unsigned long long *)(&phys_addr.u.a64.address));

	switch (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, code) / 32]
			& PDUCQE_CODE_MASK) {
	case UNSOL_HDR_NOTIFY:
		is_header = 1;

		pbusy_list = hwi_get_async_busy_list(pasync_ctx, 1,
			(pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
			index) / 32] & PDUCQE_INDEX_MASK));
		break;
	case UNSOL_DATA_NOTIFY:
		pbusy_list = hwi_get_async_busy_list(pasync_ctx, 0, (pdpdu_cqe->
					dw[offsetof(struct amap_i_t_dpdu_cqe,
					index) / 32] & PDUCQE_INDEX_MASK));
		break;
	default:
		pbusy_list = NULL;
		shost_printk(KERN_WARNING, phba->shost,
1399
			"Unexpected code=%d\n",
1400 1401 1402 1403 1404 1405 1406
			 pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
					code) / 32] & PDUCQE_CODE_MASK);
		return NULL;
	}

	WARN_ON(list_empty(pbusy_list));
	list_for_each_entry(pasync_handle, pbusy_list, link) {
1407
		if (pasync_handle->pa.u.a64.address == phys_addr.u.a64.address)
1408 1409 1410 1411 1412
			break;
	}

	WARN_ON(!pasync_handle);

1413 1414
	pasync_handle->cri = (unsigned short)beiscsi_conn->beiscsi_conn_cid -
					     phba->fw_config.iscsi_cid_start;
1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433
	pasync_handle->is_header = is_header;
	pasync_handle->buffer_len = ((pdpdu_cqe->
			dw[offsetof(struct amap_i_t_dpdu_cqe, dpl) / 32]
			& PDUCQE_DPL_MASK) >> 16);

	*pcq_index = (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
			index) / 32] & PDUCQE_INDEX_MASK);
	return pasync_handle;
}

static unsigned int
hwi_update_async_writables(struct hwi_async_pdu_context *pasync_ctx,
			   unsigned int is_header, unsigned int cq_index)
{
	struct list_head *pbusy_list;
	struct async_pdu_handle *pasync_handle;
	unsigned int num_entries, writables = 0;
	unsigned int *pep_read_ptr, *pwritables;

1434
	num_entries = pasync_ctx->num_entries;
1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473
	if (is_header) {
		pep_read_ptr = &pasync_ctx->async_header.ep_read_ptr;
		pwritables = &pasync_ctx->async_header.writables;
	} else {
		pep_read_ptr = &pasync_ctx->async_data.ep_read_ptr;
		pwritables = &pasync_ctx->async_data.writables;
	}

	while ((*pep_read_ptr) != cq_index) {
		(*pep_read_ptr)++;
		*pep_read_ptr = (*pep_read_ptr) % num_entries;

		pbusy_list = hwi_get_async_busy_list(pasync_ctx, is_header,
						     *pep_read_ptr);
		if (writables == 0)
			WARN_ON(list_empty(pbusy_list));

		if (!list_empty(pbusy_list)) {
			pasync_handle = list_entry(pbusy_list->next,
						   struct async_pdu_handle,
						   link);
			WARN_ON(!pasync_handle);
			pasync_handle->consumed = 1;
		}

		writables++;
	}

	if (!writables) {
		SE_DEBUG(DBG_LVL_1,
			 "Duplicate notification received - index 0x%x!!\n",
			 cq_index);
		WARN_ON(1);
	}

	*pwritables = *pwritables + writables;
	return 0;
}

1474
static void hwi_free_async_msg(struct beiscsi_hba *phba,
1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489
				       unsigned int cri)
{
	struct hwi_controller *phwi_ctrlr;
	struct hwi_async_pdu_context *pasync_ctx;
	struct async_pdu_handle *pasync_handle, *tmp_handle;
	struct list_head *plist;

	phwi_ctrlr = phba->phwi_ctrlr;
	pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);

	plist  = &pasync_ctx->async_entry[cri].wait_queue.list;

	list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link) {
		list_del(&pasync_handle->link);

1490
		if (pasync_handle->is_header) {
1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535
			list_add_tail(&pasync_handle->link,
				      &pasync_ctx->async_header.free_list);
			pasync_ctx->async_header.free_entries++;
		} else {
			list_add_tail(&pasync_handle->link,
				      &pasync_ctx->async_data.free_list);
			pasync_ctx->async_data.free_entries++;
		}
	}

	INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wait_queue.list);
	pasync_ctx->async_entry[cri].wait_queue.hdr_received = 0;
	pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
}

static struct phys_addr *
hwi_get_ring_address(struct hwi_async_pdu_context *pasync_ctx,
		     unsigned int is_header, unsigned int host_write_ptr)
{
	struct phys_addr *pasync_sge = NULL;

	if (is_header)
		pasync_sge = pasync_ctx->async_header.ring_base;
	else
		pasync_sge = pasync_ctx->async_data.ring_base;

	return pasync_sge + host_write_ptr;
}

static void hwi_post_async_buffers(struct beiscsi_hba *phba,
				   unsigned int is_header)
{
	struct hwi_controller *phwi_ctrlr;
	struct hwi_async_pdu_context *pasync_ctx;
	struct async_pdu_handle *pasync_handle;
	struct list_head *pfree_link, *pbusy_list;
	struct phys_addr *pasync_sge;
	unsigned int ring_id, num_entries;
	unsigned int host_write_num;
	unsigned int writables;
	unsigned int i = 0;
	u32 doorbell = 0;

	phwi_ctrlr = phba->phwi_ctrlr;
	pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);
1536
	num_entries = pasync_ctx->num_entries;
1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650

	if (is_header) {
		writables = min(pasync_ctx->async_header.writables,
				pasync_ctx->async_header.free_entries);
		pfree_link = pasync_ctx->async_header.free_list.next;
		host_write_num = pasync_ctx->async_header.host_write_ptr;
		ring_id = phwi_ctrlr->default_pdu_hdr.id;
	} else {
		writables = min(pasync_ctx->async_data.writables,
				pasync_ctx->async_data.free_entries);
		pfree_link = pasync_ctx->async_data.free_list.next;
		host_write_num = pasync_ctx->async_data.host_write_ptr;
		ring_id = phwi_ctrlr->default_pdu_data.id;
	}

	writables = (writables / 8) * 8;
	if (writables) {
		for (i = 0; i < writables; i++) {
			pbusy_list =
			    hwi_get_async_busy_list(pasync_ctx, is_header,
						    host_write_num);
			pasync_handle =
			    list_entry(pfree_link, struct async_pdu_handle,
								link);
			WARN_ON(!pasync_handle);
			pasync_handle->consumed = 0;

			pfree_link = pfree_link->next;

			pasync_sge = hwi_get_ring_address(pasync_ctx,
						is_header, host_write_num);

			pasync_sge->hi = pasync_handle->pa.u.a32.address_lo;
			pasync_sge->lo = pasync_handle->pa.u.a32.address_hi;

			list_move(&pasync_handle->link, pbusy_list);

			host_write_num++;
			host_write_num = host_write_num % num_entries;
		}

		if (is_header) {
			pasync_ctx->async_header.host_write_ptr =
							host_write_num;
			pasync_ctx->async_header.free_entries -= writables;
			pasync_ctx->async_header.writables -= writables;
			pasync_ctx->async_header.busy_entries += writables;
		} else {
			pasync_ctx->async_data.host_write_ptr = host_write_num;
			pasync_ctx->async_data.free_entries -= writables;
			pasync_ctx->async_data.writables -= writables;
			pasync_ctx->async_data.busy_entries += writables;
		}

		doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
		doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
		doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
		doorbell |= (writables & DB_DEF_PDU_CQPROC_MASK)
					<< DB_DEF_PDU_CQPROC_SHIFT;

		iowrite32(doorbell, phba->db_va + DB_RXULP0_OFFSET);
	}
}

static void hwi_flush_default_pdu_buffer(struct beiscsi_hba *phba,
					 struct beiscsi_conn *beiscsi_conn,
					 struct i_t_dpdu_cqe *pdpdu_cqe)
{
	struct hwi_controller *phwi_ctrlr;
	struct hwi_async_pdu_context *pasync_ctx;
	struct async_pdu_handle *pasync_handle = NULL;
	unsigned int cq_index = -1;

	phwi_ctrlr = phba->phwi_ctrlr;
	pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);

	pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
					     pdpdu_cqe, &cq_index);
	BUG_ON(pasync_handle->is_header != 0);
	if (pasync_handle->consumed == 0)
		hwi_update_async_writables(pasync_ctx, pasync_handle->is_header,
					   cq_index);

	hwi_free_async_msg(phba, pasync_handle->cri);
	hwi_post_async_buffers(phba, pasync_handle->is_header);
}

static unsigned int
hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn,
		  struct beiscsi_hba *phba,
		  struct hwi_async_pdu_context *pasync_ctx, unsigned short cri)
{
	struct list_head *plist;
	struct async_pdu_handle *pasync_handle;
	void *phdr = NULL;
	unsigned int hdr_len = 0, buf_len = 0;
	unsigned int status, index = 0, offset = 0;
	void *pfirst_buffer = NULL;
	unsigned int num_buf = 0;

	plist = &pasync_ctx->async_entry[cri].wait_queue.list;

	list_for_each_entry(pasync_handle, plist, link) {
		if (index == 0) {
			phdr = pasync_handle->pbuffer;
			hdr_len = pasync_handle->buffer_len;
		} else {
			buf_len = pasync_handle->buffer_len;
			if (!num_buf) {
				pfirst_buffer = pasync_handle->pbuffer;
				num_buf++;
			}
			memcpy(pfirst_buffer + offset,
			       pasync_handle->pbuffer, buf_len);
1651
			offset += buf_len;
1652 1653 1654 1655 1656
		}
		index++;
	}

	status = beiscsi_process_async_pdu(beiscsi_conn, phba,
1657 1658 1659
					   (beiscsi_conn->beiscsi_conn_cid -
					    phba->fw_config.iscsi_cid_start),
					    phdr, hdr_len, pfirst_buffer,
1660
					    offset);
1661

1662
	hwi_free_async_msg(phba, cri);
1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751
	return 0;
}

static unsigned int
hwi_gather_async_pdu(struct beiscsi_conn *beiscsi_conn,
		     struct beiscsi_hba *phba,
		     struct async_pdu_handle *pasync_handle)
{
	struct hwi_async_pdu_context *pasync_ctx;
	struct hwi_controller *phwi_ctrlr;
	unsigned int bytes_needed = 0, status = 0;
	unsigned short cri = pasync_handle->cri;
	struct pdu_base *ppdu;

	phwi_ctrlr = phba->phwi_ctrlr;
	pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);

	list_del(&pasync_handle->link);
	if (pasync_handle->is_header) {
		pasync_ctx->async_header.busy_entries--;
		if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
			hwi_free_async_msg(phba, cri);
			BUG();
		}

		pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
		pasync_ctx->async_entry[cri].wait_queue.hdr_received = 1;
		pasync_ctx->async_entry[cri].wait_queue.hdr_len =
				(unsigned short)pasync_handle->buffer_len;
		list_add_tail(&pasync_handle->link,
			      &pasync_ctx->async_entry[cri].wait_queue.list);

		ppdu = pasync_handle->pbuffer;
		bytes_needed = ((((ppdu->dw[offsetof(struct amap_pdu_base,
			data_len_hi) / 32] & PDUBASE_DATALENHI_MASK) << 8) &
			0xFFFF0000) | ((be16_to_cpu((ppdu->
			dw[offsetof(struct amap_pdu_base, data_len_lo) / 32]
			& PDUBASE_DATALENLO_MASK) >> 16)) & 0x0000FFFF));

		if (status == 0) {
			pasync_ctx->async_entry[cri].wait_queue.bytes_needed =
			    bytes_needed;

			if (bytes_needed == 0)
				status = hwi_fwd_async_msg(beiscsi_conn, phba,
							   pasync_ctx, cri);
		}
	} else {
		pasync_ctx->async_data.busy_entries--;
		if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
			list_add_tail(&pasync_handle->link,
				      &pasync_ctx->async_entry[cri].wait_queue.
				      list);
			pasync_ctx->async_entry[cri].wait_queue.
				bytes_received +=
				(unsigned short)pasync_handle->buffer_len;

			if (pasync_ctx->async_entry[cri].wait_queue.
			    bytes_received >=
			    pasync_ctx->async_entry[cri].wait_queue.
			    bytes_needed)
				status = hwi_fwd_async_msg(beiscsi_conn, phba,
							   pasync_ctx, cri);
		}
	}
	return status;
}

static void hwi_process_default_pdu_ring(struct beiscsi_conn *beiscsi_conn,
					 struct beiscsi_hba *phba,
					 struct i_t_dpdu_cqe *pdpdu_cqe)
{
	struct hwi_controller *phwi_ctrlr;
	struct hwi_async_pdu_context *pasync_ctx;
	struct async_pdu_handle *pasync_handle = NULL;
	unsigned int cq_index = -1;

	phwi_ctrlr = phba->phwi_ctrlr;
	pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);
	pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
					     pdpdu_cqe, &cq_index);

	if (pasync_handle->consumed == 0)
		hwi_update_async_writables(pasync_ctx, pasync_handle->is_header,
					   cq_index);
	hwi_gather_async_pdu(beiscsi_conn, phba, pasync_handle);
	hwi_post_async_buffers(phba, pasync_handle->is_header);
}

1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776
static void  beiscsi_process_mcc_isr(struct beiscsi_hba *phba)
{
	struct be_queue_info *mcc_cq;
	struct  be_mcc_compl *mcc_compl;
	unsigned int num_processed = 0;

	mcc_cq = &phba->ctrl.mcc_obj.cq;
	mcc_compl = queue_tail_node(mcc_cq);
	mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
	while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {

		if (num_processed >= 32) {
			hwi_ring_cq_db(phba, mcc_cq->id,
					num_processed, 0, 0);
			num_processed = 0;
		}
		if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
			/* Interpret flags as an async trailer */
			if (is_link_state_evt(mcc_compl->flags))
				/* Interpret compl as a async link evt */
				beiscsi_async_link_state_process(phba,
				(struct be_async_event_link_state *) mcc_compl);
			else
				SE_DEBUG(DBG_LVL_1,
					" Unsupported Async Event, flags"
1777
					" = 0x%08x\n", mcc_compl->flags);
1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793
		} else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
			be_mcc_compl_process_isr(&phba->ctrl, mcc_compl);
			atomic_dec(&phba->ctrl.mcc_obj.q.used);
		}

		mcc_compl->flags = 0;
		queue_tail_inc(mcc_cq);
		mcc_compl = queue_tail_node(mcc_cq);
		mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
		num_processed++;
	}

	if (num_processed > 0)
		hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1, 0);

}
1794 1795

static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
1796 1797 1798 1799 1800 1801 1802
{
	struct be_queue_info *cq;
	struct sol_cqe *sol;
	struct dmsg_cqe *dmsg;
	unsigned int num_processed = 0;
	unsigned int tot_nump = 0;
	struct beiscsi_conn *beiscsi_conn;
1803 1804
	struct beiscsi_endpoint *beiscsi_ep;
	struct iscsi_endpoint *ep;
1805
	struct beiscsi_hba *phba;
1806

1807
	cq = pbe_eq->cq;
1808
	sol = queue_tail_node(cq);
1809
	phba = pbe_eq->phba;
1810 1811 1812 1813 1814

	while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
	       CQE_VALID_MASK) {
		be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));

1815
		ep = phba->ep_array[(u32) ((sol->
1816 1817
				   dw[offsetof(struct amap_sol_cqe, cid) / 32] &
				   SOL_CID_MASK) >> 6) -
1818
				   phba->fw_config.iscsi_cid_start];
1819

1820 1821
		beiscsi_ep = ep->dd_data;
		beiscsi_conn = beiscsi_ep->conn;
1822

1823
		if (num_processed >= 32) {
1824
			hwi_ring_cq_db(phba, cq->id,
1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835
					num_processed, 0, 0);
			tot_nump += num_processed;
			num_processed = 0;
		}

		switch ((u32) sol->dw[offsetof(struct amap_sol_cqe, code) /
			32] & CQE_CODE_MASK) {
		case SOL_CMD_COMPLETE:
			hwi_complete_cmd(beiscsi_conn, phba, sol);
			break;
		case DRIVERMSG_NOTIFY:
1836
			SE_DEBUG(DBG_LVL_8, "Received DRIVERMSG_NOTIFY\n");
1837 1838 1839 1840
			dmsg = (struct dmsg_cqe *)sol;
			hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
			break;
		case UNSOL_HDR_NOTIFY:
1841 1842 1843 1844
			SE_DEBUG(DBG_LVL_8, "Received UNSOL_HDR_ NOTIFY\n");
			hwi_process_default_pdu_ring(beiscsi_conn, phba,
					     (struct i_t_dpdu_cqe *)sol);
			break;
1845
		case UNSOL_DATA_NOTIFY:
1846
			SE_DEBUG(DBG_LVL_8, "Received UNSOL_DATA_NOTIFY\n");
1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864
			hwi_process_default_pdu_ring(beiscsi_conn, phba,
					     (struct i_t_dpdu_cqe *)sol);
			break;
		case CXN_INVALIDATE_INDEX_NOTIFY:
		case CMD_INVALIDATED_NOTIFY:
		case CXN_INVALIDATE_NOTIFY:
			SE_DEBUG(DBG_LVL_1,
				 "Ignoring CQ Error notification for cmd/cxn"
				 "invalidate\n");
			break;
		case SOL_CMD_KILLED_DATA_DIGEST_ERR:
		case CMD_KILLED_INVALID_STATSN_RCVD:
		case CMD_KILLED_INVALID_R2T_RCVD:
		case CMD_CXN_KILLED_LUN_INVALID:
		case CMD_CXN_KILLED_ICD_INVALID:
		case CMD_CXN_KILLED_ITT_INVALID:
		case CMD_CXN_KILLED_SEQ_OUTOFORDER:
		case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
1865
			SE_DEBUG(DBG_LVL_1,
1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892
				 "CQ Error notification for cmd.. "
				 "code %d cid 0x%x\n",
				 sol->dw[offsetof(struct amap_sol_cqe, code) /
				 32] & CQE_CODE_MASK,
				 (sol->dw[offsetof(struct amap_sol_cqe, cid) /
				 32] & SOL_CID_MASK));
			break;
		case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
			SE_DEBUG(DBG_LVL_1,
				 "Digest error on def pdu ring, dropping..\n");
			hwi_flush_default_pdu_buffer(phba, beiscsi_conn,
					     (struct i_t_dpdu_cqe *) sol);
			break;
		case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
		case CXN_KILLED_BURST_LEN_MISMATCH:
		case CXN_KILLED_AHS_RCVD:
		case CXN_KILLED_HDR_DIGEST_ERR:
		case CXN_KILLED_UNKNOWN_HDR:
		case CXN_KILLED_STALE_ITT_TTT_RCVD:
		case CXN_KILLED_INVALID_ITT_TTT_RCVD:
		case CXN_KILLED_TIMED_OUT:
		case CXN_KILLED_FIN_RCVD:
		case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
		case CXN_KILLED_BAD_WRB_INDEX_ERROR:
		case CXN_KILLED_OVER_RUN_RESIDUAL:
		case CXN_KILLED_UNDER_RUN_RESIDUAL:
		case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
1893
			SE_DEBUG(DBG_LVL_1, "CQ Error %d, reset CID "
1894 1895 1896
				 "0x%x...\n",
				 sol->dw[offsetof(struct amap_sol_cqe, code) /
				 32] & CQE_CODE_MASK,
1897 1898
				 (sol->dw[offsetof(struct amap_sol_cqe, cid) /
				 32] & CQE_CID_MASK));
1899 1900 1901 1902 1903
			iscsi_conn_failure(beiscsi_conn->conn,
					   ISCSI_ERR_CONN_FAILED);
			break;
		case CXN_KILLED_RST_SENT:
		case CXN_KILLED_RST_RCVD:
1904
			SE_DEBUG(DBG_LVL_1, "CQ Error %d, reset"
1905
				"received/sent on CID 0x%x...\n",
1906 1907
				 sol->dw[offsetof(struct amap_sol_cqe, code) /
				 32] & CQE_CODE_MASK,
1908 1909
				 (sol->dw[offsetof(struct amap_sol_cqe, cid) /
				 32] & CQE_CID_MASK));
1910 1911 1912 1913 1914 1915 1916 1917
			iscsi_conn_failure(beiscsi_conn->conn,
					   ISCSI_ERR_CONN_FAILED);
			break;
		default:
			SE_DEBUG(DBG_LVL_1, "CQ Error Invalid code= %d "
				 "received on CID 0x%x...\n",
				 sol->dw[offsetof(struct amap_sol_cqe, code) /
				 32] & CQE_CODE_MASK,
1918 1919
				 (sol->dw[offsetof(struct amap_sol_cqe, cid) /
				 32] & CQE_CID_MASK));
1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930
			break;
		}

		AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
		queue_tail_inc(cq);
		sol = queue_tail_node(cq);
		num_processed++;
	}

	if (num_processed > 0) {
		tot_nump += num_processed;
1931
		hwi_ring_cq_db(phba, cq->id, num_processed, 1, 0);
1932 1933 1934 1935
	}
	return tot_nump;
}

1936
void beiscsi_process_all_cqs(struct work_struct *work)
1937 1938
{
	unsigned long flags;
1939 1940 1941
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	struct be_eq_obj *pbe_eq;
1942 1943 1944
	struct beiscsi_hba *phba =
	    container_of(work, struct beiscsi_hba, work_cqs);

1945 1946 1947 1948 1949 1950 1951
	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
	if (phba->msix_enabled)
		pbe_eq = &phwi_context->be_eq[phba->num_cpus];
	else
		pbe_eq = &phwi_context->be_eq[0];

1952 1953 1954 1955
	if (phba->todo_mcc_cq) {
		spin_lock_irqsave(&phba->isr_lock, flags);
		phba->todo_mcc_cq = 0;
		spin_unlock_irqrestore(&phba->isr_lock, flags);
1956
		beiscsi_process_mcc_isr(phba);
1957 1958 1959 1960 1961 1962
	}

	if (phba->todo_cq) {
		spin_lock_irqsave(&phba->isr_lock, flags);
		phba->todo_cq = 0;
		spin_unlock_irqrestore(&phba->isr_lock, flags);
1963
		beiscsi_process_cq(pbe_eq);
1964 1965 1966 1967 1968 1969 1970
	}
}

static int be_iopoll(struct blk_iopoll *iop, int budget)
{
	static unsigned int ret;
	struct beiscsi_hba *phba;
1971
	struct be_eq_obj *pbe_eq;
1972

1973 1974
	pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
	ret = beiscsi_process_cq(pbe_eq);
1975
	if (ret < budget) {
1976
		phba = pbe_eq->phba;
1977
		blk_iopoll_complete(iop);
1978 1979
		SE_DEBUG(DBG_LVL_8, "rearm pbe_eq->q.id =%d\n", pbe_eq->q.id);
		hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
1980 1981 1982 1983 1984 1985 1986 1987 1988
	}
	return ret;
}

static void
hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
	      unsigned int num_sg, struct beiscsi_io_task *io_task)
{
	struct iscsi_sge *psgl;
1989
	unsigned int sg_len, index;
1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000
	unsigned int sge_len = 0;
	unsigned long long addr;
	struct scatterlist *l_sg;
	unsigned int offset;

	AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
				      io_task->bhs_pa.u.a32.address_lo);
	AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
				      io_task->bhs_pa.u.a32.address_hi);

	l_sg = sg;
2001 2002
	for (index = 0; (index < num_sg) && (index < 2); index++,
							 sg = sg_next(sg)) {
2003 2004 2005 2006
		if (index == 0) {
			sg_len = sg_dma_len(sg);
			addr = (u64) sg_dma_address(sg);
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2007
						((u32)(addr & 0xFFFFFFFF)));
2008
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2009
							((u32)(addr >> 32)));
2010 2011 2012 2013 2014 2015 2016 2017 2018
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
							sg_len);
			sge_len = sg_len;
		} else {
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
							pwrb, sge_len);
			sg_len = sg_dma_len(sg);
			addr = (u64) sg_dma_address(sg);
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
2019
						((u32)(addr & 0xFFFFFFFF)));
2020
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
2021
							((u32)(addr >> 32)));
2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035
			AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
							sg_len);
		}
	}
	psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
	memset(psgl, 0, sizeof(*psgl) * BE2_SGE);

	AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);

	AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
			io_task->bhs_pa.u.a32.address_hi);
	AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
			io_task->bhs_pa.u.a32.address_lo);

2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051
	if (num_sg == 1) {
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
								1);
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
								0);
	} else if (num_sg == 2) {
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
								0);
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
								1);
	} else {
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
								0);
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
								0);
	}
2052 2053 2054 2055
	sg = l_sg;
	psgl++;
	psgl++;
	offset = 0;
2056
	for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096
		sg_len = sg_dma_len(sg);
		addr = (u64) sg_dma_address(sg);
		AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
						(addr & 0xFFFFFFFF));
		AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
						(addr >> 32));
		AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
		AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
		AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
		offset += sg_len;
	}
	psgl--;
	AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
}

static void hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
{
	struct iscsi_sge *psgl;
	unsigned long long addr;
	struct beiscsi_io_task *io_task = task->dd_data;
	struct beiscsi_conn *beiscsi_conn = io_task->conn;
	struct beiscsi_hba *phba = beiscsi_conn->phba;

	io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
	AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
				io_task->bhs_pa.u.a32.address_lo);
	AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
				io_task->bhs_pa.u.a32.address_hi);

	if (task->data) {
		if (task->data_count) {
			AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
			addr = (u64) pci_map_single(phba->pcidev,
						    task->data,
						    task->data_count, 1);
		} else {
			AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
			addr = 0;
		}
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2097
						((u32)(addr & 0xFFFFFFFF)));
2098
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2099
						((u32)(addr >> 32)));
2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128
		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
						task->data_count);

		AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
	} else {
		AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
		addr = 0;
	}

	psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;

	AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);

	AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
		      io_task->bhs_pa.u.a32.address_hi);
	AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
		      io_task->bhs_pa.u.a32.address_lo);
	if (task->data) {
		psgl++;
		AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
		AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
		AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
		AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
		AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
		AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);

		psgl++;
		if (task->data) {
			AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2129
						((u32)(addr & 0xFFFFFFFF)));
2130
			AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2131
						((u32)(addr >> 32)));
2132 2133 2134 2135 2136 2137 2138 2139
		}
		AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
	}
	AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
}

static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
{
2140
	unsigned int num_cq_pages, num_async_pdu_buf_pages;
2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165 2166 2167 2168 2169 2170 2171 2172 2173 2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202 2203 2204 2205
	unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
	unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;

	num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
				      sizeof(struct sol_cqe));
	num_async_pdu_buf_pages =
			PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \
				       phba->params.defpdu_hdr_sz);
	num_async_pdu_buf_sgl_pages =
			PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \
				       sizeof(struct phys_addr));
	num_async_pdu_data_pages =
			PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \
				       phba->params.defpdu_data_sz);
	num_async_pdu_data_sgl_pages =
			PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \
				       sizeof(struct phys_addr));

	phba->params.hwi_ws_sz = sizeof(struct hwi_controller);

	phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
						 BE_ISCSI_PDU_HEADER_SIZE;
	phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
					    sizeof(struct hwi_context_memory);


	phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
	    * (phba->params.wrbs_per_cxn)
	    * phba->params.cxns_per_ctrl;
	wrb_sz_per_cxn =  sizeof(struct wrb_handle) *
				 (phba->params.wrbs_per_cxn);
	phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
				phba->params.cxns_per_ctrl);

	phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
		phba->params.icds_per_ctrl;
	phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
		phba->params.num_sge_per_io * phba->params.icds_per_ctrl;

	phba->mem_req[HWI_MEM_ASYNC_HEADER_BUF] =
		num_async_pdu_buf_pages * PAGE_SIZE;
	phba->mem_req[HWI_MEM_ASYNC_DATA_BUF] =
		num_async_pdu_data_pages * PAGE_SIZE;
	phba->mem_req[HWI_MEM_ASYNC_HEADER_RING] =
		num_async_pdu_buf_sgl_pages * PAGE_SIZE;
	phba->mem_req[HWI_MEM_ASYNC_DATA_RING] =
		num_async_pdu_data_sgl_pages * PAGE_SIZE;
	phba->mem_req[HWI_MEM_ASYNC_HEADER_HANDLE] =
		phba->params.asyncpdus_per_ctrl *
		sizeof(struct async_pdu_handle);
	phba->mem_req[HWI_MEM_ASYNC_DATA_HANDLE] =
		phba->params.asyncpdus_per_ctrl *
		sizeof(struct async_pdu_handle);
	phba->mem_req[HWI_MEM_ASYNC_PDU_CONTEXT] =
		sizeof(struct hwi_async_pdu_context) +
		(phba->params.cxns_per_ctrl * sizeof(struct hwi_async_entry));
}

static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
{
	struct be_mem_descriptor *mem_descr;
	dma_addr_t bus_add;
	struct mem_array *mem_arr, *mem_arr_orig;
	unsigned int i, j, alloc_size, curr_alloc_size;

2206
	phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256 2257 2258 2259 2260 2261 2262 2263 2264 2265 2266 2267 2268 2269 2270 2271 2272 2273 2274 2275 2276 2277 2278
	if (!phba->phwi_ctrlr)
		return -ENOMEM;

	phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
				 GFP_KERNEL);
	if (!phba->init_mem) {
		kfree(phba->phwi_ctrlr);
		return -ENOMEM;
	}

	mem_arr_orig = kmalloc(sizeof(*mem_arr_orig) * BEISCSI_MAX_FRAGS_INIT,
			       GFP_KERNEL);
	if (!mem_arr_orig) {
		kfree(phba->init_mem);
		kfree(phba->phwi_ctrlr);
		return -ENOMEM;
	}

	mem_descr = phba->init_mem;
	for (i = 0; i < SE_MEM_MAX; i++) {
		j = 0;
		mem_arr = mem_arr_orig;
		alloc_size = phba->mem_req[i];
		memset(mem_arr, 0, sizeof(struct mem_array) *
		       BEISCSI_MAX_FRAGS_INIT);
		curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
		do {
			mem_arr->virtual_address = pci_alloc_consistent(
							phba->pcidev,
							curr_alloc_size,
							&bus_add);
			if (!mem_arr->virtual_address) {
				if (curr_alloc_size <= BE_MIN_MEM_SIZE)
					goto free_mem;
				if (curr_alloc_size -
					rounddown_pow_of_two(curr_alloc_size))
					curr_alloc_size = rounddown_pow_of_two
							     (curr_alloc_size);
				else
					curr_alloc_size = curr_alloc_size / 2;
			} else {
				mem_arr->bus_address.u.
				    a64.address = (__u64) bus_add;
				mem_arr->size = curr_alloc_size;
				alloc_size -= curr_alloc_size;
				curr_alloc_size = min(be_max_phys_size *
						      1024, alloc_size);
				j++;
				mem_arr++;
			}
		} while (alloc_size);
		mem_descr->num_elements = j;
		mem_descr->size_in_bytes = phba->mem_req[i];
		mem_descr->mem_array = kmalloc(sizeof(*mem_arr) * j,
					       GFP_KERNEL);
		if (!mem_descr->mem_array)
			goto free_mem;

		memcpy(mem_descr->mem_array, mem_arr_orig,
		       sizeof(struct mem_array) * j);
		mem_descr++;
	}
	kfree(mem_arr_orig);
	return 0;
free_mem:
	mem_descr->num_elements = j;
	while ((i) || (j)) {
		for (j = mem_descr->num_elements; j > 0; j--) {
			pci_free_consistent(phba->pcidev,
					    mem_descr->mem_array[j - 1].size,
					    mem_descr->mem_array[j - 1].
					    virtual_address,
2279 2280
					    (unsigned long)mem_descr->
					    mem_array[j - 1].
2281 2282 2283 2284 2285 2286 2287 2288 2289 2290 2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325
					    bus_address.u.a64.address);
		}
		if (i) {
			i--;
			kfree(mem_descr->mem_array);
			mem_descr--;
		}
	}
	kfree(mem_arr_orig);
	kfree(phba->init_mem);
	kfree(phba->phwi_ctrlr);
	return -ENOMEM;
}

static int beiscsi_get_memory(struct beiscsi_hba *phba)
{
	beiscsi_find_mem_req(phba);
	return beiscsi_alloc_mem(phba);
}

static void iscsi_init_global_templates(struct beiscsi_hba *phba)
{
	struct pdu_data_out *pdata_out;
	struct pdu_nop_out *pnop_out;
	struct be_mem_descriptor *mem_descr;

	mem_descr = phba->init_mem;
	mem_descr += ISCSI_MEM_GLOBAL_HEADER;
	pdata_out =
	    (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
	memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);

	AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
		      IIOC_SCSI_DATA);

	pnop_out =
	    (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
				   virtual_address + BE_ISCSI_PDU_HEADER_SIZE);

	memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
	AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
	AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
	AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
}

2326
static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
2327 2328
{
	struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
2329
	struct wrb_handle *pwrb_handle = NULL;
2330 2331
	struct hwi_controller *phwi_ctrlr;
	struct hwi_wrb_context *pwrb_context;
2332 2333 2334
	struct iscsi_wrb *pwrb = NULL;
	unsigned int num_cxn_wrbh = 0;
	unsigned int num_cxn_wrb = 0, j, idx = 0, index;
2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346 2347

	mem_descr_wrbh = phba->init_mem;
	mem_descr_wrbh += HWI_MEM_WRBH;

	mem_descr_wrb = phba->init_mem;
	mem_descr_wrb += HWI_MEM_WRB;
	phwi_ctrlr = phba->phwi_ctrlr;

	for (index = 0; index < phba->params.cxns_per_ctrl * 2; index += 2) {
		pwrb_context = &phwi_ctrlr->wrb_context[index];
		pwrb_context->pwrb_handle_base =
				kzalloc(sizeof(struct wrb_handle *) *
					phba->params.wrbs_per_cxn, GFP_KERNEL);
2348 2349 2350 2351 2352
		if (!pwrb_context->pwrb_handle_base) {
			shost_printk(KERN_ERR, phba->shost,
					"Mem Alloc Failed. Failing to load\n");
			goto init_wrb_hndl_failed;
		}
2353 2354 2355
		pwrb_context->pwrb_handle_basestd =
				kzalloc(sizeof(struct wrb_handle *) *
					phba->params.wrbs_per_cxn, GFP_KERNEL);
2356 2357 2358 2359 2360 2361 2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372
		if (!pwrb_context->pwrb_handle_basestd) {
			shost_printk(KERN_ERR, phba->shost,
					"Mem Alloc Failed. Failing to load\n");
			goto init_wrb_hndl_failed;
		}
		if (!num_cxn_wrbh) {
			pwrb_handle =
				mem_descr_wrbh->mem_array[idx].virtual_address;
			num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
					((sizeof(struct wrb_handle)) *
					 phba->params.wrbs_per_cxn));
			idx++;
		}
		pwrb_context->alloc_index = 0;
		pwrb_context->wrb_handles_available = 0;
		pwrb_context->free_index = 0;

2373 2374 2375 2376 2377 2378
		if (num_cxn_wrbh) {
			for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
				pwrb_context->pwrb_handle_base[j] = pwrb_handle;
				pwrb_context->pwrb_handle_basestd[j] =
								pwrb_handle;
				pwrb_context->wrb_handles_available++;
2379
				pwrb_handle->wrb_index = j;
2380 2381 2382 2383 2384 2385
				pwrb_handle++;
			}
			num_cxn_wrbh--;
		}
	}
	idx = 0;
2386
	for (index = 0; index < phba->params.cxns_per_ctrl * 2; index += 2) {
2387
		pwrb_context = &phwi_ctrlr->wrb_context[index];
2388
		if (!num_cxn_wrb) {
2389
			pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
2390
			num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
2391 2392 2393 2394 2395 2396
				((sizeof(struct iscsi_wrb) *
				  phba->params.wrbs_per_cxn));
			idx++;
		}

		if (num_cxn_wrb) {
2397 2398 2399 2400 2401 2402 2403 2404
			for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
				pwrb_handle = pwrb_context->pwrb_handle_base[j];
				pwrb_handle->pwrb = pwrb;
				pwrb++;
			}
			num_cxn_wrb--;
		}
	}
2405 2406 2407 2408 2409 2410 2411 2412
	return 0;
init_wrb_hndl_failed:
	for (j = index; j > 0; j--) {
		pwrb_context = &phwi_ctrlr->wrb_context[j];
		kfree(pwrb_context->pwrb_handle_base);
		kfree(pwrb_context->pwrb_handle_basestd);
	}
	return -ENOMEM;
2413 2414 2415 2416 2417 2418 2419 2420
}

static void hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
{
	struct hwi_controller *phwi_ctrlr;
	struct hba_parameters *p = &phba->params;
	struct hwi_async_pdu_context *pasync_ctx;
	struct async_pdu_handle *pasync_header_h, *pasync_data_h;
2421
	unsigned int index, idx, num_per_mem, num_async_data;
2422 2423 2424 2425 2426 2427 2428 2429 2430 2431 2432
	struct be_mem_descriptor *mem_descr;

	mem_descr = (struct be_mem_descriptor *)phba->init_mem;
	mem_descr += HWI_MEM_ASYNC_PDU_CONTEXT;

	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_ctrlr->phwi_ctxt->pasync_ctx = (struct hwi_async_pdu_context *)
				mem_descr->mem_array[0].virtual_address;
	pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx;
	memset(pasync_ctx, 0, sizeof(*pasync_ctx));

2433 2434
	pasync_ctx->num_entries = p->asyncpdus_per_ctrl;
	pasync_ctx->buffer_size = p->defpdu_hdr_sz;
2435 2436 2437 2438 2439 2440

	mem_descr = (struct be_mem_descriptor *)phba->init_mem;
	mem_descr += HWI_MEM_ASYNC_HEADER_BUF;
	if (mem_descr->mem_array[0].virtual_address) {
		SE_DEBUG(DBG_LVL_8,
			 "hwi_init_async_pdu_ctx HWI_MEM_ASYNC_HEADER_BUF"
2441
			 "va=%p\n", mem_descr->mem_array[0].virtual_address);
2442 2443
	} else
		shost_printk(KERN_WARNING, phba->shost,
2444
			     "No Virtual address\n");
2445 2446 2447 2448 2449 2450 2451 2452 2453 2454 2455 2456

	pasync_ctx->async_header.va_base =
			mem_descr->mem_array[0].virtual_address;

	pasync_ctx->async_header.pa_base.u.a64.address =
			mem_descr->mem_array[0].bus_address.u.a64.address;

	mem_descr = (struct be_mem_descriptor *)phba->init_mem;
	mem_descr += HWI_MEM_ASYNC_HEADER_RING;
	if (mem_descr->mem_array[0].virtual_address) {
		SE_DEBUG(DBG_LVL_8,
			 "hwi_init_async_pdu_ctx HWI_MEM_ASYNC_HEADER_RING"
2457
			 "va=%p\n", mem_descr->mem_array[0].virtual_address);
2458 2459
	} else
		shost_printk(KERN_WARNING, phba->shost,
2460
			    "No Virtual address\n");
2461 2462 2463 2464 2465 2466 2467 2468
	pasync_ctx->async_header.ring_base =
			mem_descr->mem_array[0].virtual_address;

	mem_descr = (struct be_mem_descriptor *)phba->init_mem;
	mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE;
	if (mem_descr->mem_array[0].virtual_address) {
		SE_DEBUG(DBG_LVL_8,
			 "hwi_init_async_pdu_ctx HWI_MEM_ASYNC_HEADER_HANDLE"
2469
			 "va=%p\n", mem_descr->mem_array[0].virtual_address);
2470 2471
	} else
		shost_printk(KERN_WARNING, phba->shost,
2472
			    "No Virtual address\n");
2473 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484

	pasync_ctx->async_header.handle_base =
			mem_descr->mem_array[0].virtual_address;
	pasync_ctx->async_header.writables = 0;
	INIT_LIST_HEAD(&pasync_ctx->async_header.free_list);


	mem_descr = (struct be_mem_descriptor *)phba->init_mem;
	mem_descr += HWI_MEM_ASYNC_DATA_RING;
	if (mem_descr->mem_array[0].virtual_address) {
		SE_DEBUG(DBG_LVL_8,
			 "hwi_init_async_pdu_ctx HWI_MEM_ASYNC_DATA_RING"
2485
			 "va=%p\n", mem_descr->mem_array[0].virtual_address);
2486 2487
	} else
		shost_printk(KERN_WARNING, phba->shost,
2488
			     "No Virtual address\n");
2489 2490 2491 2492 2493 2494 2495 2496

	pasync_ctx->async_data.ring_base =
			mem_descr->mem_array[0].virtual_address;

	mem_descr = (struct be_mem_descriptor *)phba->init_mem;
	mem_descr += HWI_MEM_ASYNC_DATA_HANDLE;
	if (!mem_descr->mem_array[0].virtual_address)
		shost_printk(KERN_WARNING, phba->shost,
2497
			    "No Virtual address\n");
2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508

	pasync_ctx->async_data.handle_base =
			mem_descr->mem_array[0].virtual_address;
	pasync_ctx->async_data.writables = 0;
	INIT_LIST_HEAD(&pasync_ctx->async_data.free_list);

	pasync_header_h =
		(struct async_pdu_handle *)pasync_ctx->async_header.handle_base;
	pasync_data_h =
		(struct async_pdu_handle *)pasync_ctx->async_data.handle_base;

2509 2510 2511 2512 2513 2514 2515 2516 2517 2518 2519 2520 2521 2522 2523 2524 2525 2526 2527
	mem_descr = (struct be_mem_descriptor *)phba->init_mem;
	mem_descr += HWI_MEM_ASYNC_DATA_BUF;
	if (mem_descr->mem_array[0].virtual_address) {
		SE_DEBUG(DBG_LVL_8,
			 "hwi_init_async_pdu_ctx HWI_MEM_ASYNC_DATA_BUF"
			 "va=%p\n", mem_descr->mem_array[0].virtual_address);
	} else
		shost_printk(KERN_WARNING, phba->shost,
			    "No Virtual address\n");
	idx = 0;
	pasync_ctx->async_data.va_base =
			mem_descr->mem_array[idx].virtual_address;
	pasync_ctx->async_data.pa_base.u.a64.address =
			mem_descr->mem_array[idx].bus_address.u.a64.address;

	num_async_data = ((mem_descr->mem_array[idx].size) /
				phba->params.defpdu_data_sz);
	num_per_mem = 0;

2528 2529 2530 2531 2532 2533 2534 2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 2552
	for (index = 0; index < p->asyncpdus_per_ctrl; index++) {
		pasync_header_h->cri = -1;
		pasync_header_h->index = (char)index;
		INIT_LIST_HEAD(&pasync_header_h->link);
		pasync_header_h->pbuffer =
			(void *)((unsigned long)
			(pasync_ctx->async_header.va_base) +
			(p->defpdu_hdr_sz * index));

		pasync_header_h->pa.u.a64.address =
			pasync_ctx->async_header.pa_base.u.a64.address +
			(p->defpdu_hdr_sz * index);

		list_add_tail(&pasync_header_h->link,
				&pasync_ctx->async_header.free_list);
		pasync_header_h++;
		pasync_ctx->async_header.free_entries++;
		pasync_ctx->async_header.writables++;

		INIT_LIST_HEAD(&pasync_ctx->async_entry[index].wait_queue.list);
		INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
			       header_busy_list);
		pasync_data_h->cri = -1;
		pasync_data_h->index = (char)index;
		INIT_LIST_HEAD(&pasync_data_h->link);
2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565

		if (!num_async_data) {
			num_per_mem = 0;
			idx++;
			pasync_ctx->async_data.va_base =
				mem_descr->mem_array[idx].virtual_address;
			pasync_ctx->async_data.pa_base.u.a64.address =
				mem_descr->mem_array[idx].
				bus_address.u.a64.address;

			num_async_data = ((mem_descr->mem_array[idx].size) /
					phba->params.defpdu_data_sz);
		}
2566 2567 2568
		pasync_data_h->pbuffer =
			(void *)((unsigned long)
			(pasync_ctx->async_data.va_base) +
2569
			(p->defpdu_data_sz * num_per_mem));
2570 2571 2572

		pasync_data_h->pa.u.a64.address =
		    pasync_ctx->async_data.pa_base.u.a64.address +
2573 2574 2575
		    (p->defpdu_data_sz * num_per_mem);
		num_per_mem++;
		num_async_data--;
2576 2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602

		list_add_tail(&pasync_data_h->link,
			      &pasync_ctx->async_data.free_list);
		pasync_data_h++;
		pasync_ctx->async_data.free_entries++;
		pasync_ctx->async_data.writables++;

		INIT_LIST_HEAD(&pasync_ctx->async_entry[index].data_busy_list);
	}

	pasync_ctx->async_header.host_write_ptr = 0;
	pasync_ctx->async_header.ep_read_ptr = -1;
	pasync_ctx->async_data.host_write_ptr = 0;
	pasync_ctx->async_data.ep_read_ptr = -1;
}

static int
be_sgl_create_contiguous(void *virtual_address,
			 u64 physical_address, u32 length,
			 struct be_dma_mem *sgl)
{
	WARN_ON(!virtual_address);
	WARN_ON(!physical_address);
	WARN_ON(!length > 0);
	WARN_ON(!sgl);

	sgl->va = virtual_address;
2603
	sgl->dma = (unsigned long)physical_address;
2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617 2618 2619 2620 2621 2622 2623 2624 2625 2626 2627 2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648 2649 2650 2651 2652 2653
	sgl->size = length;

	return 0;
}

static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
{
	memset(sgl, 0, sizeof(*sgl));
}

static void
hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
		     struct mem_array *pmem, struct be_dma_mem *sgl)
{
	if (sgl->va)
		be_sgl_destroy_contiguous(sgl);

	be_sgl_create_contiguous(pmem->virtual_address,
				 pmem->bus_address.u.a64.address,
				 pmem->size, sgl);
}

static void
hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
			   struct mem_array *pmem, struct be_dma_mem *sgl)
{
	if (sgl->va)
		be_sgl_destroy_contiguous(sgl);

	be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
				 pmem->bus_address.u.a64.address,
				 pmem->size, sgl);
}

static int be_fill_queue(struct be_queue_info *q,
		u16 len, u16 entry_size, void *vaddress)
{
	struct be_dma_mem *mem = &q->dma_mem;

	memset(q, 0, sizeof(*q));
	q->len = len;
	q->entry_size = entry_size;
	mem->size = len * entry_size;
	mem->va = vaddress;
	if (!mem->va)
		return -ENOMEM;
	memset(mem->va, 0, mem->size);
	return 0;
}

2654
static int beiscsi_create_eqs(struct beiscsi_hba *phba,
2655 2656
			     struct hwi_context_memory *phwi_context)
{
2657 2658
	unsigned int i, num_eq_pages;
	int ret, eq_for_mcc;
2659 2660 2661
	struct be_queue_info *eq;
	struct be_dma_mem *mem;
	void *eq_vaddress;
2662
	dma_addr_t paddr;
2663

2664 2665
	num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
				      sizeof(struct be_eq_entry));
2666

2667 2668 2669 2670 2671 2672 2673 2674 2675 2676 2677 2678 2679 2680 2681 2682 2683 2684 2685
	if (phba->msix_enabled)
		eq_for_mcc = 1;
	else
		eq_for_mcc = 0;
	for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
		eq = &phwi_context->be_eq[i].q;
		mem = &eq->dma_mem;
		phwi_context->be_eq[i].phba = phba;
		eq_vaddress = pci_alloc_consistent(phba->pcidev,
						     num_eq_pages * PAGE_SIZE,
						     &paddr);
		if (!eq_vaddress)
			goto create_eq_error;

		mem->va = eq_vaddress;
		ret = be_fill_queue(eq, phba->params.num_eq_entries,
				    sizeof(struct be_eq_entry), eq_vaddress);
		if (ret) {
			shost_printk(KERN_ERR, phba->shost,
2686
				     "be_fill_queue Failed for EQ\n");
2687 2688
			goto create_eq_error;
		}
2689

2690 2691 2692 2693 2694 2695
		mem->dma = paddr;
		ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
					    phwi_context->cur_eqd);
		if (ret) {
			shost_printk(KERN_ERR, phba->shost,
				     "beiscsi_cmd_eq_create"
2696
				     "Failedfor EQ\n");
2697 2698 2699
			goto create_eq_error;
		}
		SE_DEBUG(DBG_LVL_8, "eqid = %d\n", phwi_context->be_eq[i].q.id);
2700 2701
	}
	return 0;
2702 2703 2704 2705 2706 2707 2708 2709 2710 2711
create_eq_error:
	for (i = 0; i < (phba->num_cpus + 1); i++) {
		eq = &phwi_context->be_eq[i].q;
		mem = &eq->dma_mem;
		if (mem->va)
			pci_free_consistent(phba->pcidev, num_eq_pages
					    * PAGE_SIZE,
					    mem->va, mem->dma);
	}
	return ret;
2712 2713
}

2714
static int beiscsi_create_cqs(struct beiscsi_hba *phba,
2715 2716
			     struct hwi_context_memory *phwi_context)
{
2717
	unsigned int i, num_cq_pages;
2718 2719 2720
	int ret;
	struct be_queue_info *cq, *eq;
	struct be_dma_mem *mem;
2721
	struct be_eq_obj *pbe_eq;
2722
	void *cq_vaddress;
2723
	dma_addr_t paddr;
2724

2725 2726
	num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
				      sizeof(struct sol_cqe));
2727

2728 2729 2730 2731 2732 2733 2734 2735 2736 2737 2738 2739
	for (i = 0; i < phba->num_cpus; i++) {
		cq = &phwi_context->be_cq[i];
		eq = &phwi_context->be_eq[i].q;
		pbe_eq = &phwi_context->be_eq[i];
		pbe_eq->cq = cq;
		pbe_eq->phba = phba;
		mem = &cq->dma_mem;
		cq_vaddress = pci_alloc_consistent(phba->pcidev,
						     num_cq_pages * PAGE_SIZE,
						     &paddr);
		if (!cq_vaddress)
			goto create_cq_error;
2740
		ret = be_fill_queue(cq, phba->params.num_cq_entries,
2741 2742 2743
				    sizeof(struct sol_cqe), cq_vaddress);
		if (ret) {
			shost_printk(KERN_ERR, phba->shost,
2744
				     "be_fill_queue Failed for ISCSI CQ\n");
2745 2746 2747 2748 2749 2750 2751 2752 2753
			goto create_cq_error;
		}

		mem->dma = paddr;
		ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
					    false, 0);
		if (ret) {
			shost_printk(KERN_ERR, phba->shost,
				     "beiscsi_cmd_eq_create"
2754
				     "Failed for ISCSI CQ\n");
2755 2756 2757 2758 2759
			goto create_cq_error;
		}
		SE_DEBUG(DBG_LVL_8, "iscsi cq_id is %d for eq_id %d\n",
						 cq->id, eq->id);
		SE_DEBUG(DBG_LVL_8, "ISCSI CQ CREATED\n");
2760 2761
	}
	return 0;
2762 2763 2764 2765 2766 2767 2768 2769 2770 2771 2772 2773

create_cq_error:
	for (i = 0; i < phba->num_cpus; i++) {
		cq = &phwi_context->be_cq[i];
		mem = &cq->dma_mem;
		if (mem->va)
			pci_free_consistent(phba->pcidev, num_cq_pages
					    * PAGE_SIZE,
					    mem->va, mem->dma);
	}
	return ret;

2774 2775 2776 2777 2778 2779 2780 2781 2782 2783 2784 2785 2786 2787 2788 2789 2790
}

static int
beiscsi_create_def_hdr(struct beiscsi_hba *phba,
		       struct hwi_context_memory *phwi_context,
		       struct hwi_controller *phwi_ctrlr,
		       unsigned int def_pdu_ring_sz)
{
	unsigned int idx;
	int ret;
	struct be_queue_info *dq, *cq;
	struct be_dma_mem *mem;
	struct be_mem_descriptor *mem_descr;
	void *dq_vaddress;

	idx = 0;
	dq = &phwi_context->be_def_hdrq;
2791
	cq = &phwi_context->be_cq[0];
2792 2793 2794 2795 2796 2797 2798 2799 2800 2801 2802 2803
	mem = &dq->dma_mem;
	mem_descr = phba->init_mem;
	mem_descr += HWI_MEM_ASYNC_HEADER_RING;
	dq_vaddress = mem_descr->mem_array[idx].virtual_address;
	ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
			    sizeof(struct phys_addr),
			    sizeof(struct phys_addr), dq_vaddress);
	if (ret) {
		shost_printk(KERN_ERR, phba->shost,
			     "be_fill_queue Failed for DEF PDU HDR\n");
		return ret;
	}
2804 2805
	mem->dma = (unsigned long)mem_descr->mem_array[idx].
				  bus_address.u.a64.address;
2806 2807 2808 2809 2810 2811 2812 2813 2814 2815 2816 2817 2818 2819 2820 2821 2822 2823 2824 2825 2826 2827 2828 2829 2830 2831 2832 2833 2834 2835
	ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
					      def_pdu_ring_sz,
					      phba->params.defpdu_hdr_sz);
	if (ret) {
		shost_printk(KERN_ERR, phba->shost,
			     "be_cmd_create_default_pdu_queue Failed DEFHDR\n");
		return ret;
	}
	phwi_ctrlr->default_pdu_hdr.id = phwi_context->be_def_hdrq.id;
	SE_DEBUG(DBG_LVL_8, "iscsi def pdu id is %d\n",
		 phwi_context->be_def_hdrq.id);
	hwi_post_async_buffers(phba, 1);
	return 0;
}

static int
beiscsi_create_def_data(struct beiscsi_hba *phba,
			struct hwi_context_memory *phwi_context,
			struct hwi_controller *phwi_ctrlr,
			unsigned int def_pdu_ring_sz)
{
	unsigned int idx;
	int ret;
	struct be_queue_info *dataq, *cq;
	struct be_dma_mem *mem;
	struct be_mem_descriptor *mem_descr;
	void *dq_vaddress;

	idx = 0;
	dataq = &phwi_context->be_def_dataq;
2836
	cq = &phwi_context->be_cq[0];
2837 2838 2839 2840 2841 2842 2843 2844 2845 2846 2847 2848
	mem = &dataq->dma_mem;
	mem_descr = phba->init_mem;
	mem_descr += HWI_MEM_ASYNC_DATA_RING;
	dq_vaddress = mem_descr->mem_array[idx].virtual_address;
	ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
			    sizeof(struct phys_addr),
			    sizeof(struct phys_addr), dq_vaddress);
	if (ret) {
		shost_printk(KERN_ERR, phba->shost,
			     "be_fill_queue Failed for DEF PDU DATA\n");
		return ret;
	}
2849 2850
	mem->dma = (unsigned long)mem_descr->mem_array[idx].
				  bus_address.u.a64.address;
2851 2852 2853 2854 2855 2856 2857 2858 2859 2860 2861 2862 2863
	ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
					      def_pdu_ring_sz,
					      phba->params.defpdu_data_sz);
	if (ret) {
		shost_printk(KERN_ERR, phba->shost,
			     "be_cmd_create_default_pdu_queue Failed"
			     " for DEF PDU DATA\n");
		return ret;
	}
	phwi_ctrlr->default_pdu_data.id = phwi_context->be_def_dataq.id;
	SE_DEBUG(DBG_LVL_8, "iscsi def data id is %d\n",
		 phwi_context->be_def_dataq.id);
	hwi_post_async_buffers(phba, 0);
2864
	SE_DEBUG(DBG_LVL_8, "DEFAULT PDU DATA RING CREATED\n");
2865 2866 2867 2868 2869 2870 2871 2872 2873 2874 2875 2876 2877 2878 2879 2880 2881 2882 2883 2884 2885 2886 2887 2888 2889 2890 2891 2892 2893 2894 2895
	return 0;
}

static int
beiscsi_post_pages(struct beiscsi_hba *phba)
{
	struct be_mem_descriptor *mem_descr;
	struct mem_array *pm_arr;
	unsigned int page_offset, i;
	struct be_dma_mem sgl;
	int status;

	mem_descr = phba->init_mem;
	mem_descr += HWI_MEM_SGE;
	pm_arr = mem_descr->mem_array;

	page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
			phba->fw_config.iscsi_icd_start) / PAGE_SIZE;
	for (i = 0; i < mem_descr->num_elements; i++) {
		hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
		status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
						page_offset,
						(pm_arr->size / PAGE_SIZE));
		page_offset += pm_arr->size / PAGE_SIZE;
		if (status != 0) {
			shost_printk(KERN_ERR, phba->shost,
				     "post sgl failed.\n");
			return status;
		}
		pm_arr++;
	}
2896
	SE_DEBUG(DBG_LVL_8, "POSTED PAGES\n");
2897 2898 2899
	return 0;
}

2900 2901 2902
static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
{
	struct be_dma_mem *mem = &q->dma_mem;
2903
	if (mem->va) {
2904 2905
		pci_free_consistent(phba->pcidev, mem->size,
			mem->va, mem->dma);
2906 2907
		mem->va = NULL;
	}
2908 2909 2910 2911 2912 2913 2914 2915 2916 2917 2918 2919 2920
}

static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
		u16 len, u16 entry_size)
{
	struct be_dma_mem *mem = &q->dma_mem;

	memset(q, 0, sizeof(*q));
	q->len = len;
	q->entry_size = entry_size;
	mem->size = len * entry_size;
	mem->va = pci_alloc_consistent(phba->pcidev, mem->size, &mem->dma);
	if (!mem->va)
2921
		return -ENOMEM;
2922 2923 2924 2925
	memset(mem->va, 0, mem->size);
	return 0;
}

2926 2927 2928 2929 2930 2931 2932 2933 2934 2935 2936 2937 2938 2939 2940 2941 2942 2943 2944 2945 2946 2947 2948 2949 2950 2951 2952 2953 2954 2955 2956 2957 2958 2959 2960 2961 2962 2963 2964 2965 2966 2967 2968 2969 2970 2971 2972 2973 2974 2975 2976 2977 2978 2979 2980 2981 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991 2992
static int
beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
			 struct hwi_context_memory *phwi_context,
			 struct hwi_controller *phwi_ctrlr)
{
	unsigned int wrb_mem_index, offset, size, num_wrb_rings;
	u64 pa_addr_lo;
	unsigned int idx, num, i;
	struct mem_array *pwrb_arr;
	void *wrb_vaddr;
	struct be_dma_mem sgl;
	struct be_mem_descriptor *mem_descr;
	int status;

	idx = 0;
	mem_descr = phba->init_mem;
	mem_descr += HWI_MEM_WRB;
	pwrb_arr = kmalloc(sizeof(*pwrb_arr) * phba->params.cxns_per_ctrl,
			   GFP_KERNEL);
	if (!pwrb_arr) {
		shost_printk(KERN_ERR, phba->shost,
			     "Memory alloc failed in create wrb ring.\n");
		return -ENOMEM;
	}
	wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
	pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
	num_wrb_rings = mem_descr->mem_array[idx].size /
		(phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));

	for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
		if (num_wrb_rings) {
			pwrb_arr[num].virtual_address = wrb_vaddr;
			pwrb_arr[num].bus_address.u.a64.address	= pa_addr_lo;
			pwrb_arr[num].size = phba->params.wrbs_per_cxn *
					    sizeof(struct iscsi_wrb);
			wrb_vaddr += pwrb_arr[num].size;
			pa_addr_lo += pwrb_arr[num].size;
			num_wrb_rings--;
		} else {
			idx++;
			wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
			pa_addr_lo = mem_descr->mem_array[idx].\
					bus_address.u.a64.address;
			num_wrb_rings = mem_descr->mem_array[idx].size /
					(phba->params.wrbs_per_cxn *
					sizeof(struct iscsi_wrb));
			pwrb_arr[num].virtual_address = wrb_vaddr;
			pwrb_arr[num].bus_address.u.a64.address\
						= pa_addr_lo;
			pwrb_arr[num].size = phba->params.wrbs_per_cxn *
						 sizeof(struct iscsi_wrb);
			wrb_vaddr += pwrb_arr[num].size;
			pa_addr_lo   += pwrb_arr[num].size;
			num_wrb_rings--;
		}
	}
	for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
		wrb_mem_index = 0;
		offset = 0;
		size = 0;

		hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
		status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
					    &phwi_context->be_wrbq[i]);
		if (status != 0) {
			shost_printk(KERN_ERR, phba->shost,
				     "wrbq create failed.");
2993
			kfree(pwrb_arr);
2994 2995
			return status;
		}
2996 2997
		phwi_ctrlr->wrb_context[i * 2].cid = phwi_context->be_wrbq[i].
								   id;
2998 2999 3000 3001 3002 3003 3004 3005 3006 3007 3008 3009 3010 3011 3012 3013 3014 3015 3016
	}
	kfree(pwrb_arr);
	return 0;
}

static void free_wrb_handles(struct beiscsi_hba *phba)
{
	unsigned int index;
	struct hwi_controller *phwi_ctrlr;
	struct hwi_wrb_context *pwrb_context;

	phwi_ctrlr = phba->phwi_ctrlr;
	for (index = 0; index < phba->params.cxns_per_ctrl * 2; index += 2) {
		pwrb_context = &phwi_ctrlr->wrb_context[index];
		kfree(pwrb_context->pwrb_handle_base);
		kfree(pwrb_context->pwrb_handle_basestd);
	}
}

3017 3018 3019 3020 3021 3022 3023 3024 3025 3026 3027 3028 3029 3030 3031 3032
static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
{
	struct be_queue_info *q;
	struct be_ctrl_info *ctrl = &phba->ctrl;

	q = &phba->ctrl.mcc_obj.q;
	if (q->created)
		beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
	be_queue_free(phba, q);

	q = &phba->ctrl.mcc_obj.cq;
	if (q->created)
		beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
	be_queue_free(phba, q);
}

3033 3034 3035 3036 3037 3038
static void hwi_cleanup(struct beiscsi_hba *phba)
{
	struct be_queue_info *q;
	struct be_ctrl_info *ctrl = &phba->ctrl;
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
3039
	int i, eq_num;
3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059

	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
	for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
		q = &phwi_context->be_wrbq[i];
		if (q->created)
			beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
	}
	free_wrb_handles(phba);

	q = &phwi_context->be_def_hdrq;
	if (q->created)
		beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);

	q = &phwi_context->be_def_dataq;
	if (q->created)
		beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);

	beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);

3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072 3073 3074 3075
	for (i = 0; i < (phba->num_cpus); i++) {
		q = &phwi_context->be_cq[i];
		if (q->created)
			beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
	}
	if (phba->msix_enabled)
		eq_num = 1;
	else
		eq_num = 0;
	for (i = 0; i < (phba->num_cpus + eq_num); i++) {
		q = &phwi_context->be_eq[i].q;
		if (q->created)
			beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
	}
	be_mcc_queues_destroy(phba);
}
3076

3077 3078 3079 3080 3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096 3097 3098 3099 3100 3101 3102 3103 3104
static int be_mcc_queues_create(struct beiscsi_hba *phba,
				struct hwi_context_memory *phwi_context)
{
	struct be_queue_info *q, *cq;
	struct be_ctrl_info *ctrl = &phba->ctrl;

	/* Alloc MCC compl queue */
	cq = &phba->ctrl.mcc_obj.cq;
	if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
			sizeof(struct be_mcc_compl)))
		goto err;
	/* Ask BE to create MCC compl queue; */
	if (phba->msix_enabled) {
		if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq
					 [phba->num_cpus].q, false, true, 0))
		goto mcc_cq_free;
	} else {
		if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
					  false, true, 0))
		goto mcc_cq_free;
	}

	/* Alloc MCC queue */
	q = &phba->ctrl.mcc_obj.q;
	if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
		goto mcc_cq_destroy;

	/* Ask BE to create MCC queue */
3105
	if (beiscsi_cmd_mccq_create(phba, q, cq))
3106 3107 3108 3109 3110 3111 3112 3113 3114 3115 3116
		goto mcc_q_free;

	return 0;

mcc_q_free:
	be_queue_free(phba, q);
mcc_cq_destroy:
	beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
mcc_cq_free:
	be_queue_free(phba, cq);
err:
3117
	return -ENOMEM;
3118 3119 3120 3121 3122 3123 3124 3125 3126 3127
}

static int find_num_cpus(void)
{
	int  num_cpus = 0;

	num_cpus = num_online_cpus();
	if (num_cpus >= MAX_CPUS)
		num_cpus = MAX_CPUS - 1;

3128
	SE_DEBUG(DBG_LVL_8, "num_cpus = %d\n", num_cpus);
3129
	return num_cpus;
3130 3131 3132 3133 3134 3135 3136 3137 3138 3139 3140 3141 3142 3143
}

static int hwi_init_port(struct beiscsi_hba *phba)
{
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	unsigned int def_pdu_ring_sz;
	struct be_ctrl_info *ctrl = &phba->ctrl;
	int status;

	def_pdu_ring_sz =
		phba->params.asyncpdus_per_ctrl * sizeof(struct phys_addr);
	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
3144 3145 3146
	phwi_context->max_eqd = 0;
	phwi_context->min_eqd = 0;
	phwi_context->cur_eqd = 64;
3147
	be_cmd_fw_initialize(&phba->ctrl);
3148 3149

	status = beiscsi_create_eqs(phba, phwi_context);
3150
	if (status != 0) {
3151
		shost_printk(KERN_ERR, phba->shost, "EQ not created\n");
3152 3153 3154
		goto error;
	}

3155 3156 3157 3158 3159
	status = be_mcc_queues_create(phba, phwi_context);
	if (status != 0)
		goto error;

	status = mgmt_check_supported_fw(ctrl, phba);
3160 3161
	if (status != 0) {
		shost_printk(KERN_ERR, phba->shost,
3162
			     "Unsupported fw version\n");
3163 3164 3165
		goto error;
	}

3166
	status = beiscsi_create_cqs(phba, phwi_context);
3167 3168 3169 3170 3171 3172 3173 3174 3175 3176 3177 3178 3179 3180 3181 3182 3183 3184 3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195 3196 3197 3198 3199 3200 3201 3202 3203 3204 3205 3206
	if (status != 0) {
		shost_printk(KERN_ERR, phba->shost, "CQ not created\n");
		goto error;
	}

	status = beiscsi_create_def_hdr(phba, phwi_context, phwi_ctrlr,
					def_pdu_ring_sz);
	if (status != 0) {
		shost_printk(KERN_ERR, phba->shost,
			     "Default Header not created\n");
		goto error;
	}

	status = beiscsi_create_def_data(phba, phwi_context,
					 phwi_ctrlr, def_pdu_ring_sz);
	if (status != 0) {
		shost_printk(KERN_ERR, phba->shost,
			     "Default Data not created\n");
		goto error;
	}

	status = beiscsi_post_pages(phba);
	if (status != 0) {
		shost_printk(KERN_ERR, phba->shost, "Post SGL Pages Failed\n");
		goto error;
	}

	status = beiscsi_create_wrb_rings(phba,	phwi_context, phwi_ctrlr);
	if (status != 0) {
		shost_printk(KERN_ERR, phba->shost,
			     "WRB Rings not created\n");
		goto error;
	}

	SE_DEBUG(DBG_LVL_8, "hwi_init_port success\n");
	return 0;

error:
	shost_printk(KERN_ERR, phba->shost, "hwi_init_port failed");
	hwi_cleanup(phba);
3207
	return status;
3208 3209 3210 3211 3212 3213 3214 3215 3216 3217
}

static int hwi_init_controller(struct beiscsi_hba *phba)
{
	struct hwi_controller *phwi_ctrlr;

	phwi_ctrlr = phba->phwi_ctrlr;
	if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
		phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
		    init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
3218
		SE_DEBUG(DBG_LVL_8, " phwi_ctrlr->phwi_ctxt=%p\n",
3219 3220 3221 3222 3223 3224 3225 3226 3227
			 phwi_ctrlr->phwi_ctxt);
	} else {
		shost_printk(KERN_ERR, phba->shost,
			     "HWI_MEM_ADDN_CONTEXT is more than one element."
			     "Failing to load\n");
		return -ENOMEM;
	}

	iscsi_init_global_templates(phba);
3228 3229 3230
	if (beiscsi_init_wrb_handle(phba))
		return -ENOMEM;

3231 3232 3233 3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245 3246 3247 3248 3249 3250 3251 3252
	hwi_init_async_pdu_ctx(phba);
	if (hwi_init_port(phba) != 0) {
		shost_printk(KERN_ERR, phba->shost,
			     "hwi_init_controller failed\n");
		return -ENOMEM;
	}
	return 0;
}

static void beiscsi_free_mem(struct beiscsi_hba *phba)
{
	struct be_mem_descriptor *mem_descr;
	int i, j;

	mem_descr = phba->init_mem;
	i = 0;
	j = 0;
	for (i = 0; i < SE_MEM_MAX; i++) {
		for (j = mem_descr->num_elements; j > 0; j--) {
			pci_free_consistent(phba->pcidev,
			  mem_descr->mem_array[j - 1].size,
			  mem_descr->mem_array[j - 1].virtual_address,
3253 3254
			  (unsigned long)mem_descr->mem_array[j - 1].
			  bus_address.u.a64.address);
3255 3256 3257 3258 3259 3260 3261 3262 3263 3264 3265 3266 3267 3268 3269
		}
		kfree(mem_descr->mem_array);
		mem_descr++;
	}
	kfree(phba->init_mem);
	kfree(phba->phwi_ctrlr);
}

static int beiscsi_init_controller(struct beiscsi_hba *phba)
{
	int ret = -ENOMEM;

	ret = beiscsi_get_memory(phba);
	if (ret < 0) {
		shost_printk(KERN_ERR, phba->shost, "beiscsi_dev_probe -"
3270
			     "Failed in beiscsi_alloc_memory\n");
3271 3272 3273 3274 3275 3276 3277 3278 3279 3280 3281
		return ret;
	}

	ret = hwi_init_controller(phba);
	if (ret)
		goto free_init;
	SE_DEBUG(DBG_LVL_8, "Return success from beiscsi_init_controller");
	return 0;

free_init:
	beiscsi_free_mem(phba);
3282
	return ret;
3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293
}

static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
{
	struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
	struct sgl_handle *psgl_handle;
	struct iscsi_sge *pfrag;
	unsigned int arr_index, i, idx;

	phba->io_sgl_hndl_avbl = 0;
	phba->eh_sgl_hndl_avbl = 0;
3294

3295 3296 3297 3298 3299 3300 3301 3302 3303 3304 3305 3306 3307 3308 3309 3310 3311 3312 3313 3314 3315 3316 3317 3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338 3339 3340 3341 3342 3343 3344 3345 3346
	mem_descr_sglh = phba->init_mem;
	mem_descr_sglh += HWI_MEM_SGLH;
	if (1 == mem_descr_sglh->num_elements) {
		phba->io_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
						 phba->params.ios_per_ctrl,
						 GFP_KERNEL);
		if (!phba->io_sgl_hndl_base) {
			shost_printk(KERN_ERR, phba->shost,
				     "Mem Alloc Failed. Failing to load\n");
			return -ENOMEM;
		}
		phba->eh_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
						 (phba->params.icds_per_ctrl -
						 phba->params.ios_per_ctrl),
						 GFP_KERNEL);
		if (!phba->eh_sgl_hndl_base) {
			kfree(phba->io_sgl_hndl_base);
			shost_printk(KERN_ERR, phba->shost,
				     "Mem Alloc Failed. Failing to load\n");
			return -ENOMEM;
		}
	} else {
		shost_printk(KERN_ERR, phba->shost,
			     "HWI_MEM_SGLH is more than one element."
			     "Failing to load\n");
		return -ENOMEM;
	}

	arr_index = 0;
	idx = 0;
	while (idx < mem_descr_sglh->num_elements) {
		psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;

		for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
		      sizeof(struct sgl_handle)); i++) {
			if (arr_index < phba->params.ios_per_ctrl) {
				phba->io_sgl_hndl_base[arr_index] = psgl_handle;
				phba->io_sgl_hndl_avbl++;
				arr_index++;
			} else {
				phba->eh_sgl_hndl_base[arr_index -
					phba->params.ios_per_ctrl] =
								psgl_handle;
				arr_index++;
				phba->eh_sgl_hndl_avbl++;
			}
			psgl_handle++;
		}
		idx++;
	}
	SE_DEBUG(DBG_LVL_8,
		 "phba->io_sgl_hndl_avbl=%d"
3347
		 "phba->eh_sgl_hndl_avbl=%d\n",
3348 3349 3350 3351
		 phba->io_sgl_hndl_avbl,
		 phba->eh_sgl_hndl_avbl);
	mem_descr_sg = phba->init_mem;
	mem_descr_sg += HWI_MEM_SGE;
3352
	SE_DEBUG(DBG_LVL_8, "\n mem_descr_sg->num_elements=%d\n",
3353 3354 3355 3356 3357 3358 3359 3360 3361 3362 3363 3364 3365 3366 3367 3368 3369 3370 3371 3372
		 mem_descr_sg->num_elements);
	arr_index = 0;
	idx = 0;
	while (idx < mem_descr_sg->num_elements) {
		pfrag = mem_descr_sg->mem_array[idx].virtual_address;

		for (i = 0;
		     i < (mem_descr_sg->mem_array[idx].size) /
		     (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
		     i++) {
			if (arr_index < phba->params.ios_per_ctrl)
				psgl_handle = phba->io_sgl_hndl_base[arr_index];
			else
				psgl_handle = phba->eh_sgl_hndl_base[arr_index -
						phba->params.ios_per_ctrl];
			psgl_handle->pfrag = pfrag;
			AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
			AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
			pfrag += phba->params.num_sge_per_io;
			psgl_handle->sgl_index =
3373
				phba->fw_config.iscsi_icd_start + arr_index++;
3374 3375 3376 3377 3378 3379 3380 3381 3382 3383 3384 3385 3386 3387
		}
		idx++;
	}
	phba->io_sgl_free_index = 0;
	phba->io_sgl_alloc_index = 0;
	phba->eh_sgl_free_index = 0;
	phba->eh_sgl_alloc_index = 0;
	return 0;
}

static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
{
	int i, new_cid;

3388
	phba->cid_array = kzalloc(sizeof(void *) * phba->params.cxns_per_ctrl,
3389 3390 3391 3392 3393 3394 3395
				  GFP_KERNEL);
	if (!phba->cid_array) {
		shost_printk(KERN_ERR, phba->shost,
			     "Failed to allocate memory in "
			     "hba_setup_cid_tbls\n");
		return -ENOMEM;
	}
3396
	phba->ep_array = kzalloc(sizeof(struct iscsi_endpoint *) *
3397 3398 3399 3400
				 phba->params.cxns_per_ctrl * 2, GFP_KERNEL);
	if (!phba->ep_array) {
		shost_printk(KERN_ERR, phba->shost,
			     "Failed to allocate memory in "
3401
			     "hba_setup_cid_tbls\n");
3402 3403 3404
		kfree(phba->cid_array);
		return -ENOMEM;
	}
3405
	new_cid = phba->fw_config.iscsi_cid_start;
3406 3407 3408 3409 3410 3411 3412 3413
	for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
		phba->cid_array[i] = new_cid;
		new_cid += 2;
	}
	phba->avlbl_cids = phba->params.cxns_per_ctrl;
	return 0;
}

3414
static void hwi_enable_intr(struct beiscsi_hba *phba)
3415 3416 3417 3418 3419 3420
{
	struct be_ctrl_info *ctrl = &phba->ctrl;
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	struct be_queue_info *eq;
	u8 __iomem *addr;
3421
	u32 reg, i;
3422 3423 3424 3425 3426 3427 3428 3429 3430 3431 3432 3433
	u32 enabled;

	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;

	addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
			PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
	reg = ioread32(addr);

	enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
	if (!enabled) {
		reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
3434
		SE_DEBUG(DBG_LVL_8, "reg =x%08x addr=%p\n", reg, addr);
3435
		iowrite32(reg, addr);
3436 3437 3438 3439 3440 3441 3442 3443 3444
	}

	if (!phba->msix_enabled) {
		eq = &phwi_context->be_eq[0].q;
		SE_DEBUG(DBG_LVL_8, "eq->id=%d\n", eq->id);
		hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
	} else {
		for (i = 0; i <= phba->num_cpus; i++) {
			eq = &phwi_context->be_eq[i].q;
3445
			SE_DEBUG(DBG_LVL_8, "eq->id=%d\n", eq->id);
3446 3447
			hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
		}
3448
	}
3449 3450 3451 3452 3453 3454 3455 3456 3457 3458 3459 3460 3461 3462 3463
}

static void hwi_disable_intr(struct beiscsi_hba *phba)
{
	struct be_ctrl_info *ctrl = &phba->ctrl;

	u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
	u32 reg = ioread32(addr);

	u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
	if (enabled) {
		reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
		iowrite32(reg, addr);
	} else
		shost_printk(KERN_WARNING, phba->shost,
3464
			     "In hwi_disable_intr, Already Disabled\n");
3465 3466
}

3467 3468 3469 3470 3471 3472 3473 3474 3475
static int beiscsi_get_boot_info(struct beiscsi_hba *phba)
{
	struct be_cmd_resp_get_boot_target *boot_resp;
	struct be_cmd_resp_get_session *session_resp;
	struct be_mcc_wrb *wrb;
	struct be_dma_mem nonemb_cmd;
	unsigned int tag, wrb_num;
	unsigned short status, extd_status;
	struct be_queue_info *mccq = &phba->ctrl.mcc_obj.q;
3476
	int ret = -ENOMEM;
3477 3478 3479 3480 3481 3482 3483 3484 3485 3486 3487 3488 3489 3490 3491 3492 3493 3494 3495 3496 3497 3498 3499 3500

	tag = beiscsi_get_boot_target(phba);
	if (!tag) {
		SE_DEBUG(DBG_LVL_1, "be_cmd_get_mac_addr Failed\n");
		return -EAGAIN;
	} else
		wait_event_interruptible(phba->ctrl.mcc_wait[tag],
					 phba->ctrl.mcc_numtag[tag]);

	wrb_num = (phba->ctrl.mcc_numtag[tag] & 0x00FF0000) >> 16;
	extd_status = (phba->ctrl.mcc_numtag[tag] & 0x0000FF00) >> 8;
	status = phba->ctrl.mcc_numtag[tag] & 0x000000FF;
	if (status || extd_status) {
		SE_DEBUG(DBG_LVL_1, "be_cmd_get_mac_addr Failed"
				    " status = %d extd_status = %d\n",
				    status, extd_status);
		free_mcc_tag(&phba->ctrl, tag);
		return -EBUSY;
	}
	wrb = queue_get_wrb(mccq, wrb_num);
	free_mcc_tag(&phba->ctrl, tag);
	boot_resp = embedded_payload(wrb);

	if (boot_resp->boot_session_handle < 0) {
3501
		shost_printk(KERN_INFO, phba->shost, "No Boot Session.\n");
3502 3503 3504 3505 3506 3507 3508 3509 3510 3511 3512 3513 3514 3515 3516 3517 3518 3519 3520 3521 3522 3523 3524 3525 3526 3527 3528 3529 3530 3531 3532 3533 3534 3535 3536 3537 3538
		return -ENXIO;
	}

	nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
				sizeof(*session_resp),
				&nonemb_cmd.dma);
	if (nonemb_cmd.va == NULL) {
		SE_DEBUG(DBG_LVL_1,
			 "Failed to allocate memory for"
			 "beiscsi_get_session_info\n");
		return -ENOMEM;
	}

	memset(nonemb_cmd.va, 0, sizeof(*session_resp));
	tag = beiscsi_get_session_info(phba,
		boot_resp->boot_session_handle, &nonemb_cmd);
	if (!tag) {
		SE_DEBUG(DBG_LVL_1, "beiscsi_get_session_info"
			" Failed\n");
		goto boot_freemem;
	} else
		wait_event_interruptible(phba->ctrl.mcc_wait[tag],
					 phba->ctrl.mcc_numtag[tag]);

	wrb_num = (phba->ctrl.mcc_numtag[tag] & 0x00FF0000) >> 16;
	extd_status = (phba->ctrl.mcc_numtag[tag] & 0x0000FF00) >> 8;
	status = phba->ctrl.mcc_numtag[tag] & 0x000000FF;
	if (status || extd_status) {
		SE_DEBUG(DBG_LVL_1, "beiscsi_get_session_info Failed"
				    " status = %d extd_status = %d\n",
				    status, extd_status);
		free_mcc_tag(&phba->ctrl, tag);
		goto boot_freemem;
	}
	wrb = queue_get_wrb(mccq, wrb_num);
	free_mcc_tag(&phba->ctrl, tag);
	session_resp = nonemb_cmd.va ;
3539

3540 3541
	memcpy(&phba->boot_sess, &session_resp->session_info,
	       sizeof(struct mgmt_session_info));
3542 3543
	ret = 0;

3544 3545 3546
boot_freemem:
	pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
		    nonemb_cmd.va, nonemb_cmd.dma);
3547 3548 3549 3550 3551 3552 3553 3554 3555 3556 3557 3558 3559 3560 3561 3562 3563 3564 3565 3566 3567 3568 3569 3570 3571 3572 3573 3574 3575 3576 3577 3578 3579 3580 3581 3582 3583 3584 3585 3586 3587 3588 3589 3590 3591 3592 3593 3594 3595 3596 3597 3598 3599 3600 3601 3602
	return ret;
}

static void beiscsi_boot_release(void *data)
{
	struct beiscsi_hba *phba = data;

	scsi_host_put(phba->shost);
}

static int beiscsi_setup_boot_info(struct beiscsi_hba *phba)
{
	struct iscsi_boot_kobj *boot_kobj;

	/* get boot info using mgmt cmd */
	if (beiscsi_get_boot_info(phba))
		/* Try to see if we can carry on without this */
		return 0;

	phba->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
	if (!phba->boot_kset)
		return -ENOMEM;

	/* get a ref because the show function will ref the phba */
	if (!scsi_host_get(phba->shost))
		goto free_kset;
	boot_kobj = iscsi_boot_create_target(phba->boot_kset, 0, phba,
					     beiscsi_show_boot_tgt_info,
					     beiscsi_tgt_get_attr_visibility,
					     beiscsi_boot_release);
	if (!boot_kobj)
		goto put_shost;

	if (!scsi_host_get(phba->shost))
		goto free_kset;
	boot_kobj = iscsi_boot_create_initiator(phba->boot_kset, 0, phba,
						beiscsi_show_boot_ini_info,
						beiscsi_ini_get_attr_visibility,
						beiscsi_boot_release);
	if (!boot_kobj)
		goto put_shost;

	if (!scsi_host_get(phba->shost))
		goto free_kset;
	boot_kobj = iscsi_boot_create_ethernet(phba->boot_kset, 0, phba,
					       beiscsi_show_boot_eth_info,
					       beiscsi_eth_get_attr_visibility,
					       beiscsi_boot_release);
	if (!boot_kobj)
		goto put_shost;
	return 0;

put_shost:
	scsi_host_put(phba->shost);
free_kset:
	iscsi_boot_destroy_kset(phba->boot_kset);
3603 3604 3605
	return -ENOMEM;
}

3606 3607 3608 3609 3610 3611 3612 3613
static int beiscsi_init_port(struct beiscsi_hba *phba)
{
	int ret;

	ret = beiscsi_init_controller(phba);
	if (ret < 0) {
		shost_printk(KERN_ERR, phba->shost,
			     "beiscsi_dev_probe - Failed in"
3614
			     "beiscsi_init_controller\n");
3615 3616 3617 3618 3619 3620
		return ret;
	}
	ret = beiscsi_init_sgl_handle(phba);
	if (ret < 0) {
		shost_printk(KERN_ERR, phba->shost,
			     "beiscsi_dev_probe - Failed in"
3621
			     "beiscsi_init_sgl_handle\n");
3622 3623 3624 3625 3626 3627 3628 3629 3630 3631 3632 3633 3634 3635 3636 3637 3638 3639 3640 3641 3642 3643 3644 3645
		goto do_cleanup_ctrlr;
	}

	if (hba_setup_cid_tbls(phba)) {
		shost_printk(KERN_ERR, phba->shost,
			     "Failed in hba_setup_cid_tbls\n");
		kfree(phba->io_sgl_hndl_base);
		kfree(phba->eh_sgl_hndl_base);
		goto do_cleanup_ctrlr;
	}

	return ret;

do_cleanup_ctrlr:
	hwi_cleanup(phba);
	return ret;
}

static void hwi_purge_eq(struct beiscsi_hba *phba)
{
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	struct be_queue_info *eq;
	struct be_eq_entry *eqe = NULL;
3646
	int i, eq_msix;
3647
	unsigned int num_processed;
3648 3649 3650

	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
3651 3652 3653 3654
	if (phba->msix_enabled)
		eq_msix = 1;
	else
		eq_msix = 0;
3655

3656 3657
	for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
		eq = &phwi_context->be_eq[i].q;
3658
		eqe = queue_tail_node(eq);
3659
		num_processed = 0;
3660 3661 3662 3663 3664
		while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
					& EQE_VALID_MASK) {
			AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
			queue_tail_inc(eq);
			eqe = queue_tail_node(eq);
3665
			num_processed++;
3666
		}
3667 3668 3669

		if (num_processed)
			hwi_ring_eq_db(phba, eq->id, 1,	num_processed, 1, 1);
3670 3671 3672 3673 3674
	}
}

static void beiscsi_clean_port(struct beiscsi_hba *phba)
{
3675
	int mgmt_status;
3676 3677 3678 3679

	mgmt_status = mgmt_epfw_cleanup(phba, CMD_CONNECTION_CHUTE_0);
	if (mgmt_status)
		shost_printk(KERN_WARNING, phba->shost,
3680
			     "mgmt_epfw_cleanup FAILED\n");
3681

3682
	hwi_purge_eq(phba);
3683
	hwi_cleanup(phba);
3684 3685 3686 3687 3688 3689
	kfree(phba->io_sgl_hndl_base);
	kfree(phba->eh_sgl_hndl_base);
	kfree(phba->cid_array);
	kfree(phba->ep_array);
}

3690 3691 3692 3693 3694 3695 3696 3697 3698 3699 3700 3701 3702 3703 3704 3705 3706 3707 3708 3709 3710 3711 3712 3713 3714 3715 3716 3717 3718 3719 3720 3721 3722 3723 3724 3725 3726 3727 3728 3729 3730 3731 3732 3733 3734 3735 3736 3737 3738 3739 3740
static void beiscsi_cleanup_task(struct iscsi_task *task)
{
	struct beiscsi_io_task *io_task = task->dd_data;
	struct iscsi_conn *conn = task->conn;
	struct beiscsi_conn *beiscsi_conn = conn->dd_data;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
	struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
	struct hwi_wrb_context *pwrb_context;
	struct hwi_controller *phwi_ctrlr;

	phwi_ctrlr = phba->phwi_ctrlr;
	pwrb_context = &phwi_ctrlr->wrb_context[beiscsi_conn->beiscsi_conn_cid
			- phba->fw_config.iscsi_cid_start];

	if (io_task->cmd_bhs) {
		pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
			      io_task->bhs_pa.u.a64.address);
		io_task->cmd_bhs = NULL;
	}

	if (task->sc) {
		if (io_task->pwrb_handle) {
			free_wrb_handle(phba, pwrb_context,
					io_task->pwrb_handle);
			io_task->pwrb_handle = NULL;
		}

		if (io_task->psgl_handle) {
			spin_lock(&phba->io_sgl_lock);
			free_io_sgl_handle(phba, io_task->psgl_handle);
			spin_unlock(&phba->io_sgl_lock);
			io_task->psgl_handle = NULL;
		}
	} else {
		if (!beiscsi_conn->login_in_progress) {
			if (io_task->pwrb_handle) {
				free_wrb_handle(phba, pwrb_context,
						io_task->pwrb_handle);
				io_task->pwrb_handle = NULL;
			}
			if (io_task->psgl_handle) {
				spin_lock(&phba->mgmt_sgl_lock);
				free_mgmt_sgl_handle(phba,
						     io_task->psgl_handle);
				spin_unlock(&phba->mgmt_sgl_lock);
				io_task->psgl_handle = NULL;
			}
		}
	}
}

3741 3742 3743 3744 3745 3746 3747 3748
void
beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
			   struct beiscsi_offload_params *params)
{
	struct wrb_handle *pwrb_handle;
	struct iscsi_target_context_update_wrb *pwrb = NULL;
	struct be_mem_descriptor *mem_descr;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
3749 3750
	struct iscsi_task *task = beiscsi_conn->task;
	struct iscsi_session *session = task->conn->session;
3751 3752 3753 3754 3755 3756
	u32 doorbell = 0;

	/*
	 * We can always use 0 here because it is reserved by libiscsi for
	 * login/startup related tasks.
	 */
3757 3758 3759 3760 3761
	beiscsi_conn->login_in_progress = 0;
	spin_lock_bh(&session->lock);
	beiscsi_cleanup_task(task);
	spin_unlock_bh(&session->lock);

3762
	pwrb_handle = alloc_wrb_handle(phba, (beiscsi_conn->beiscsi_conn_cid -
3763
				       phba->fw_config.iscsi_cid_start));
3764 3765 3766 3767 3768 3769 3770 3771 3772 3773 3774 3775 3776 3777 3778 3779 3780 3781 3782 3783 3784 3785 3786 3787 3788 3789 3790 3791 3792 3793 3794 3795 3796 3797 3798 3799 3800 3801 3802 3803 3804 3805 3806 3807 3808 3809 3810 3811 3812 3813 3814 3815 3816 3817 3818 3819 3820 3821 3822 3823 3824 3825 3826
	pwrb = (struct iscsi_target_context_update_wrb *)pwrb_handle->pwrb;
	memset(pwrb, 0, sizeof(*pwrb));
	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
		      max_burst_length, pwrb, params->dw[offsetof
		      (struct amap_beiscsi_offload_params,
		      max_burst_length) / 32]);
	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
		      max_send_data_segment_length, pwrb,
		      params->dw[offsetof(struct amap_beiscsi_offload_params,
		      max_send_data_segment_length) / 32]);
	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
		      first_burst_length,
		      pwrb,
		      params->dw[offsetof(struct amap_beiscsi_offload_params,
		      first_burst_length) / 32]);

	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, erl, pwrb,
		      (params->dw[offsetof(struct amap_beiscsi_offload_params,
		      erl) / 32] & OFFLD_PARAMS_ERL));
	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, dde, pwrb,
		      (params->dw[offsetof(struct amap_beiscsi_offload_params,
		      dde) / 32] & OFFLD_PARAMS_DDE) >> 2);
	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, hde, pwrb,
		      (params->dw[offsetof(struct amap_beiscsi_offload_params,
		      hde) / 32] & OFFLD_PARAMS_HDE) >> 3);
	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, ir2t, pwrb,
		      (params->dw[offsetof(struct amap_beiscsi_offload_params,
		      ir2t) / 32] & OFFLD_PARAMS_IR2T) >> 4);
	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, imd, pwrb,
		      (params->dw[offsetof(struct amap_beiscsi_offload_params,
		       imd) / 32] & OFFLD_PARAMS_IMD) >> 5);
	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, stat_sn,
		      pwrb,
		      (params->dw[offsetof(struct amap_beiscsi_offload_params,
		      exp_statsn) / 32] + 1));
	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, type, pwrb,
		      0x7);
	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, wrb_idx,
		      pwrb, pwrb_handle->wrb_index);
	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, ptr2nextwrb,
		      pwrb, pwrb_handle->nxt_wrb_index);
	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
			session_state, pwrb, 0);
	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, compltonack,
		      pwrb, 1);
	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, notpredblq,
		      pwrb, 0);
	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, mode, pwrb,
		      0);

	mem_descr = phba->init_mem;
	mem_descr += ISCSI_MEM_GLOBAL_HEADER;

	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
			pad_buffer_addr_hi, pwrb,
		      mem_descr->mem_array[0].bus_address.u.a32.address_hi);
	AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
			pad_buffer_addr_lo, pwrb,
		      mem_descr->mem_array[0].bus_address.u.a32.address_lo);

	be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_target_context_update_wrb));

	doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
3827
	doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
3828
			     << DB_DEF_PDU_WRB_INDEX_SHIFT;
3829 3830 3831 3832 3833 3834 3835 3836
	doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;

	iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
}

static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
			      int *index, int *age)
{
3837
	*index = (int)itt;
3838 3839 3840 3841 3842 3843 3844 3845 3846 3847 3848 3849 3850 3851 3852 3853 3854 3855 3856 3857 3858 3859 3860
	if (age)
		*age = conn->session->age;
}

/**
 * beiscsi_alloc_pdu - allocates pdu and related resources
 * @task: libiscsi task
 * @opcode: opcode of pdu for task
 *
 * This is called with the session lock held. It will allocate
 * the wrb and sgl if needed for the command. And it will prep
 * the pdu's itt. beiscsi_parse_pdu will later translate
 * the pdu itt to the libiscsi task itt.
 */
static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
{
	struct beiscsi_io_task *io_task = task->dd_data;
	struct iscsi_conn *conn = task->conn;
	struct beiscsi_conn *beiscsi_conn = conn->dd_data;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
	struct hwi_wrb_context *pwrb_context;
	struct hwi_controller *phwi_ctrlr;
	itt_t itt;
3861 3862
	struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
	dma_addr_t paddr;
3863

3864
	io_task->cmd_bhs = pci_pool_alloc(beiscsi_sess->bhs_pool,
3865
					  GFP_ATOMIC, &paddr);
3866 3867 3868
	if (!io_task->cmd_bhs)
		return -ENOMEM;
	io_task->bhs_pa.u.a64.address = paddr;
3869
	io_task->libiscsi_itt = (itt_t)task->itt;
3870 3871 3872 3873
	io_task->conn = beiscsi_conn;

	task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
	task->hdr_max = sizeof(struct be_cmd_bhs);
3874
	io_task->psgl_handle = NULL;
3875
	io_task->pwrb_handle = NULL;
3876 3877 3878 3879 3880

	if (task->sc) {
		spin_lock(&phba->io_sgl_lock);
		io_task->psgl_handle = alloc_io_sgl_handle(phba);
		spin_unlock(&phba->io_sgl_lock);
3881 3882
		if (!io_task->psgl_handle)
			goto free_hndls;
3883 3884 3885 3886 3887
		io_task->pwrb_handle = alloc_wrb_handle(phba,
					beiscsi_conn->beiscsi_conn_cid -
					phba->fw_config.iscsi_cid_start);
		if (!io_task->pwrb_handle)
			goto free_io_hndls;
3888 3889
	} else {
		io_task->scsi_cmnd = NULL;
3890
		if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
3891 3892 3893 3894 3895
			if (!beiscsi_conn->login_in_progress) {
				spin_lock(&phba->mgmt_sgl_lock);
				io_task->psgl_handle = (struct sgl_handle *)
						alloc_mgmt_sgl_handle(phba);
				spin_unlock(&phba->mgmt_sgl_lock);
3896 3897 3898
				if (!io_task->psgl_handle)
					goto free_hndls;

3899 3900 3901
				beiscsi_conn->login_in_progress = 1;
				beiscsi_conn->plogin_sgl_handle =
							io_task->psgl_handle;
3902 3903 3904 3905 3906 3907 3908 3909 3910
				io_task->pwrb_handle =
					alloc_wrb_handle(phba,
					beiscsi_conn->beiscsi_conn_cid -
					phba->fw_config.iscsi_cid_start);
				if (!io_task->pwrb_handle)
					goto free_io_hndls;
				beiscsi_conn->plogin_wrb_handle =
							io_task->pwrb_handle;

3911 3912 3913
			} else {
				io_task->psgl_handle =
						beiscsi_conn->plogin_sgl_handle;
3914 3915
				io_task->pwrb_handle =
						beiscsi_conn->plogin_wrb_handle;
3916
			}
3917
			beiscsi_conn->task = task;
3918 3919 3920 3921
		} else {
			spin_lock(&phba->mgmt_sgl_lock);
			io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
			spin_unlock(&phba->mgmt_sgl_lock);
3922 3923
			if (!io_task->psgl_handle)
				goto free_hndls;
3924 3925 3926 3927 3928 3929 3930
			io_task->pwrb_handle =
					alloc_wrb_handle(phba,
					beiscsi_conn->beiscsi_conn_cid -
					phba->fw_config.iscsi_cid_start);
			if (!io_task->pwrb_handle)
				goto free_mgmt_hndls;

3931 3932
		}
	}
3933 3934 3935
	itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
				 wrb_index << 16) | (unsigned int)
				(io_task->psgl_handle->sgl_index));
3936
	io_task->pwrb_handle->pio_handle = task;
3937

3938 3939
	io_task->cmd_bhs->iscsi_hdr.itt = itt;
	return 0;
3940

3941 3942 3943 3944 3945 3946 3947 3948 3949
free_io_hndls:
	spin_lock(&phba->io_sgl_lock);
	free_io_sgl_handle(phba, io_task->psgl_handle);
	spin_unlock(&phba->io_sgl_lock);
	goto free_hndls;
free_mgmt_hndls:
	spin_lock(&phba->mgmt_sgl_lock);
	free_mgmt_sgl_handle(phba, io_task->psgl_handle);
	spin_unlock(&phba->mgmt_sgl_lock);
3950 3951
free_hndls:
	phwi_ctrlr = phba->phwi_ctrlr;
3952 3953 3954
	pwrb_context = &phwi_ctrlr->wrb_context[
			beiscsi_conn->beiscsi_conn_cid -
			phba->fw_config.iscsi_cid_start];
3955 3956
	if (io_task->pwrb_handle)
		free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
3957 3958 3959
	io_task->pwrb_handle = NULL;
	pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
		      io_task->bhs_pa.u.a64.address);
3960
	io_task->cmd_bhs = NULL;
3961
	SE_DEBUG(DBG_LVL_1, "Alloc of SGL_ICD Failed\n");
3962
	return -ENOMEM;
3963 3964 3965 3966 3967 3968 3969 3970 3971 3972 3973 3974 3975 3976 3977 3978 3979 3980 3981 3982 3983 3984 3985 3986 3987 3988 3989 3990
}

static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
			  unsigned int num_sg, unsigned int xferlen,
			  unsigned int writedir)
{

	struct beiscsi_io_task *io_task = task->dd_data;
	struct iscsi_conn *conn = task->conn;
	struct beiscsi_conn *beiscsi_conn = conn->dd_data;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
	struct iscsi_wrb *pwrb = NULL;
	unsigned int doorbell = 0;

	pwrb = io_task->pwrb_handle->pwrb;
	io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
	io_task->bhs_len = sizeof(struct be_cmd_bhs);

	if (writedir) {
		memset(&io_task->cmd_bhs->iscsi_data_pdu, 0, 48);
		AMAP_SET_BITS(struct amap_pdu_data_out, itt,
			      &io_task->cmd_bhs->iscsi_data_pdu,
			      (unsigned int)io_task->cmd_bhs->iscsi_hdr.itt);
		AMAP_SET_BITS(struct amap_pdu_data_out, opcode,
			      &io_task->cmd_bhs->iscsi_data_pdu,
			      ISCSI_OPCODE_SCSI_DATA_OUT);
		AMAP_SET_BITS(struct amap_pdu_data_out, final_bit,
			      &io_task->cmd_bhs->iscsi_data_pdu, 1);
3991 3992
		AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
			      INI_WR_CMD);
3993 3994
		AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
	} else {
3995 3996
		AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
			      INI_RD_CMD);
3997 3998 3999 4000
		AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
	}
	memcpy(&io_task->cmd_bhs->iscsi_data_pdu.
	       dw[offsetof(struct amap_pdu_data_out, lun) / 32],
4001
	       &io_task->cmd_bhs->iscsi_hdr.lun, sizeof(struct scsi_lun));
4002 4003

	AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
4004 4005
		      cpu_to_be16(*(unsigned short *)
				  &io_task->cmd_bhs->iscsi_hdr.lun));
4006 4007 4008 4009 4010 4011 4012 4013 4014 4015 4016 4017 4018 4019 4020
	AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
	AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
		      io_task->pwrb_handle->wrb_index);
	AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
		      be32_to_cpu(task->cmdsn));
	AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
		      io_task->psgl_handle->sgl_index);

	hwi_write_sgl(pwrb, sg, num_sg, io_task);

	AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
		      io_task->pwrb_handle->nxt_wrb_index);
	be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));

	doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4021
	doorbell |= (io_task->pwrb_handle->wrb_index &
4022 4023 4024 4025 4026 4027 4028 4029 4030
		     DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
	doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;

	iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
	return 0;
}

static int beiscsi_mtask(struct iscsi_task *task)
{
4031
	struct beiscsi_io_task *io_task = task->dd_data;
4032 4033 4034 4035 4036
	struct iscsi_conn *conn = task->conn;
	struct beiscsi_conn *beiscsi_conn = conn->dd_data;
	struct beiscsi_hba *phba = beiscsi_conn->phba;
	struct iscsi_wrb *pwrb = NULL;
	unsigned int doorbell = 0;
4037
	unsigned int cid;
4038

4039
	cid = beiscsi_conn->beiscsi_conn_cid;
4040
	pwrb = io_task->pwrb_handle->pwrb;
4041
	memset(pwrb, 0, sizeof(*pwrb));
4042 4043 4044 4045 4046 4047
	AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
		      be32_to_cpu(task->cmdsn));
	AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
		      io_task->pwrb_handle->wrb_index);
	AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
		      io_task->psgl_handle->sgl_index);
4048

4049 4050
	switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
	case ISCSI_OP_LOGIN:
4051 4052
		AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
			      TGT_DM_CMD);
4053 4054 4055 4056 4057
		AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
		AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
		hwi_write_buffer(pwrb, task);
		break;
	case ISCSI_OP_NOOP_OUT:
4058 4059 4060 4061 4062
		if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
			AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
				      TGT_DM_CMD);
			AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt,
				      pwrb, 0);
4063
			AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 1);
4064 4065 4066
		} else {
			AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
				      INI_RD_CMD);
4067
			AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
4068
		}
4069 4070 4071
		hwi_write_buffer(pwrb, task);
		break;
	case ISCSI_OP_TEXT:
4072
		AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4073
			      TGT_DM_CMD);
4074
		AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
4075 4076 4077
		hwi_write_buffer(pwrb, task);
		break;
	case ISCSI_OP_SCSI_TMFUNC:
4078 4079
		AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
			      INI_TMF_CMD);
4080 4081 4082 4083 4084 4085
		AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
		hwi_write_buffer(pwrb, task);
		break;
	case ISCSI_OP_LOGOUT:
		AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
		AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4086
			      HWH_TYPE_LOGOUT);
4087 4088 4089 4090
		hwi_write_buffer(pwrb, task);
		break;

	default:
4091
		SE_DEBUG(DBG_LVL_1, "opcode =%d Not supported\n",
4092 4093 4094 4095 4096
			 task->hdr->opcode & ISCSI_OPCODE_MASK);
		return -EINVAL;
	}

	AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
4097
		      task->data_count);
4098 4099 4100 4101
	AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
		      io_task->pwrb_handle->nxt_wrb_index);
	be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));

4102
	doorbell |= cid & DB_WRB_POST_CID_MASK;
4103
	doorbell |= (io_task->pwrb_handle->wrb_index &
4104 4105 4106 4107 4108 4109 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 4120 4121 4122 4123 4124 4125 4126 4127 4128 4129 4130
		     DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
	doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
	iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
	return 0;
}

static int beiscsi_task_xmit(struct iscsi_task *task)
{
	struct beiscsi_io_task *io_task = task->dd_data;
	struct scsi_cmnd *sc = task->sc;
	struct scatterlist *sg;
	int num_sg;
	unsigned int  writedir = 0, xferlen = 0;

	if (!sc)
		return beiscsi_mtask(task);

	io_task->scsi_cmnd = sc;
	num_sg = scsi_dma_map(sc);
	if (num_sg < 0) {
		SE_DEBUG(DBG_LVL_1, " scsi_dma_map Failed\n")
		return num_sg;
	}
	xferlen = scsi_bufflen(sc);
	sg = scsi_sglist(sc);
	if (sc->sc_data_direction == DMA_TO_DEVICE) {
		writedir = 1;
4131
		SE_DEBUG(DBG_LVL_4, "task->imm_count=0x%08x\n",
4132 4133 4134 4135 4136 4137
			 task->imm_count);
	} else
		writedir = 0;
	return beiscsi_iotask(task, sg, num_sg, xferlen, writedir);
}

4138
static void beiscsi_quiesce(struct beiscsi_hba *phba)
4139
{
4140 4141 4142 4143
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	struct be_eq_obj *pbe_eq;
	unsigned int i, msix_vec;
4144 4145
	u8 *real_offset = 0;
	u32 value = 0;
4146

4147 4148
	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
4149
	hwi_disable_intr(phba);
4150 4151 4152 4153
	if (phba->msix_enabled) {
		for (i = 0; i <= phba->num_cpus; i++) {
			msix_vec = phba->msix_entries[i].vector;
			free_irq(msix_vec, &phwi_context->be_eq[i]);
4154
			kfree(phba->msi_name[i]);
4155 4156 4157 4158 4159
		}
	} else
		if (phba->pcidev->irq)
			free_irq(phba->pcidev->irq, phba);
	pci_disable_msix(phba->pcidev);
4160 4161
	destroy_workqueue(phba->wq);
	if (blk_iopoll_enabled)
4162 4163 4164 4165
		for (i = 0; i < phba->num_cpus; i++) {
			pbe_eq = &phwi_context->be_eq[i];
			blk_iopoll_disable(&pbe_eq->iopoll);
		}
4166 4167 4168

	beiscsi_clean_port(phba);
	beiscsi_free_mem(phba);
4169 4170 4171 4172 4173 4174 4175 4176
	real_offset = (u8 *)phba->csr_va + MPU_EP_SEMAPHORE;

	value = readl((void *)real_offset);

	if (value & 0x00010000) {
		value &= 0xfffeffff;
		writel(value, (void *)real_offset);
	}
4177 4178 4179 4180 4181
	beiscsi_unmap_pci_function(phba);
	pci_free_consistent(phba->pcidev,
			    phba->ctrl.mbox_mem_alloced.size,
			    phba->ctrl.mbox_mem_alloced.va,
			    phba->ctrl.mbox_mem_alloced.dma);
4182 4183 4184 4185 4186 4187 4188 4189 4190 4191 4192 4193 4194 4195
}

static void beiscsi_remove(struct pci_dev *pcidev)
{

	struct beiscsi_hba *phba = NULL;

	phba = pci_get_drvdata(pcidev);
	if (!phba) {
		dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
		return;
	}

	beiscsi_quiesce(phba);
4196
	iscsi_boot_destroy_kset(phba->boot_kset);
4197 4198 4199
	iscsi_host_remove(phba->shost);
	pci_dev_put(phba->pcidev);
	iscsi_host_free(phba->shost);
4200
	pci_disable_device(pcidev);
4201 4202
}

4203 4204 4205 4206 4207 4208 4209 4210 4211 4212 4213 4214
static void beiscsi_shutdown(struct pci_dev *pcidev)
{

	struct beiscsi_hba *phba = NULL;

	phba = (struct beiscsi_hba *)pci_get_drvdata(pcidev);
	if (!phba) {
		dev_err(&pcidev->dev, "beiscsi_shutdown called with no phba\n");
		return;
	}

	beiscsi_quiesce(phba);
4215
	pci_disable_device(pcidev);
4216 4217
}

4218 4219 4220 4221 4222 4223 4224 4225 4226 4227 4228 4229 4230 4231 4232
static void beiscsi_msix_enable(struct beiscsi_hba *phba)
{
	int i, status;

	for (i = 0; i <= phba->num_cpus; i++)
		phba->msix_entries[i].entry = i;

	status = pci_enable_msix(phba->pcidev, phba->msix_entries,
				 (phba->num_cpus + 1));
	if (!status)
		phba->msix_enabled = true;

	return;
}

4233 4234 4235 4236
static int __devinit beiscsi_dev_probe(struct pci_dev *pcidev,
				const struct pci_device_id *id)
{
	struct beiscsi_hba *phba = NULL;
4237 4238 4239
	struct hwi_controller *phwi_ctrlr;
	struct hwi_context_memory *phwi_context;
	struct be_eq_obj *pbe_eq;
4240
	int ret, num_cpus, i;
4241 4242
	u8 *real_offset = 0;
	u32 value = 0;
4243 4244 4245

	ret = beiscsi_enable_pci(pcidev);
	if (ret < 0) {
4246 4247
		dev_err(&pcidev->dev, "beiscsi_dev_probe-"
			" Failed to enable pci device\n");
4248 4249 4250 4251 4252 4253
		return ret;
	}

	phba = beiscsi_hba_alloc(pcidev);
	if (!phba) {
		dev_err(&pcidev->dev, "beiscsi_dev_probe-"
4254
			" Failed in beiscsi_hba_alloc\n");
4255 4256 4257
		goto disable_pci;
	}

4258 4259 4260 4261 4262 4263 4264 4265 4266 4267 4268 4269 4270 4271
	switch (pcidev->device) {
	case BE_DEVICE_ID1:
	case OC_DEVICE_ID1:
	case OC_DEVICE_ID2:
		phba->generation = BE_GEN2;
		break;
	case BE_DEVICE_ID2:
	case OC_DEVICE_ID3:
		phba->generation = BE_GEN3;
		break;
	default:
		phba->generation = 0;
	}

4272 4273 4274 4275 4276
	if (enable_msix)
		num_cpus = find_num_cpus();
	else
		num_cpus = 1;
	phba->num_cpus = num_cpus;
4277
	SE_DEBUG(DBG_LVL_8, "num_cpus = %d\n", phba->num_cpus);
4278

4279
	if (enable_msix) {
4280
		beiscsi_msix_enable(phba);
4281 4282 4283
		if (!phba->msix_enabled)
			phba->num_cpus = 1;
	}
4284 4285 4286 4287 4288 4289 4290
	ret = be_ctrl_init(phba, pcidev);
	if (ret) {
		shost_printk(KERN_ERR, phba->shost, "beiscsi_dev_probe-"
				"Failed in be_ctrl_init\n");
		goto hba_free;
	}

4291 4292 4293 4294 4295 4296 4297
	if (!num_hba) {
		real_offset = (u8 *)phba->csr_va + MPU_EP_SEMAPHORE;
		value = readl((void *)real_offset);
		if (value & 0x00010000) {
			gcrashmode++;
			shost_printk(KERN_ERR, phba->shost,
				"Loading Driver in crashdump mode\n");
4298
			ret = beiscsi_cmd_reset_function(phba);
4299 4300 4301 4302 4303 4304 4305 4306 4307 4308 4309 4310 4311 4312 4313 4314 4315 4316 4317
			if (ret) {
				shost_printk(KERN_ERR, phba->shost,
					"Reset Failed. Aborting Crashdump\n");
				goto hba_free;
			}
			ret = be_chk_reset_complete(phba);
			if (ret) {
				shost_printk(KERN_ERR, phba->shost,
					"Failed to get out of reset."
					"Aborting Crashdump\n");
				goto hba_free;
			}
		} else {
			value |= 0x00010000;
			writel(value, (void *)real_offset);
			num_hba++;
		}
	}

4318 4319 4320
	spin_lock_init(&phba->io_sgl_lock);
	spin_lock_init(&phba->mgmt_sgl_lock);
	spin_lock_init(&phba->isr_lock);
4321 4322 4323 4324 4325 4326 4327
	ret = mgmt_get_fw_config(&phba->ctrl, phba);
	if (ret != 0) {
		shost_printk(KERN_ERR, phba->shost,
			     "Error getting fw config\n");
		goto free_port;
	}
	phba->shost->max_id = phba->fw_config.iscsi_cid_count;
4328
	beiscsi_get_params(phba);
4329
	phba->shost->can_queue = phba->params.ios_per_ctrl;
4330 4331 4332 4333 4334 4335 4336
	ret = beiscsi_init_port(phba);
	if (ret < 0) {
		shost_printk(KERN_ERR, phba->shost, "beiscsi_dev_probe-"
			     "Failed in beiscsi_init_port\n");
		goto free_port;
	}

4337 4338 4339 4340 4341 4342 4343 4344 4345
	for (i = 0; i < MAX_MCC_CMD ; i++) {
		init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
		phba->ctrl.mcc_tag[i] = i + 1;
		phba->ctrl.mcc_numtag[i + 1] = 0;
		phba->ctrl.mcc_tag_available++;
	}

	phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;

4346 4347
	snprintf(phba->wq_name, sizeof(phba->wq_name), "beiscsi_q_irq%u",
		 phba->shost->host_no);
4348
	phba->wq = alloc_workqueue(phba->wq_name, WQ_MEM_RECLAIM, 1);
4349 4350 4351 4352 4353 4354 4355 4356
	if (!phba->wq) {
		shost_printk(KERN_ERR, phba->shost, "beiscsi_dev_probe-"
				"Failed to allocate work queue\n");
		goto free_twq;
	}

	INIT_WORK(&phba->work_cqs, beiscsi_process_all_cqs);

4357 4358
	phwi_ctrlr = phba->phwi_ctrlr;
	phwi_context = phwi_ctrlr->phwi_ctxt;
4359
	if (blk_iopoll_enabled) {
4360 4361 4362 4363 4364 4365
		for (i = 0; i < phba->num_cpus; i++) {
			pbe_eq = &phwi_context->be_eq[i];
			blk_iopoll_init(&pbe_eq->iopoll, be_iopoll_budget,
					be_iopoll);
			blk_iopoll_enable(&pbe_eq->iopoll);
		}
4366 4367 4368 4369 4370 4371 4372
	}
	ret = beiscsi_init_irqs(phba);
	if (ret < 0) {
		shost_printk(KERN_ERR, phba->shost, "beiscsi_dev_probe-"
			     "Failed to beiscsi_init_irqs\n");
		goto free_blkenbld;
	}
4373
	hwi_enable_intr(phba);
4374 4375 4376 4377 4378 4379 4380 4381 4382

	if (beiscsi_setup_boot_info(phba))
		/*
		 * log error but continue, because we may not be using
		 * iscsi boot.
		 */
		shost_printk(KERN_ERR, phba->shost, "Could not set up "
			     "iSCSI boot info.");

4383
	SE_DEBUG(DBG_LVL_8, "\n\n\n SUCCESS - DRIVER LOADED\n\n\n");
4384 4385 4386 4387 4388
	return 0;

free_blkenbld:
	destroy_workqueue(phba->wq);
	if (blk_iopoll_enabled)
4389 4390 4391 4392
		for (i = 0; i < phba->num_cpus; i++) {
			pbe_eq = &phwi_context->be_eq[i];
			blk_iopoll_disable(&pbe_eq->iopoll);
		}
4393 4394 4395 4396
free_twq:
	beiscsi_clean_port(phba);
	beiscsi_free_mem(phba);
free_port:
4397 4398 4399 4400 4401 4402 4403 4404 4405
	real_offset = (u8 *)phba->csr_va + MPU_EP_SEMAPHORE;

	value = readl((void *)real_offset);

	if (value & 0x00010000) {
		value &= 0xfffeffff;
		writel(value, (void *)real_offset);
	}

4406 4407 4408 4409 4410 4411
	pci_free_consistent(phba->pcidev,
			    phba->ctrl.mbox_mem_alloced.size,
			    phba->ctrl.mbox_mem_alloced.va,
			   phba->ctrl.mbox_mem_alloced.dma);
	beiscsi_unmap_pci_function(phba);
hba_free:
4412 4413
	if (phba->msix_enabled)
		pci_disable_msix(phba->pcidev);
4414 4415 4416 4417 4418 4419 4420 4421 4422 4423 4424
	iscsi_host_remove(phba->shost);
	pci_dev_put(phba->pcidev);
	iscsi_host_free(phba->shost);
disable_pci:
	pci_disable_device(pcidev);
	return ret;
}

struct iscsi_transport beiscsi_iscsi_transport = {
	.owner = THIS_MODULE,
	.name = DRV_NAME,
4425
	.caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
4426 4427 4428 4429 4430 4431
		CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
	.create_session = beiscsi_session_create,
	.destroy_session = beiscsi_session_destroy,
	.create_conn = beiscsi_conn_create,
	.bind_conn = beiscsi_conn_bind,
	.destroy_conn = iscsi_conn_teardown,
4432
	.attr_is_visible = be2iscsi_attr_is_visible,
4433
	.set_param = beiscsi_set_param,
4434
	.get_conn_param = iscsi_conn_get_param,
4435 4436 4437
	.get_session_param = iscsi_session_get_param,
	.get_host_param = beiscsi_get_host_param,
	.start_conn = beiscsi_conn_start,
4438
	.stop_conn = iscsi_conn_stop,
4439 4440 4441 4442 4443 4444
	.send_pdu = iscsi_conn_send_pdu,
	.xmit_task = beiscsi_task_xmit,
	.cleanup_task = beiscsi_cleanup_task,
	.alloc_pdu = beiscsi_alloc_pdu,
	.parse_pdu_itt = beiscsi_parse_pdu,
	.get_stats = beiscsi_conn_get_stats,
4445
	.get_ep_param = beiscsi_ep_get_param,
4446 4447 4448 4449 4450 4451 4452 4453 4454 4455
	.ep_connect = beiscsi_ep_connect,
	.ep_poll = beiscsi_ep_poll,
	.ep_disconnect = beiscsi_ep_disconnect,
	.session_recovery_timedout = iscsi_session_recovery_timedout,
};

static struct pci_driver beiscsi_pci_driver = {
	.name = DRV_NAME,
	.probe = beiscsi_dev_probe,
	.remove = beiscsi_remove,
4456
	.shutdown = beiscsi_shutdown,
4457 4458 4459
	.id_table = beiscsi_pci_id_table
};

4460

4461 4462 4463 4464 4465 4466 4467 4468 4469 4470
static int __init beiscsi_module_init(void)
{
	int ret;

	beiscsi_scsi_transport =
			iscsi_register_transport(&beiscsi_iscsi_transport);
	if (!beiscsi_scsi_transport) {
		SE_DEBUG(DBG_LVL_1,
			 "beiscsi_module_init - Unable to  register beiscsi"
			 "transport.\n");
4471
		return -ENOMEM;
4472
	}
4473
	SE_DEBUG(DBG_LVL_8, "In beiscsi_module_init, tt=%p\n",
4474 4475 4476 4477 4478 4479 4480 4481 4482 4483 4484 4485 4486 4487 4488 4489 4490 4491 4492 4493 4494 4495 4496 4497
		 &beiscsi_iscsi_transport);

	ret = pci_register_driver(&beiscsi_pci_driver);
	if (ret) {
		SE_DEBUG(DBG_LVL_1,
			 "beiscsi_module_init - Unable to  register"
			 "beiscsi pci driver.\n");
		goto unregister_iscsi_transport;
	}
	return 0;

unregister_iscsi_transport:
	iscsi_unregister_transport(&beiscsi_iscsi_transport);
	return ret;
}

static void __exit beiscsi_module_exit(void)
{
	pci_unregister_driver(&beiscsi_pci_driver);
	iscsi_unregister_transport(&beiscsi_iscsi_transport);
}

module_init(beiscsi_module_init);
module_exit(beiscsi_module_exit);