tmio_mmc.txt 4.4 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11
* Toshiba Mobile IO SD/MMC controller

The tmio-mmc driver doesn't probe its devices actively, instead its binding to
devices is managed by either MFD drivers or by the sh_mobile_sdhi platform
driver. Those drivers supply the tmio-mmc driver with platform data, that either
describe hardware capabilities, known to them, or are obtained by them from
their own platform data or from their DT information. In the latter case all
compulsory and any optional properties, common to all SD/MMC drivers, as
described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
optional bindings can be used.

12
Required properties:
13
- compatible: should contain one or more of the following:
14
		"renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
15
		"renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
16 17
		"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
		"renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
18 19
		"renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
		"renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
20 21 22
		"renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
		"renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
		"renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
23
		"renesas,sdhi-r8a7791" - SDHI IP on R8A7791 SoC
24 25 26
		"renesas,sdhi-r8a7792" - SDHI IP on R8A7792 SoC
		"renesas,sdhi-r8a7793" - SDHI IP on R8A7793 SoC
		"renesas,sdhi-r8a7794" - SDHI IP on R8A7794 SoC
W
Wolfram Sang 已提交
27
		"renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC
28
		"renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC
29
		"renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC
30 31 32 33 34 35 36 37 38 39
		"renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller
		"renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller
		"renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 or RZ/G1
					   SDHI controller
		"renesas,rcar-gen3-sdhi" - a generic R-Car Gen3 SDHI controller


		When compatible with the generic version, nodes must list
		the SoC-specific version corresponding to the platform
		first followed by the generic version.
40

41 42 43 44 45 46 47 48
- clocks: Most controllers only have 1 clock source per channel. However, on
	  some variations of this controller, the internal card detection
	  logic that exists in this controller is sectioned off to be run by a
	  separate second clock source to allow the main core clock to be turned
	  off to save power.
	  If 2 clocks are specified by the hardware, you must name them as
	  "core" and "cd". If the controller only has 1 clock, naming is not
	  required.
49 50
	  Devices which have more than 1 clock are listed below:
	  2: R7S72100
51

52 53
Optional properties:
- toshiba,mmc-wrprotect-disable: write-protect detection is unavailable
54 55 56
- pinctrl-names: should be "default", "state_uhs"
- pinctrl-0: should contain default/high speed pin ctrl
- pinctrl-1: should contain uhs mode pin ctrl
57 58 59 60

Example: R8A7790 (R-Car H2) SDHI controller nodes

	sdhi0: sd@ee100000 {
61
		compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
62 63 64 65 66 67 68 69 70 71 72 73 74
		reg = <0 0xee100000 0 0x328>;
		interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&cpg CPG_MOD 314>;
		dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
		       <&dmac1 0xcd>, <&dmac1 0xce>;
		dma-names = "tx", "rx", "tx", "rx";
		max-frequency = <195000000>;
		power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
		resets = <&cpg 314>;
		status = "disabled";
	};

	sdhi1: sd@ee120000 {
75
		compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
76 77 78 79 80 81 82 83 84 85 86 87 88
		reg = <0 0xee120000 0 0x328>;
		interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&cpg CPG_MOD 313>;
		dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
		       <&dmac1 0xc9>, <&dmac1 0xca>;
		dma-names = "tx", "rx", "tx", "rx";
		max-frequency = <195000000>;
		power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
		resets = <&cpg 313>;
		status = "disabled";
	};

	sdhi2: sd@ee140000 {
89
		compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
90 91 92 93 94 95 96 97 98 99 100 101 102
		reg = <0 0xee140000 0 0x100>;
		interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&cpg CPG_MOD 312>;
		dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
		       <&dmac1 0xc1>, <&dmac1 0xc2>;
		dma-names = "tx", "rx", "tx", "rx";
		max-frequency = <97500000>;
		power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
		resets = <&cpg 312>;
		status = "disabled";
	};

	sdhi3: sd@ee160000 {
103
		compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
104 105 106 107 108 109 110 111 112 113 114
		reg = <0 0xee160000 0 0x100>;
		interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&cpg CPG_MOD 311>;
		dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
		       <&dmac1 0xd3>, <&dmac1 0xd4>;
		dma-names = "tx", "rx", "tx", "rx";
		max-frequency = <97500000>;
		power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
		resets = <&cpg 311>;
		status = "disabled";
	};