1. 01 12月, 2021 1 次提交
  2. 30 11月, 2021 4 次提交
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      0d2857a2
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    • A
      Merge pull request #20658 from smbz:lstm_optimisation · ea7d4be3
      Andrew Ryrie 提交于
      * dnn: LSTM optimisation
      
      This uses the AVX-optimised fastGEMM1T for matrix multiplications where available, instead of the standard cv::gemm.
      
      fastGEMM1T is already used by the fully-connected layer.  This commit involves two minor modifications:
       - Use unaligned access.  I don't believe this involves any performance hit in on modern CPUs (Nehalem and Bulldozer onwards) in the case where the address is actually aligned.
       - Allow for weight matrices where the number of columns is not a multiple of 8.
      
      I have not enabled AVX-512 as I don't have an AVX-512 CPU to test on.
      
      * Fix warning about initialisation order
      
      * Remove C++11 syntax
      
      * Fix build when AVX(2) is not available
      
      In this case the CV_TRY_X macros are defined to 0, rather than being undefined.
      
      * Minor changes as requested:
      
       - Don't check hardware support for AVX(2) when dispatch is disabled for these
       - Add braces
      
      * Fix out-of-bounds access in fully connected layer
      
      The old tail handling in fastGEMM1T implicitly rounded vecsize up to the next multiple of 8, and the fully connected layer implements padding up to the next multiple of 8 to cope with this.  The new tail handling does not round the vecsize upwards like this but it does require that the vecsize is at least 8.  To adapt to the new tail handling, the fully connected layer now rounds vecsize itself at the same time as adding the padding(which makes more sense anyway).
      
      This also means that the fully connected layer always passes a vecsize of at least 8 to fastGEMM1T, which fixes the out-of-bounds access problems.
      
      * Improve tail mask handling
      
       - Use static array for generating tail masks (as requested)
       - Apply tail mask to the weights as well as the input vectors to prevent spurious propagation of NaNs/Infs
      
      * Revert whitespace change
      
      * Improve readability of conditions for using AVX
      
      * dnn(lstm): minor coding style changes, replaced left aligned load
      ea7d4be3
    • S
      fix Clip, LeakyReLU, LRN, Split defaults · 05db8784
      Smirnov Egor 提交于
      05db8784
  3. 28 11月, 2021 3 次提交
  4. 27 11月, 2021 4 次提交
  5. 26 11月, 2021 5 次提交
  6. 25 11月, 2021 2 次提交
  7. 24 11月, 2021 1 次提交
  8. 23 11月, 2021 1 次提交
  9. 20 11月, 2021 2 次提交
  10. 19 11月, 2021 5 次提交
  11. 18 11月, 2021 1 次提交
  12. 17 11月, 2021 2 次提交
  13. 16 11月, 2021 1 次提交
  14. 12 11月, 2021 1 次提交
  15. 11 11月, 2021 2 次提交
  16. 10 11月, 2021 2 次提交
    • P
      Add support for runtime CPU feature check on POWER on FreeBSD. · 68e425f8
      Piotr Kubaj 提交于
      1. Code uses PPC_FEATURE_HAS_VSX, but it's not checked similarly to
      PPC_FEATURE2_ARCH_3_00 and PPC_FEATURE2_ARCH_3_00 for availability. FreeBSD has
      those macros in machine/cpu.h, but I went with the way chosen for
      PPC_FEATURE2_ARCH_3_00 and PPC_FEATURE2_ARCH_3_00. Other than that, FreeBSD also
      has sys/auxv.h and that's where elf_aux_info() is defined.
      2. getauxval() is actually Linux-only, but code checked for __unix__. It won't
      work on all UNIX, so change it back to __linux__. Add another code variant
      strictly for FreeBSD.
      3. Update comment. This commit adds code for FreeBSD, but recently there
      appeared support for powerpc64 in OpenBSD.
      68e425f8
    • Z
      Merge pull request #20904 from Crayon-new:fix_bug_in_maxLayer · 98b6ce35
      ZaKiiiiiiiii 提交于
      fix bug: wrong output dimension when "keep_dims" is false in pooling layer.
      
      * fix bug in max layer
      
      * code align
      
      * delete permute layer and add test case
      
      * add name assert
      
      * check other cases
      
      * remove c++11 features
      
      * style:add "const" remove assert
      
      * style:sanitize file names
      98b6ce35
  17. 06 11月, 2021 2 次提交
  18. 05 11月, 2021 1 次提交