提交 b5fcb06a 编写于 作者: A Alexander Alekhin

core(SIMD): update int64 SSE constructor

上级 bd0732b1
......@@ -244,7 +244,13 @@ struct v_uint64x2
explicit v_uint64x2(__m128i v) : val(v) {}
v_uint64x2(uint64 v0, uint64 v1)
{
#if defined(_MSC_VER) && _MSC_VER >= 1920/*MSVS 2019*/ && defined(_M_X64)
val = _mm_setr_epi64x((int64_t)v0, (int64_t)v1);
#elif defined(__GNUC__)
val = _mm_setr_epi64((__m64)v0, (__m64)v1);
#else
val = _mm_setr_epi32((int)v0, (int)(v0 >> 32), (int)v1, (int)(v1 >> 32));
#endif
}
uint64 get0() const
......@@ -272,7 +278,13 @@ struct v_int64x2
explicit v_int64x2(__m128i v) : val(v) {}
v_int64x2(int64 v0, int64 v1)
{
#if defined(_MSC_VER) && _MSC_VER >= 1920/*MSVS 2019*/ && defined(_M_X64)
val = _mm_setr_epi64x((int64_t)v0, (int64_t)v1);
#elif defined(__GNUC__)
val = _mm_setr_epi64((__m64)v0, (__m64)v1);
#else
val = _mm_setr_epi32((int)v0, (int)(v0 >> 32), (int)v1, (int)(v1 >> 32));
#endif
}
int64 get0() const
......
......@@ -373,6 +373,23 @@ template<typename R> struct TheTest
EXPECT_EQ((LaneType)12, vx_setall_res2_[i]);
}
#if CV_SIMD_WIDTH == 16
{
uint64 a = CV_BIG_INT(0x7fffffffffffffff);
uint64 b = (uint64)CV_BIG_INT(0xcfffffffffffffff);
v_uint64x2 uint64_vec(a, b);
EXPECT_EQ(a, uint64_vec.get0());
EXPECT_EQ(b, v_extract_n<1>(uint64_vec));
}
{
int64 a = CV_BIG_INT(0x7fffffffffffffff);
int64 b = CV_BIG_INT(-1);
v_int64x2 int64_vec(a, b);
EXPECT_EQ(a, int64_vec.get0());
EXPECT_EQ(b, v_extract_n<1>(int64_vec));
}
#endif
return *this;
}
......
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