Summary: Restrict loadI2L_imm optimizations to positive values of mask
Reviewed-by: kvn, dlong

Reviewed-by: kvn, twisti

Reviewed-by: kvn, twisti

Summary: Enable CHECK_UNHANDLED_OOPS in fastdebug builds across all supported platforms.
Reviewed-by: coleenp, hseigel, dholmes, stefank, twisti, ihse, rdurbin
Contributed-by: lois.foltan@oracle.com

Summary: refactored code to allow platform-specific differences
Reviewed-by: dlong, twisti
Contributed-by: NGoetz Lindenmaier <goetz.lindenmaier@sap.com>

Summary: Repair wrong code generation, added new matching rule
Reviewed-by: kvn, twisti

Summary: Execute vzeroupper instruction after JNI call and on exits in jit compiled code which use 256bit vectors.
Reviewed-by: roland

Summary: Use SSE4.2 and AVX2 instructions for encodeArray intrinsic.
Reviewed-by: roland

Summary: use 'rep stosb' instead of 'rep stosq' when fast-string operations are available.
Reviewed-by: twisti, roland

Summary: Removed LoadUI2L node from Ideal nodes, use match rule in .ad files instead.
Reviewed-by: kvn

Summary: support of compress class pointers in the compilers.
Reviewed-by: kvn, twisti

Summary: Capitalize these metadata types (and objArrayKlass)
Reviewed-by: stefank, twisti, kvn

Summary: Remove PermGen, allocate meta-data in metaspace linked to class loaders, rewrite GC walking, rewrite and rename metadata to be C++ classes
Reviewed-by: jmasa, stefank, never, coleenp, kvn, brutisso, mgerdin, dholmes, jrose, twisti, roland
Contributed-by: Njmasa &lt;jon.masamitsu@oracle.com&gt;, stefank &lt;stefan.karlsson@oracle.com&gt;, mgerdin &lt;mikael.gerdin@oracle.com&gt;, never <tom.rodriguez@oracle.com>

Summary: Added asm encoding and mach nodes for vector arithmetic instructions on x86.
Reviewed-by: roland

Summary: Increase vector size up to 256-bits for YMM AVX registers on x86.
Reviewed-by: never, twisti, roland

Reviewed-by: kvn, twisti
Contributed-by: NKrystal Mok <sajia@taobao.com>

Reviewed-by: kvn

Summary: use x87 instructions to implement exp() and pow() in interpreter/c1/c2.
Reviewed-by: kvn, never, twisti

Summary: use shorter instruction sequences for atomic add and atomic exchange when possible.
Reviewed-by: kvn, jrose

Reviewed-by: kvn, never
Contributed-by: nils.eliasson@oracle.com

Summary: Replace call_epilog() encoding with macroassembler use. Moved duplicated code to x86.ad. Fixed return_addr() definition.
Reviewed-by: never

Summary: For C2 moved saving EBP after ESP adjustment. For C1 generated 5 byte nop instruction first if needed.
Reviewed-by: never, twisti, azeemj

Summary: Nested locks elimination done before lock nodes expansion by looking for outer locks of the same object.
Reviewed-by: never, twisti

Summary: adds store store barrier after initialization of header and body of objects.
Reviewed-by: never, kvn

Summary: Use 3-operands SIMD instructions in C2 generated code for machines with AVX.
Reviewed-by: never

Summary: Added support for AVX extension to the x86 instruction set.
Reviewed-by: never

Summary: allow reg_class definition as a function.
Reviewed-by: kvn, never

Summary: Avoid CMove in a loop if possible. May generate CMove if it could be moved outside a loop.
Reviewed-by: never

Reviewed-by: kvn, never, bdelsart

Summary: on T4 2 BIS instructions should be issued to prefetch 64 bytes
Reviewed-by: iveresov, phh, twisti

Summary: Use new short branch instruction in C2 generated code.
Reviewed-by: never

Summary: replace MemBarAcquire/MemBarRelease nodes on the monitor enter/exit code paths with new MemBarAcquireLock/MemBarReleaseLock nodes
Reviewed-by: kvn, twisti

Summary: Remove flags which duplicate information in Node::NodeClasses.
Reviewed-by: never

Summary: Add new short branch instruction to Hotspot sparc assembler.
Reviewed-by: never, twisti, jrose

Summary: Fix integer overflow problem in the code generated by loop optimizer.
Reviewed-by: never

Summary: The upcoming processors from AMD are the first that support 3dnow prefetch without supporting the 3dnow instruction set.
Reviewed-by: kvn
Contributed-by: tom.deneau@amd.com

Summary: Enables cross building of a c2 VM. Support masking of shift counts when the processor architecture mandates it.
Reviewed-by: kvn, never

Summary: copy small (<8) strings on stack if str+16 crosses a page boundary and load from stack into XMM. Back up pointer when loading string's tail.
Reviewed-by: never

Reviewed-by: kvn

Summary: oops should be loaded from the constant table of an nmethod instead of materializing them with a long code sequence.
Reviewed-by: never, kvn