Reviewed-by: kvn, vlivanov, dlong, rhalade, mschoene, iignatyev

Summary: Check for failed expansion of stub section in code buffer and bailout.
Reviewed-by: kvn, thartmann

Summary: Introduce the PreserveFramePointer flag to control if RBP is used as the frame pointer or as a general purpose register.
Reviewed-by: kvn, roland, dlong, enevill, shade

Summary: make compiled code bang the stack by the worst case size of the interpreter frame at deoptimization points.
Reviewed-by: twisti, kvn

Summary: Change MacroAssembler::verified_entry() to set up RBP correctly when generating stub code.
Reviewed-by: kvn

Summary: Add support for BMI1 instructions
Reviewed-by: kvn, roland

Summary: Consolidated C2 x86 locking code in one place in macroAssembler_x86.cpp.
Reviewed-by: roland

Summary: Use RTM for inflated locks and stack locks.
Reviewed-by: iveresov, twisti, roland, dcubed

Summary: Take into account space needed for "trampoline code" used by calls on PPC64.
Reviewed-by: kvn
Contributed-by: lutz.schmidt@sap.com

Reviewed-by: kvn, iveresov

Summary: Restrict loadI2L_imm optimizations to positive values of mask
Reviewed-by: kvn, dlong

Summary: Use new nodes for loadFence/storeFence intrinsics in C2.
Reviewed-by: kvn, dholmes

Summary: added ability in C2 to expand mach nodes to several mach nodes after register allocation
Reviewed-by: kvn

Reviewed-by: kvn, twisti

Reviewed-by: kvn, twisti

Summary: Enable CHECK_UNHANDLED_OOPS in fastdebug builds across all supported platforms.
Reviewed-by: coleenp, hseigel, dholmes, stefank, twisti, ihse, rdurbin
Contributed-by: lois.foltan@oracle.com

Summary: On PPC, the first 13 floating point arguments to C calls are passed in floating point registers. Also, all but the first 8 arguments are passed on the stack. So there can be floating point arguments that are passed on the stack and in a register. We duplicate the regs datastructure in c_calling_convention() to represent this.
Reviewed-by: kvn, cjplummer

Summary: refactored code to allow platform-specific differences
Reviewed-by: dlong, twisti
Contributed-by: NGoetz Lindenmaier <goetz.lindenmaier@sap.com>

Summary: Repair wrong code generation, added new matching rule
Reviewed-by: kvn, twisti

Summary: Execute vzeroupper instruction after JNI call and on exits in jit compiled code which use 256bit vectors.
Reviewed-by: roland

Summary: Use SSE4.2 and AVX2 instructions for encodeArray intrinsic.
Reviewed-by: roland

Summary: use 'rep stosb' instead of 'rep stosq' when fast-string operations are available.
Reviewed-by: twisti, roland

Summary: Removed LoadUI2L node from Ideal nodes, use match rule in .ad files instead.
Reviewed-by: kvn

Summary: support of compress class pointers in the compilers.
Reviewed-by: kvn, twisti

Summary: Capitalize these metadata types (and objArrayKlass)
Reviewed-by: stefank, twisti, kvn

Summary: Remove PermGen, allocate meta-data in metaspace linked to class loaders, rewrite GC walking, rewrite and rename metadata to be C++ classes
Reviewed-by: jmasa, stefank, never, coleenp, kvn, brutisso, mgerdin, dholmes, jrose, twisti, roland
Contributed-by: Njmasa &lt;jon.masamitsu@oracle.com&gt;, stefank &lt;stefan.karlsson@oracle.com&gt;, mgerdin &lt;mikael.gerdin@oracle.com&gt;, never <tom.rodriguez@oracle.com>

Summary: Added asm encoding and mach nodes for vector arithmetic instructions on x86.
Reviewed-by: roland

Summary: Increase vector size up to 256-bits for YMM AVX registers on x86.
Reviewed-by: never, twisti, roland

Reviewed-by: kvn, twisti
Contributed-by: NKrystal Mok <sajia@taobao.com>

Reviewed-by: kvn

Summary: use x87 instructions to implement exp() and pow() in interpreter/c1/c2.
Reviewed-by: kvn, never, twisti

Summary: use shorter instruction sequences for atomic add and atomic exchange when possible.
Reviewed-by: kvn, jrose

Reviewed-by: kvn, never
Contributed-by: nils.eliasson@oracle.com

Summary: Replace call_epilog() encoding with macroassembler use. Moved duplicated code to x86.ad. Fixed return_addr() definition.
Reviewed-by: never

Summary: For C2 moved saving EBP after ESP adjustment. For C1 generated 5 byte nop instruction first if needed.
Reviewed-by: never, twisti, azeemj

Summary: Nested locks elimination done before lock nodes expansion by looking for outer locks of the same object.
Reviewed-by: never, twisti

Summary: adds store store barrier after initialization of header and body of objects.
Reviewed-by: never, kvn

Summary: Use 3-operands SIMD instructions in C2 generated code for machines with AVX.
Reviewed-by: never

Summary: Added support for AVX extension to the x86 instruction set.
Reviewed-by: never

Summary: allow reg_class definition as a function.
Reviewed-by: kvn, never