1. 07 12月, 2011 1 次提交
  2. 26 9月, 2011 1 次提交
  3. 01 9月, 2011 1 次提交
  4. 27 5月, 2011 1 次提交
  5. 25 5月, 2011 1 次提交
  6. 12 4月, 2011 1 次提交
    • K
      7035713: 3DNow Prefetch Instruction Support · 603ddc4e
      kvn 提交于
      Summary: The upcoming processors from AMD are the first that support 3dnow prefetch without supporting the 3dnow instruction set.
      Reviewed-by: kvn
      Contributed-by: tom.deneau@amd.com
      603ddc4e
  7. 03 4月, 2011 1 次提交
  8. 31 3月, 2011 1 次提交
  9. 28 3月, 2011 1 次提交
  10. 28 2月, 2011 1 次提交
  11. 07 1月, 2011 1 次提交
  12. 28 12月, 2010 1 次提交
  13. 08 12月, 2010 1 次提交
  14. 03 12月, 2010 1 次提交
  15. 01 12月, 2010 1 次提交
    • I
      6985015: C1 needs to support compressed oops · 7e8f9e32
      iveresov 提交于
      Summary: This change implements compressed oops for C1 for x64 and sparc. The changes are mostly on the codegen level, with a few exceptions when we do access things outside of the heap that are uncompressed from the IR. Compressed oops are now also enabled with tiered.
      Reviewed-by: twisti, kvn, never, phh
      7e8f9e32
  16. 24 11月, 2010 1 次提交
  17. 13 10月, 2010 1 次提交
    • I
      6991512: G1 barriers fail with 64bit C1 · b72f3305
      iveresov 提交于
      Summary: Fix compare-and-swap intrinsic problem with G1 post-barriers and issue with branch ranges in G1 stubs on sparc
      Reviewed-by: never, kvn
      b72f3305
  18. 06 10月, 2010 1 次提交
  19. 01 10月, 2010 1 次提交
  20. 14 9月, 2010 1 次提交
  21. 12 9月, 2010 1 次提交
  22. 04 9月, 2010 1 次提交
    • I
      6953144: Tiered compilation · d2bc8599
      iveresov 提交于
      Summary: Infrastructure for tiered compilation support (interpreter + c1 + c2) for 32 and 64 bit. Simple tiered policy implementation.
      Reviewed-by: kvn, never, phh, twisti
      d2bc8599
  23. 28 5月, 2010 2 次提交
  24. 21 5月, 2010 1 次提交
  25. 28 4月, 2010 1 次提交
    • I
      6946892: c1 shouldn't sign-extend to upper 32bits on x64 · d7df102a
      iveresov 提交于
      Summary: c1 does sign-extension when it loads ints and shorts from memory to 64-bit registers. This causes problems for c2 because it relies on the fact the int passed in a 64-bit register is zero-extended.
      Reviewed-by: never
      d7df102a
  26. 16 4月, 2010 1 次提交
  27. 09 4月, 2010 1 次提交
    • I
      6942223: c1 64 bit fixes · f06b82f4
      iveresov 提交于
      Summary: This fixes lir_cmp_l2i on x64 and sparc 64bit, and the debug info generation.
      Reviewed-by: never
      f06b82f4
  28. 17 3月, 2010 1 次提交
  29. 05 3月, 2010 1 次提交
  30. 10 3月, 2010 1 次提交
  31. 08 2月, 2010 1 次提交
  32. 02 2月, 2010 3 次提交
  33. 30 1月, 2010 1 次提交
  34. 29 1月, 2010 1 次提交
    • T
      6917766: JSR 292 needs its own deopt handler · f3f7a33e
      twisti 提交于
      Summary: We need to introduce a new MH deopt handler so we can easily determine if the deopt happened at a MH call site or not.
      Reviewed-by: never, jrose
      f3f7a33e
  35. 02 11月, 2009 1 次提交
  36. 12 10月, 2009 1 次提交
  37. 16 9月, 2009 1 次提交