Reviewed-by: never, kvn
Contributed-by: NAndreas Schoesser <andreas.schoesser@sap.com>

Reviewed-by: kvn, never

Reviewed-by: never, kvn

Reviewed-by: iveresov, kvn

Reviewed-by: never, bdelsart

Summary: Avoid CMove in a loop if possible. May generate CMove if it could be moved outside a loop.
Reviewed-by: never

Reviewed-by: kvn, never, jrose

Summary: replace the call to memmove by a simple copy loop
Reviewed-by: dholmes, kvn, never
Contributed-by: axel.siebenborn@sap.com, volker.simonis@gmail.com

Summary: Instruction countTrailingZerosL() should use iRegIsafe dst register since it is used in long arithmetic.
Reviewed-by: never, twisti

Summary: Integrate bsd-port/hotspot and macosx-port/hotspot changes as of 2011.09.29.
Reviewed-by: kvn, dholmes, never, phh
Contributed-by: NChristos Zoulas &lt;christos@zoulas.com&gt;, Greg Lewis &lt;glewis@eyesbeyond.com&gt;, Kurt Miller &lt;kurt@intricatesoftware.com&gt;, Alexander Strange &lt;astrange@apple.com&gt;, Mike Swingler &lt;swingler@apple.com&gt;, Roger Hoover &lt;rhoover@apple.com&gt;, Victor Hernandez &lt;vhernandez@apple.com&gt;, Pratik Solanki <psolanki@apple.com>

Reviewed-by: never, bdelsart

Summary: Don't zero new typeArray during runtime call if the allocation is followed by arraycopy into it.
Reviewed-by: twisti

Reviewed-by: kvn, twisti, jrose
Contributed-by: NKurt Miller &lt;kurt@intricatesoftware.com&gt;, Greg Lewis &lt;glewis@eyesbeyond.com&gt;, Jung-uk Kim &lt;jkim@freebsd.org&gt;, Christos Zoulas &lt;christos@zoulas.com&gt;, Landon Fuller &lt;landonf@plausible.coop&gt;, The FreeBSD Foundation &lt;board@freebsdfoundation.org&gt;, Michael Franz &lt;mvfranz@gmail.com&gt;, Roger Hoover &lt;rhoover@apple.com&gt;, Alexander Strange <astrange@apple.com>

Summary: Turn on aastore profiling
Reviewed-by: jrose, twisti

Reviewed-by: jrose, twisti, kvn, coleenp

Reviewed-by: kvn, twisti

Summary: changes necessary for some JSR292 ports
Reviewed-by: jrose, dholmes

Reviewed-by: kvn

Reviewed-by: twisti, roland, kvn, iveresov

Summary: Use BIS and prefetch in arraycopy stubs for Sparc (BIS for T4 only).
Reviewed-by: never, iveresov

Reviewed-by: iveresov, kvn

Summary: Remove the macro assembler routine br_on_reg_cond() and replace the remaining calls to that routine with an equivalent.
Reviewed-by: kvn, iveresov

Summary: Replace set() with patchable_set() to generate 8 instructions always.
Reviewed-by: iveresov, never, roland

Summary: Use BIS for zeroing new allocated big (2Kb and more) objects and arrays.
Reviewed-by: never, twisti, ysr

Summary: fix assert, prefetchnta is supported since SSE not SSE2.
Reviewed-by: never

Reviewed-by: never, kvn

Reviewed-by: kvn, iveresov, never

Summary: on T4 2 BIS instructions should be issued to prefetch 64 bytes
Reviewed-by: iveresov, phh, twisti

Reviewed-by: kvn, never, bdelsart

Summary: Use new short branch instruction in C2 generated code.
Reviewed-by: never

Summary: replace MemBarAcquire/MemBarRelease nodes on the monitor enter/exit code paths with new MemBarAcquireLock/MemBarReleaseLock nodes
Reviewed-by: kvn, twisti

Reviewed-by: kvn, twisti

Reviewed-by: gbenson, twisti
Contributed-by: NChris Phillips <chphilli@redhat.com>

Reviewed-by: jrose, twisti
Contributed-by: NXerxes Ranby <xerxes@zafena.se>

Summary: Remove flags which duplicate information in Node::NodeClasses.
Reviewed-by: never

Summary: Add new short branch instruction to Hotspot sparc assembler.
Reviewed-by: never, twisti, jrose

Summary: check for single stepping when dispatching invokes from method handles
Reviewed-by: coleenp, twisti, kvn, dsamersoff

Summary: Use new VIS3 mov instructions on T4 for move data between general and float registers.
Reviewed-by: never, twisti

Summary: correct Icache::line_size for x64 and add verification code into vm_version_x86.
Reviewed-by: never, phh

Reviewed-by: never