Summary: Use new nodes for loadFence/storeFence intrinsics in C2.
Reviewed-by: kvn, dholmes

Summary: added ability in C2 to expand mach nodes to several mach nodes after register allocation
Reviewed-by: kvn

Summary: String.equals() intrinsic shouldn't use integer length input in pointer arithmetic without an i2l.
Reviewed-by: kvn, twisti

Summary: Allocate compressed class space at end of Java heap.  For small heap sizes, without CDS, save some space so compressed classes can have the same favorable compression as oops
Reviewed-by: stefank, hseigel, goetz

Reviewed-by: kvn, twisti

Reviewed-by: kvn, twisti

Summary: On PPC, the first 13 floating point arguments to C calls are passed in floating point registers. Also, all but the first 8 arguments are passed on the stack. So there can be floating point arguments that are passed on the stack and in a register. We duplicate the regs datastructure in c_calling_convention() to represent this.
Reviewed-by: kvn, cjplummer

8016729: ObjectAlignmentInBytes=16 now forces the use of heap based compressed oops
8005933: The -Xshare:auto option is ignored for -server
Summary: Move klass metaspace above the heap and support CDS with compressed klass ptrs.
Reviewed-by: coleenp, kvn, mgerdin, tschatzl, stefank

Reviewed-by: coleenp, mgerdin, hseigel

Summary: Removed most of the SPARC V8 instructions
Reviewed-by: kvn, twisti

Summary: refactored code to allow platform-specific differences
Reviewed-by: dlong, twisti
Contributed-by: NGoetz Lindenmaier <goetz.lindenmaier@sap.com>

Summary: Repair wrong code generation, added new matching rule
Reviewed-by: kvn, twisti

Reviewed-by: kvn, twisti
Contributed-by: NRichard Reingruber <richard.reingruber@sap.com>

Summary: Removed LoadUI2L node from Ideal nodes, use match rule in .ad files instead.
Reviewed-by: kvn

Summary: support of compress class pointers in the compilers.
Reviewed-by: kvn, twisti

Summary: Add generation of vectors for scalar shift count.
Reviewed-by: roland, twisti, dlong

Summary: Remove PermGen, allocate meta-data in metaspace linked to class loaders, rewrite GC walking, rewrite and rename metadata to be C++ classes
Reviewed-by: jmasa, stefank, never, coleenp, kvn, brutisso, mgerdin, dholmes, jrose, twisti, roland
Contributed-by: Njmasa &lt;jon.masamitsu@oracle.com&gt;, stefank &lt;stefan.karlsson@oracle.com&gt;, mgerdin &lt;mikael.gerdin@oracle.com&gt;, never <tom.rodriguez@oracle.com>

Summary: Increase vector size up to 256-bits for YMM AVX registers on x86.
Reviewed-by: never, twisti, roland

Reviewed-by: kvn, twisti
Contributed-by: NKrystal Mok <sajia@taobao.com>

Summary: use shorter instruction sequences for atomic add and atomic exchange when possible.
Reviewed-by: kvn, jrose

Reviewed-by: kvn, never
Contributed-by: nils.eliasson@oracle.com

Summary: Nested locks elimination done before lock nodes expansion by looking for outer locks of the same object.
Reviewed-by: never, twisti

Summary: Change yank_if_dead() to recursive method to remove all dead inputs.
Reviewed-by: never

Summary: adds store store barrier after initialization of header and body of objects.
Reviewed-by: never, kvn

Summary: allow reg_class definition as a function.
Reviewed-by: kvn, never

Summary: Avoid CMove in a loop if possible. May generate CMove if it could be moved outside a loop.
Reviewed-by: never

Summary: Instruction countTrailingZerosL() should use iRegIsafe dst register since it is used in long arithmetic.
Reviewed-by: never, twisti

Reviewed-by: kvn, never, bdelsart

Summary: Replace set() with patchable_set() to generate 8 instructions always.
Reviewed-by: iveresov, never, roland

Summary: Use BIS for zeroing new allocated big (2Kb and more) objects and arrays.
Reviewed-by: never, twisti, ysr

Reviewed-by: never, kvn

Summary: on T4 2 BIS instructions should be issued to prefetch 64 bytes
Reviewed-by: iveresov, phh, twisti

Summary: Use new short branch instruction in C2 generated code.
Reviewed-by: never

Summary: replace MemBarAcquire/MemBarRelease nodes on the monitor enter/exit code paths with new MemBarAcquireLock/MemBarReleaseLock nodes
Reviewed-by: kvn, twisti

Summary: Remove flags which duplicate information in Node::NodeClasses.
Reviewed-by: never

Summary: Add new short branch instruction to Hotspot sparc assembler.
Reviewed-by: never, twisti, jrose

Summary: Use new VIS3 mov instructions on T4 for move data between general and float registers.
Reviewed-by: never, twisti

Summary: Enables cross building of a c2 VM. Support masking of shift counts when the processor architecture mandates it.
Reviewed-by: kvn, never

Summary: Add TEMP edges (and KILL projections) before duplicated operands are removed in Expand() methods.
Reviewed-by: never

Summary: Make both compilers emit near and far calls when necessary.
Reviewed-by: never, kvn, phh