Reviewed-by: kvn, vlivanov, dlong, rhalade, mschoene, iignatyev

Summary: Instead of 'fpclass', use cast float->int and double->long to check if value is +0.0f and +0.0d, respectively.
Reviewed-by: kvn, simonis, dlong

Summary: Provide promoted stack slots for floating-point registers in the SPARC c_calling_convention.
Reviewed-by: kvn, jrose, drchase

Summary: Provide promoted stack slots for floating-point registers in the SPARC c_calling_convention.
Reviewed-by: kvn, jrose, drchase

8029443: 'assert(klass->is_loader_alive(_is_alive)) failed: must be alive' during VM_CollectForMetadataAllocation
Summary: Added missing metadata relocation to 'loadConP_no_oop_cheap' on Sparc if the pointer is referring to a Klass. Added jtreg test.
Reviewed-by: kvn

Summary: Check for failed expansion of stub section in code buffer and bailout.
Reviewed-by: kvn, thartmann

Summary: make compiled code bang the stack by the worst case size of the interpreter frame at deoptimization points.
Reviewed-by: twisti, kvn

Summary: Insert a nop between cbcond and CTI
Reviewed-by: kvn, twisti

Summary: Take into account space needed for "trampoline code" used by calls on PPC64.
Reviewed-by: kvn
Contributed-by: lutz.schmidt@sap.com

Reviewed-by: kvn, iveresov

Summary: Restrict loadI2L_imm optimizations to positive values of mask
Reviewed-by: kvn, dlong

Summary: Fix the sizing of loadUS2L_immI16 and loadI2L_immI
Reviewed-by: kvn, azeemj

Summary: Add intrinsics/stub routines support for single-block and multi-block (as used by Cipher Block Chaining mode) AES encryption and decryption operations on the SPARC platform.
Reviewed-by: kvn, roland
Contributed-by: shrinivas.joshi@oracle.com

8029668: Kithcensink crashed with guarantee(Assembler::is_simm13(disp)) failed: Do not match large constant offsets
Summary: Bailout if we try to reference a stack location that we can't encode
Reviewed-by: kvn, twisti

Summary: Use new nodes for loadFence/storeFence intrinsics in C2.
Reviewed-by: kvn, dholmes

Summary: added ability in C2 to expand mach nodes to several mach nodes after register allocation
Reviewed-by: kvn

Summary: String.equals() intrinsic shouldn't use integer length input in pointer arithmetic without an i2l.
Reviewed-by: kvn, twisti

Summary: Allocate compressed class space at end of Java heap.  For small heap sizes, without CDS, save some space so compressed classes can have the same favorable compression as oops
Reviewed-by: stefank, hseigel, goetz

Reviewed-by: kvn, twisti

Reviewed-by: kvn, twisti

Summary: On PPC, the first 13 floating point arguments to C calls are passed in floating point registers. Also, all but the first 8 arguments are passed on the stack. So there can be floating point arguments that are passed on the stack and in a register. We duplicate the regs datastructure in c_calling_convention() to represent this.
Reviewed-by: kvn, cjplummer

8016729: ObjectAlignmentInBytes=16 now forces the use of heap based compressed oops
8005933: The -Xshare:auto option is ignored for -server
Summary: Move klass metaspace above the heap and support CDS with compressed klass ptrs.
Reviewed-by: coleenp, kvn, mgerdin, tschatzl, stefank

Reviewed-by: coleenp, mgerdin, hseigel

Summary: Removed most of the SPARC V8 instructions
Reviewed-by: kvn, twisti

Summary: refactored code to allow platform-specific differences
Reviewed-by: dlong, twisti
Contributed-by: NGoetz Lindenmaier <goetz.lindenmaier@sap.com>

Summary: Repair wrong code generation, added new matching rule
Reviewed-by: kvn, twisti

Reviewed-by: kvn, twisti
Contributed-by: NRichard Reingruber <richard.reingruber@sap.com>

Summary: Removed LoadUI2L node from Ideal nodes, use match rule in .ad files instead.
Reviewed-by: kvn

Summary: support of compress class pointers in the compilers.
Reviewed-by: kvn, twisti

Summary: Add generation of vectors for scalar shift count.
Reviewed-by: roland, twisti, dlong

Summary: Remove PermGen, allocate meta-data in metaspace linked to class loaders, rewrite GC walking, rewrite and rename metadata to be C++ classes
Reviewed-by: jmasa, stefank, never, coleenp, kvn, brutisso, mgerdin, dholmes, jrose, twisti, roland
Contributed-by: Njmasa &lt;jon.masamitsu@oracle.com&gt;, stefank &lt;stefan.karlsson@oracle.com&gt;, mgerdin &lt;mikael.gerdin@oracle.com&gt;, never <tom.rodriguez@oracle.com>

Summary: Increase vector size up to 256-bits for YMM AVX registers on x86.
Reviewed-by: never, twisti, roland

Reviewed-by: kvn, twisti
Contributed-by: NKrystal Mok <sajia@taobao.com>

Summary: use shorter instruction sequences for atomic add and atomic exchange when possible.
Reviewed-by: kvn, jrose

Reviewed-by: kvn, never
Contributed-by: nils.eliasson@oracle.com

Summary: Nested locks elimination done before lock nodes expansion by looking for outer locks of the same object.
Reviewed-by: never, twisti

Summary: Change yank_if_dead() to recursive method to remove all dead inputs.
Reviewed-by: never

Summary: adds store store barrier after initialization of header and body of objects.
Reviewed-by: never, kvn

Summary: allow reg_class definition as a function.
Reviewed-by: kvn, never

Summary: Avoid CMove in a loop if possible. May generate CMove if it could be moved outside a loop.
Reviewed-by: never