提交 9a98ce3b 编写于 作者: A adlertz

8023691: Create interface for nodes in class Block

Summary: Create public methods for accessing the nodes in a block
Reviewed-by: kvn, roland
上级 e8a91c76
......@@ -1095,7 +1095,7 @@ static void check_peepmatch_instruction_sequence(FILE *fp, PeepMatch *pmatch, Pe
fprintf(fp, " // Identify previous instruction if inside this block\n");
fprintf(fp, " if( ");
print_block_index(fp, inst_position);
fprintf(fp, " > 0 ) {\n Node *n = block->_nodes.at(");
fprintf(fp, " > 0 ) {\n Node *n = block->get_node(");
print_block_index(fp, inst_position);
fprintf(fp, ");\n inst%d = (n->is_Mach()) ? ", inst_position);
fprintf(fp, "n->as_Mach() : NULL;\n }\n");
......
......@@ -112,9 +112,9 @@ uint Block::compute_loop_alignment() {
// exceeds OptoLoopAlignment.
uint Block::compute_first_inst_size(uint& sum_size, uint inst_cnt,
PhaseRegAlloc* ra) {
uint last_inst = _nodes.size();
uint last_inst = number_of_nodes();
for( uint j = 0; j < last_inst && inst_cnt > 0; j++ ) {
uint inst_size = _nodes[j]->size(ra);
uint inst_size = get_node(j)->size(ra);
if( inst_size > 0 ) {
inst_cnt--;
uint sz = sum_size + inst_size;
......@@ -131,8 +131,8 @@ uint Block::compute_first_inst_size(uint& sum_size, uint inst_cnt,
}
uint Block::find_node( const Node *n ) const {
for( uint i = 0; i < _nodes.size(); i++ ) {
if( _nodes[i] == n )
for( uint i = 0; i < number_of_nodes(); i++ ) {
if( get_node(i) == n )
return i;
}
ShouldNotReachHere();
......@@ -141,7 +141,7 @@ uint Block::find_node( const Node *n ) const {
// Find and remove n from block list
void Block::find_remove( const Node *n ) {
_nodes.remove(find_node(n));
remove_node(find_node(n));
}
// Return empty status of a block. Empty blocks contain only the head, other
......@@ -154,10 +154,10 @@ int Block::is_Empty() const {
}
int success_result = completely_empty;
int end_idx = _nodes.size()-1;
int end_idx = number_of_nodes() - 1;
// Check for ending goto
if ((end_idx > 0) && (_nodes[end_idx]->is_MachGoto())) {
if ((end_idx > 0) && (get_node(end_idx)->is_MachGoto())) {
success_result = empty_with_goto;
end_idx--;
}
......@@ -170,7 +170,7 @@ int Block::is_Empty() const {
// Ideal nodes are allowable in empty blocks: skip them Only MachNodes
// turn directly into code, because only MachNodes have non-trivial
// emit() functions.
while ((end_idx > 0) && !_nodes[end_idx]->is_Mach()) {
while ((end_idx > 0) && !get_node(end_idx)->is_Mach()) {
end_idx--;
}
......@@ -344,8 +344,8 @@ void Block::dump() const {
void Block::dump(const PhaseCFG* cfg) const {
dump_head(cfg);
for (uint i=0; i< _nodes.size(); i++) {
_nodes[i]->dump();
for (uint i=0; i< number_of_nodes(); i++) {
get_node(i)->dump();
}
tty->print("\n");
}
......@@ -434,7 +434,7 @@ uint PhaseCFG::build_cfg() {
map_node_to_block(p, bb);
map_node_to_block(x, bb);
if( x != p ) { // Only for root is x == p
bb->_nodes.push((Node*)x);
bb->push_node((Node*)x);
}
// Now handle predecessors
++sum; // Count 1 for self block
......@@ -469,11 +469,11 @@ uint PhaseCFG::build_cfg() {
assert( x != proj, "" );
// Map basic block of projection
map_node_to_block(proj, pb);
pb->_nodes.push(proj);
pb->push_node(proj);
}
// Insert self as a child of my predecessor block
pb->_succs.map(pb->_num_succs++, get_block_for_node(np));
assert( pb->_nodes[ pb->_nodes.size() - pb->_num_succs ]->is_block_proj(),
assert( pb->get_node(pb->number_of_nodes() - pb->_num_succs)->is_block_proj(),
"too many control users, not a CFG?" );
}
}
......@@ -495,7 +495,7 @@ void PhaseCFG::insert_goto_at(uint block_no, uint succ_no) {
// surrounding blocks.
float freq = in->_freq * in->succ_prob(succ_no);
// get ProjNode corresponding to the succ_no'th successor of the in block
ProjNode* proj = in->_nodes[in->_nodes.size() - in->_num_succs + succ_no]->as_Proj();
ProjNode* proj = in->get_node(in->number_of_nodes() - in->_num_succs + succ_no)->as_Proj();
// create region for basic block
RegionNode* region = new (C) RegionNode(2);
region->init_req(1, proj);
......@@ -507,7 +507,7 @@ void PhaseCFG::insert_goto_at(uint block_no, uint succ_no) {
Node* gto = _goto->clone(); // get a new goto node
gto->set_req(0, region);
// add it to the basic block
block->_nodes.push(gto);
block->push_node(gto);
map_node_to_block(gto, block);
C->regalloc()->set_bad(gto->_idx);
// hook up successor block
......@@ -527,9 +527,9 @@ void PhaseCFG::insert_goto_at(uint block_no, uint succ_no) {
// Does this block end in a multiway branch that cannot have the default case
// flipped for another case?
static bool no_flip_branch( Block *b ) {
int branch_idx = b->_nodes.size() - b->_num_succs-1;
int branch_idx = b->number_of_nodes() - b->_num_succs-1;
if( branch_idx < 1 ) return false;
Node *bra = b->_nodes[branch_idx];
Node *bra = b->get_node(branch_idx);
if( bra->is_Catch() )
return true;
if( bra->is_Mach() ) {
......@@ -550,16 +550,16 @@ static bool no_flip_branch( Block *b ) {
void PhaseCFG::convert_NeverBranch_to_Goto(Block *b) {
// Find true target
int end_idx = b->end_idx();
int idx = b->_nodes[end_idx+1]->as_Proj()->_con;
int idx = b->get_node(end_idx+1)->as_Proj()->_con;
Block *succ = b->_succs[idx];
Node* gto = _goto->clone(); // get a new goto node
gto->set_req(0, b->head());
Node *bp = b->_nodes[end_idx];
b->_nodes.map(end_idx,gto); // Slam over NeverBranch
Node *bp = b->get_node(end_idx);
b->map_node(gto, end_idx); // Slam over NeverBranch
map_node_to_block(gto, b);
C->regalloc()->set_bad(gto->_idx);
b->_nodes.pop(); // Yank projections
b->_nodes.pop(); // Yank projections
b->pop_node(); // Yank projections
b->pop_node(); // Yank projections
b->_succs.map(0,succ); // Map only successor
b->_num_succs = 1;
// remap successor's predecessors if necessary
......@@ -575,8 +575,8 @@ void PhaseCFG::convert_NeverBranch_to_Goto(Block *b) {
// Scan through block, yanking dead path from
// all regions and phis.
dead->head()->del_req(j);
for( int k = 1; dead->_nodes[k]->is_Phi(); k++ )
dead->_nodes[k]->del_req(j);
for( int k = 1; dead->get_node(k)->is_Phi(); k++ )
dead->get_node(k)->del_req(j);
}
// Helper function to move block bx to the slot following b_index. Return
......@@ -620,7 +620,7 @@ void PhaseCFG::move_to_end(Block *b, uint i) {
if (e != Block::not_empty) {
if (e == Block::empty_with_goto) {
// Remove the goto, but leave the block.
b->_nodes.pop();
b->pop_node();
}
// Mark this block as a connector block, which will cause it to be
// ignored in certain functions such as non_connector_successor().
......@@ -663,7 +663,7 @@ void PhaseCFG::remove_empty_blocks() {
// to give a fake exit path to infinite loops. At this late stage they
// need to turn into Goto's so that when you enter the infinite loop you
// indeed hang.
if (block->_nodes[block->end_idx()]->Opcode() == Op_NeverBranch) {
if (block->get_node(block->end_idx())->Opcode() == Op_NeverBranch) {
convert_NeverBranch_to_Goto(block);
}
......@@ -720,9 +720,9 @@ void PhaseCFG::fixup_flow() {
// exchange the true and false targets.
if (no_flip_branch(block)) {
// Find fall through case - if must fall into its target
int branch_idx = block->_nodes.size() - block->_num_succs;
int branch_idx = block->number_of_nodes() - block->_num_succs;
for (uint j2 = 0; j2 < block->_num_succs; j2++) {
const ProjNode* p = block->_nodes[branch_idx + j2]->as_Proj();
const ProjNode* p = block->get_node(branch_idx + j2)->as_Proj();
if (p->_con == 0) {
// successor j2 is fall through case
if (block->non_connector_successor(j2) != bnext) {
......@@ -743,14 +743,14 @@ void PhaseCFG::fixup_flow() {
// Remove all CatchProjs
for (uint j = 0; j < block->_num_succs; j++) {
block->_nodes.pop();
block->pop_node();
}
} else if (block->_num_succs == 1) {
// Block ends in a Goto?
if (bnext == bs0) {
// We fall into next block; remove the Goto
block->_nodes.pop();
block->pop_node();
}
} else if(block->_num_succs == 2) { // Block ends in a If?
......@@ -759,9 +759,9 @@ void PhaseCFG::fixup_flow() {
// be projections (in any order), the 3rd last node must be
// the IfNode (we have excluded other 2-way exits such as
// CatchNodes already).
MachNode* iff = block->_nodes[block->_nodes.size() - 3]->as_Mach();
ProjNode* proj0 = block->_nodes[block->_nodes.size() - 2]->as_Proj();
ProjNode* proj1 = block->_nodes[block->_nodes.size() - 1]->as_Proj();
MachNode* iff = block->get_node(block->number_of_nodes() - 3)->as_Mach();
ProjNode* proj0 = block->get_node(block->number_of_nodes() - 2)->as_Proj();
ProjNode* proj1 = block->get_node(block->number_of_nodes() - 1)->as_Proj();
// Assert that proj0 and succs[0] match up. Similarly for proj1 and succs[1].
assert(proj0->raw_out(0) == block->_succs[0]->head(), "Mismatch successor 0");
......@@ -833,8 +833,8 @@ void PhaseCFG::fixup_flow() {
iff->as_MachIf()->negate();
}
block->_nodes.pop(); // Remove IfFalse & IfTrue projections
block->_nodes.pop();
block->pop_node(); // Remove IfFalse & IfTrue projections
block->pop_node();
} else {
// Multi-exit block, e.g. a switch statement
......@@ -895,13 +895,13 @@ void PhaseCFG::verify() const {
// Verify sane CFG
for (uint i = 0; i < number_of_blocks(); i++) {
Block* block = get_block(i);
uint cnt = block->_nodes.size();
uint cnt = block->number_of_nodes();
uint j;
for (j = 0; j < cnt; j++) {
Node *n = block->_nodes[j];
Node *n = block->get_node(j);
assert(get_block_for_node(n) == block, "");
if (j >= 1 && n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_CreateEx) {
assert(j == 1 || block->_nodes[j-1]->is_Phi(), "CreateEx must be first instruction in block");
assert(j == 1 || block->get_node(j-1)->is_Phi(), "CreateEx must be first instruction in block");
}
for (uint k = 0; k < n->req(); k++) {
Node *def = n->in(k);
......@@ -930,14 +930,14 @@ void PhaseCFG::verify() const {
}
j = block->end_idx();
Node* bp = (Node*)block->_nodes[block->_nodes.size() - 1]->is_block_proj();
Node* bp = (Node*)block->get_node(block->number_of_nodes() - 1)->is_block_proj();
assert(bp, "last instruction must be a block proj");
assert(bp == block->_nodes[j], "wrong number of successors for this block");
assert(bp == block->get_node(j), "wrong number of successors for this block");
if (bp->is_Catch()) {
while (block->_nodes[--j]->is_MachProj()) {
while (block->get_node(--j)->is_MachProj()) {
;
}
assert(block->_nodes[j]->is_MachCall(), "CatchProj must follow call");
assert(block->get_node(j)->is_MachCall(), "CatchProj must follow call");
} else if (bp->is_Mach() && bp->as_Mach()->ideal_Opcode() == Op_If) {
assert(block->_num_succs == 2, "Conditional branch must have two targets");
}
......@@ -1440,9 +1440,9 @@ void Trace::fixup_blocks(PhaseCFG &cfg) {
Block *bnext = next(b);
Block *bs0 = b->non_connector_successor(0);
MachNode *iff = b->_nodes[b->_nodes.size()-3]->as_Mach();
ProjNode *proj0 = b->_nodes[b->_nodes.size()-2]->as_Proj();
ProjNode *proj1 = b->_nodes[b->_nodes.size()-1]->as_Proj();
MachNode *iff = b->get_node(b->number_of_nodes() - 3)->as_Mach();
ProjNode *proj0 = b->get_node(b->number_of_nodes() - 2)->as_Proj();
ProjNode *proj1 = b->get_node(b->number_of_nodes() - 1)->as_Proj();
if (bnext == bs0) {
// Fall-thru case in succs[0], should be in succs[1]
......@@ -1454,8 +1454,8 @@ void Trace::fixup_blocks(PhaseCFG &cfg) {
b->_succs.map( 1, tbs0 );
// Flip projections to match targets
b->_nodes.map(b->_nodes.size()-2, proj1);
b->_nodes.map(b->_nodes.size()-1, proj0);
b->map_node(proj1, b->number_of_nodes() - 2);
b->map_node(proj0, b->number_of_nodes() - 1);
}
}
}
......
......@@ -105,15 +105,53 @@ class CFGElement : public ResourceObj {
// any optimization pass. They are created late in the game.
class Block : public CFGElement {
friend class VMStructs;
public:
private:
// Nodes in this block, in order
Node_List _nodes;
public:
// Get the node at index 'at_index', if 'at_index' is out of bounds return NULL
Node* get_node(uint at_index) const {
return _nodes[at_index];
}
// Get the number of nodes in this block
uint number_of_nodes() const {
return _nodes.size();
}
// Map a node 'node' to index 'to_index' in the block, if the index is out of bounds the size of the node list is increased
void map_node(Node* node, uint to_index) {
_nodes.map(to_index, node);
}
// Insert a node 'node' at index 'at_index', moving all nodes that are on a higher index one step, if 'at_index' is out of bounds we crash
void insert_node(Node* node, uint at_index) {
_nodes.insert(at_index, node);
}
// Remove a node at index 'at_index'
void remove_node(uint at_index) {
_nodes.remove(at_index);
}
// Push a node 'node' onto the node list
void push_node(Node* node) {
_nodes.push(node);
}
// Pop the last node off the node list
Node* pop_node() {
return _nodes.pop();
}
// Basic blocks have a Node which defines Control for all Nodes pinned in
// this block. This Node is a RegionNode. Exception-causing Nodes
// (division, subroutines) and Phi functions are always pinned. Later,
// every Node will get pinned to some block.
Node *head() const { return _nodes[0]; }
Node *head() const { return get_node(0); }
// CAUTION: num_preds() is ONE based, so that predecessor numbers match
// input edges to Regions and Phis.
......@@ -274,7 +312,7 @@ class Block : public CFGElement {
// Add an instruction to an existing block. It must go after the head
// instruction and before the end instruction.
void add_inst( Node *n ) { _nodes.insert(end_idx(),n); }
void add_inst( Node *n ) { insert_node(n, end_idx()); }
// Find node in block
uint find_node( const Node *n ) const;
// Find and remove n from block list
......@@ -550,7 +588,7 @@ class PhaseCFG : public Phase {
// Insert a node into a block at index and map the node to the block
void insert(Block *b, uint idx, Node *n) {
b->_nodes.insert( idx, n );
b->insert_node(n , idx);
map_node_to_block(n, b);
}
......
......@@ -121,8 +121,8 @@ struct OopFlow : public ResourceObj {
// Given reaching-defs for this block start, compute it for this block end
void OopFlow::compute_reach( PhaseRegAlloc *regalloc, int max_reg, Dict *safehash ) {
for( uint i=0; i<_b->_nodes.size(); i++ ) {
Node *n = _b->_nodes[i];
for( uint i=0; i<_b->number_of_nodes(); i++ ) {
Node *n = _b->get_node(i);
if( n->jvms() ) { // Build an OopMap here?
JVMState *jvms = n->jvms();
......@@ -447,8 +447,8 @@ static void do_liveness(PhaseRegAlloc* regalloc, PhaseCFG* cfg, Block_List* work
}
// Now walk tmp_live up the block backwards, computing live
for( int k=b->_nodes.size()-1; k>=0; k-- ) {
Node *n = b->_nodes[k];
for( int k=b->number_of_nodes()-1; k>=0; k-- ) {
Node *n = b->get_node(k);
// KILL def'd bits
int first = regalloc->get_reg_first(n);
int second = regalloc->get_reg_second(n);
......@@ -544,12 +544,12 @@ static void do_liveness(PhaseRegAlloc* regalloc, PhaseCFG* cfg, Block_List* work
for (i = 1; i < cfg->number_of_blocks(); i++) {
Block* block = cfg->get_block(i);
uint j;
for (j = 1; j < block->_nodes.size(); j++) {
if (block->_nodes[j]->jvms() && (*safehash)[block->_nodes[j]] == NULL) {
for (j = 1; j < block->number_of_nodes(); j++) {
if (block->get_node(j)->jvms() && (*safehash)[block->get_node(j)] == NULL) {
break;
}
}
if (j < block->_nodes.size()) {
if (j < block->number_of_nodes()) {
break;
}
}
......
......@@ -301,7 +301,7 @@ int PhaseChaitin::clone_projs(Block* b, uint idx, Node* orig, Node* copy, uint&
// Copy kill projections after the cloned node
Node* kills = proj->clone();
kills->set_req(0, copy);
b->_nodes.insert(idx++, kills);
b->insert_node(kills, idx++);
_cfg.map_node_to_block(kills, b);
new_lrg(kills, max_lrg_id++);
}
......@@ -682,11 +682,11 @@ void PhaseChaitin::de_ssa() {
uint lr_counter = 1;
for( uint i = 0; i < _cfg.number_of_blocks(); i++ ) {
Block* block = _cfg.get_block(i);
uint cnt = block->_nodes.size();
uint cnt = block->number_of_nodes();
// Handle all the normal Nodes in the block
for( uint j = 0; j < cnt; j++ ) {
Node *n = block->_nodes[j];
Node *n = block->get_node(j);
// Pre-color to the zero live range, or pick virtual register
const RegMask &rm = n->out_RegMask();
_lrg_map.map(n->_idx, rm.is_NotEmpty() ? lr_counter++ : 0);
......@@ -710,8 +710,8 @@ void PhaseChaitin::gather_lrg_masks( bool after_aggressive ) {
Block* block = _cfg.get_block(i);
// For all instructions
for (uint j = 1; j < block->_nodes.size(); j++) {
Node* n = block->_nodes[j];
for (uint j = 1; j < block->number_of_nodes(); j++) {
Node* n = block->get_node(j);
uint input_edge_start =1; // Skip control most nodes
if (n->is_Mach()) {
input_edge_start = n->as_Mach()->oper_input_base();
......@@ -1604,7 +1604,7 @@ void PhaseChaitin::fixup_spills() {
// For all instructions in block
uint last_inst = block->end_idx();
for (uint j = 1; j <= last_inst; j++) {
Node* n = block->_nodes[j];
Node* n = block->get_node(j);
// Dead instruction???
assert( n->outcnt() != 0 ||// Nothing dead after post alloc
......@@ -1641,7 +1641,7 @@ void PhaseChaitin::fixup_spills() {
assert( cisc->oper_input_base() == 2, "Only adding one edge");
cisc->ins_req(1,src); // Requires a memory edge
}
block->_nodes.map(j,cisc); // Insert into basic block
block->map_node(cisc, j); // Insert into basic block
n->subsume_by(cisc, C); // Correct graph
//
++_used_cisc_instructions;
......@@ -1698,7 +1698,7 @@ Node *PhaseChaitin::find_base_for_derived( Node **derived_base_map, Node *derive
// (where top() node is placed).
base->init_req(0, _cfg.get_root_node());
Block *startb = _cfg.get_block_for_node(C->top());
startb->_nodes.insert(startb->find_node(C->top()), base );
startb->insert_node(base, startb->find_node(C->top()));
_cfg.map_node_to_block(base, startb);
assert(_lrg_map.live_range_id(base) == 0, "should not have LRG yet");
}
......@@ -1743,9 +1743,9 @@ Node *PhaseChaitin::find_base_for_derived( Node **derived_base_map, Node *derive
// Search the current block for an existing base-Phi
Block *b = _cfg.get_block_for_node(derived);
for( i = 1; i <= b->end_idx(); i++ ) {// Search for matching Phi
Node *phi = b->_nodes[i];
Node *phi = b->get_node(i);
if( !phi->is_Phi() ) { // Found end of Phis with no match?
b->_nodes.insert( i, base ); // Must insert created Phi here as base
b->insert_node(base, i); // Must insert created Phi here as base
_cfg.map_node_to_block(base, b);
new_lrg(base,maxlrg++);
break;
......@@ -1786,7 +1786,7 @@ bool PhaseChaitin::stretch_base_pointer_live_ranges(ResourceArea *a) {
IndexSet liveout(_live->live(block));
for (uint j = block->end_idx() + 1; j > 1; j--) {
Node* n = block->_nodes[j - 1];
Node* n = block->get_node(j - 1);
// Pre-split compares of loop-phis. Loop-phis form a cycle we would
// like to see in the same register. Compare uses the loop-phi and so
......@@ -1979,8 +1979,8 @@ void PhaseChaitin::dump(const Block *b) const {
b->dump_head(&_cfg);
// For all instructions
for( uint j = 0; j < b->_nodes.size(); j++ )
dump(b->_nodes[j]);
for( uint j = 0; j < b->number_of_nodes(); j++ )
dump(b->get_node(j));
// Print live-out info at end of block
if( _live ) {
tty->print("Liveout: ");
......@@ -2271,8 +2271,8 @@ void PhaseChaitin::dump_lrg( uint lidx, bool defs_only ) const {
int dump_once = 0;
// For all instructions
for( uint j = 0; j < block->_nodes.size(); j++ ) {
Node *n = block->_nodes[j];
for( uint j = 0; j < block->number_of_nodes(); j++ ) {
Node *n = block->get_node(j);
if (_lrg_map.find_const(n) == lidx) {
if (!dump_once++) {
tty->cr();
......
......@@ -54,9 +54,9 @@ void PhaseCoalesce::dump() const {
for( j=0; j<b->_num_succs; j++ )
tty->print("B%d ",b->_succs[j]->_pre_order);
tty->print(" IDom: B%d/#%d\n", b->_idom ? b->_idom->_pre_order : 0, b->_dom_depth);
uint cnt = b->_nodes.size();
uint cnt = b->number_of_nodes();
for( j=0; j<cnt; j++ ) {
Node *n = b->_nodes[j];
Node *n = b->get_node(j);
dump( n );
tty->print("\t%s\t",n->Name());
......@@ -152,7 +152,7 @@ void PhaseAggressiveCoalesce::insert_copy_with_overlap( Block *b, Node *copy, ui
// after the last use. Last use is really first-use on a backwards scan.
uint i = b->end_idx()-1;
while(1) {
Node *n = b->_nodes[i];
Node *n = b->get_node(i);
// Check for end of virtual copies; this is also the end of the
// parallel renaming effort.
if (n->_idx < _unique) {
......@@ -174,7 +174,7 @@ void PhaseAggressiveCoalesce::insert_copy_with_overlap( Block *b, Node *copy, ui
// the last kill. Thus it is the first kill on a backwards scan.
i = b->end_idx()-1;
while (1) {
Node *n = b->_nodes[i];
Node *n = b->get_node(i);
// Check for end of virtual copies; this is also the end of the
// parallel renaming effort.
if (n->_idx < _unique) {
......@@ -200,13 +200,13 @@ void PhaseAggressiveCoalesce::insert_copy_with_overlap( Block *b, Node *copy, ui
tmp ->set_req(idx,copy->in(idx));
copy->set_req(idx,tmp);
// Save source in temp early, before source is killed
b->_nodes.insert(kill_src_idx,tmp);
b->insert_node(tmp, kill_src_idx);
_phc._cfg.map_node_to_block(tmp, b);
last_use_idx++;
}
// Insert just after last use
b->_nodes.insert(last_use_idx+1,copy);
b->insert_node(copy, last_use_idx + 1);
}
void PhaseAggressiveCoalesce::insert_copies( Matcher &matcher ) {
......@@ -237,8 +237,8 @@ void PhaseAggressiveCoalesce::insert_copies( Matcher &matcher ) {
Block *b = _phc._cfg.get_block(i);
uint cnt = b->num_preds(); // Number of inputs to the Phi
for( uint l = 1; l<b->_nodes.size(); l++ ) {
Node *n = b->_nodes[l];
for( uint l = 1; l<b->number_of_nodes(); l++ ) {
Node *n = b->get_node(l);
// Do not use removed-copies, use copied value instead
uint ncnt = n->req();
......@@ -260,7 +260,7 @@ void PhaseAggressiveCoalesce::insert_copies( Matcher &matcher ) {
if (_phc._lrg_map.find(n) == _phc._lrg_map.find(def)) {
n->replace_by(def);
n->set_req(cidx,NULL);
b->_nodes.remove(l);
b->remove_node(l);
l--;
continue;
}
......@@ -321,13 +321,13 @@ void PhaseAggressiveCoalesce::insert_copies( Matcher &matcher ) {
m->as_Mach()->rematerialize()) {
copy = m->clone();
// Insert the copy in the basic block, just before us
b->_nodes.insert(l++, copy);
b->insert_node(copy, l++);
l += _phc.clone_projs(b, l, m, copy, _phc._lrg_map);
} else {
const RegMask *rm = C->matcher()->idealreg2spillmask[m->ideal_reg()];
copy = new (C) MachSpillCopyNode(m, *rm, *rm);
// Insert the copy in the basic block, just before us
b->_nodes.insert(l++, copy);
b->insert_node(copy, l++);
}
// Insert the copy in the use-def chain
n->set_req(idx, copy);
......@@ -376,7 +376,7 @@ void PhaseAggressiveCoalesce::insert_copies( Matcher &matcher ) {
// Insert the copy in the use-def chain
n->set_req(inpidx, copy );
// Insert the copy in the basic block, just before us
b->_nodes.insert( l++, copy );
b->insert_node(copy, l++);
// Extend ("register allocate") the names array for the copy.
uint max_lrg_id = _phc._lrg_map.max_lrg_id();
_phc.new_lrg(copy, max_lrg_id);
......@@ -431,8 +431,8 @@ void PhaseAggressiveCoalesce::coalesce( Block *b ) {
}
// Visit all the Phis in successor block
for( uint k = 1; k<bs->_nodes.size(); k++ ) {
Node *n = bs->_nodes[k];
for( uint k = 1; k<bs->number_of_nodes(); k++ ) {
Node *n = bs->get_node(k);
if( !n->is_Phi() ) break;
combine_these_two( n, n->in(j) );
}
......@@ -442,7 +442,7 @@ void PhaseAggressiveCoalesce::coalesce( Block *b ) {
// Check _this_ block for 2-address instructions and copies.
uint cnt = b->end_idx();
for( i = 1; i<cnt; i++ ) {
Node *n = b->_nodes[i];
Node *n = b->get_node(i);
uint idx;
// 2-address instructions have a virtual Copy matching their input
// to their output
......@@ -490,10 +490,10 @@ void PhaseConservativeCoalesce::union_helper( Node *lr1_node, Node *lr2_node, ui
dst_copy->set_req( didx, src_def );
// Add copy to free list
// _phc.free_spillcopy(b->_nodes[bindex]);
assert( b->_nodes[bindex] == dst_copy, "" );
assert( b->get_node(bindex) == dst_copy, "" );
dst_copy->replace_by( dst_copy->in(didx) );
dst_copy->set_req( didx, NULL);
b->_nodes.remove(bindex);
b->remove_node(bindex);
if( bindex < b->_ihrp_index ) b->_ihrp_index--;
if( bindex < b->_fhrp_index ) b->_fhrp_index--;
......@@ -523,8 +523,8 @@ uint PhaseConservativeCoalesce::compute_separating_interferences(Node *dst_copy,
bindex2 = b2->end_idx()-1;
}
// Get prior instruction
assert(bindex2 < b2->_nodes.size(), "index out of bounds");
Node *x = b2->_nodes[bindex2];
assert(bindex2 < b2->number_of_nodes(), "index out of bounds");
Node *x = b2->get_node(bindex2);
if( x == prev_copy ) { // Previous copy in copy chain?
if( prev_copy == src_copy)// Found end of chain and all interferences
break; // So break out of loop
......@@ -776,7 +776,7 @@ void PhaseConservativeCoalesce::coalesce( Block *b ) {
for( uint i = 1; i<b->end_idx(); i++ ) {
// Check for actual copies on inputs. Coalesce a copy into its
// input if use and copy's input are compatible.
Node *copy1 = b->_nodes[i];
Node *copy1 = b->get_node(i);
uint idx1 = copy1->is_Copy();
if( !idx1 ) continue; // Not a copy
......
......@@ -2258,7 +2258,7 @@ void Compile::dump_asm(int *pcs, uint pc_limit) {
if (block->is_connector() && !Verbose) {
continue;
}
n = block->_nodes[0];
n = block->head();
if (pcs && n->_idx < pc_limit) {
tty->print("%3.3x ", pcs[n->_idx]);
} else {
......@@ -2273,12 +2273,12 @@ void Compile::dump_asm(int *pcs, uint pc_limit) {
// For all instructions
Node *delay = NULL;
for (uint j = 0; j < block->_nodes.size(); j++) {
for (uint j = 0; j < block->number_of_nodes(); j++) {
if (VMThread::should_terminate()) {
cut_short = true;
break;
}
n = block->_nodes[j];
n = block->get_node(j);
if (valid_bundle_info(n)) {
Bundle* bundle = node_bundling(n);
if (bundle->used_in_unconditional_delay()) {
......
......@@ -211,21 +211,21 @@ class Block_Stack {
uint Block_Stack::most_frequent_successor( Block *b ) {
uint freq_idx = 0;
int eidx = b->end_idx();
Node *n = b->_nodes[eidx];
Node *n = b->get_node(eidx);
int op = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : n->Opcode();
switch( op ) {
case Op_CountedLoopEnd:
case Op_If: { // Split frequency amongst children
float prob = n->as_MachIf()->_prob;
// Is succ[0] the TRUE branch or the FALSE branch?
if( b->_nodes[eidx+1]->Opcode() == Op_IfFalse )
if( b->get_node(eidx+1)->Opcode() == Op_IfFalse )
prob = 1.0f - prob;
freq_idx = prob < PROB_FAIR; // freq=1 for succ[0] < 0.5 prob
break;
}
case Op_Catch: // Split frequency amongst children
for( freq_idx = 0; freq_idx < b->_num_succs; freq_idx++ )
if( b->_nodes[eidx+1+freq_idx]->as_CatchProj()->_con == CatchProjNode::fall_through_index )
if( b->get_node(eidx+1+freq_idx)->as_CatchProj()->_con == CatchProjNode::fall_through_index )
break;
// Handle case of no fall-thru (e.g., check-cast MUST throw an exception)
if( freq_idx == b->_num_succs ) freq_idx = 0;
......
......@@ -102,12 +102,12 @@ void PhaseCFG::replace_block_proj_ctrl( Node *n ) {
uint j = 0;
if (pb->_num_succs != 1) { // More then 1 successor?
// Search for successor
uint max = pb->_nodes.size();
uint max = pb->number_of_nodes();
assert( max > 1, "" );
uint start = max - pb->_num_succs;
// Find which output path belongs to projection
for (j = start; j < max; j++) {
if( pb->_nodes[j] == in0 )
if( pb->get_node(j) == in0 )
break;
}
assert( j < max, "must find" );
......@@ -1027,8 +1027,8 @@ Block* PhaseCFG::hoist_to_cheaper_block(Block* LCA, Block* early, Node* self) {
Block* least = LCA;
double least_freq = least->_freq;
uint target = get_latency_for_node(self);
uint start_latency = get_latency_for_node(LCA->_nodes[0]);
uint end_latency = get_latency_for_node(LCA->_nodes[LCA->end_idx()]);
uint start_latency = get_latency_for_node(LCA->head());
uint end_latency = get_latency_for_node(LCA->get_node(LCA->end_idx()));
bool in_latency = (target <= start_latency);
const Block* root_block = get_block_for_node(_root);
......@@ -1049,9 +1049,9 @@ Block* PhaseCFG::hoist_to_cheaper_block(Block* LCA, Block* early, Node* self) {
self->dump();
tty->print_cr("# B%d: start latency for [%4d]=%d, end latency for [%4d]=%d, freq=%g",
LCA->_pre_order,
LCA->_nodes[0]->_idx,
LCA->head()->_idx,
start_latency,
LCA->_nodes[LCA->end_idx()]->_idx,
LCA->get_node(LCA->end_idx())->_idx,
end_latency,
least_freq);
}
......@@ -1074,14 +1074,14 @@ Block* PhaseCFG::hoist_to_cheaper_block(Block* LCA, Block* early, Node* self) {
if (mach && LCA == root_block)
break;
uint start_lat = get_latency_for_node(LCA->_nodes[0]);
uint start_lat = get_latency_for_node(LCA->head());
uint end_idx = LCA->end_idx();
uint end_lat = get_latency_for_node(LCA->_nodes[end_idx]);
uint end_lat = get_latency_for_node(LCA->get_node(end_idx));
double LCA_freq = LCA->_freq;
#ifndef PRODUCT
if (trace_opto_pipelining()) {
tty->print_cr("# B%d: start latency for [%4d]=%d, end latency for [%4d]=%d, freq=%g",
LCA->_pre_order, LCA->_nodes[0]->_idx, start_lat, end_idx, end_lat, LCA_freq);
LCA->_pre_order, LCA->head()->_idx, start_lat, end_idx, end_lat, LCA_freq);
}
#endif
cand_cnt++;
......@@ -1726,7 +1726,7 @@ void CFGLoop::compute_freq() {
// Determine the probability of reaching successor 'i' from the receiver block.
float Block::succ_prob(uint i) {
int eidx = end_idx();
Node *n = _nodes[eidx]; // Get ending Node
Node *n = get_node(eidx); // Get ending Node
int op = n->Opcode();
if (n->is_Mach()) {
......@@ -1761,7 +1761,7 @@ float Block::succ_prob(uint i) {
float prob = n->as_MachIf()->_prob;
assert(prob >= 0.0 && prob <= 1.0, "out of range probability");
// If succ[i] is the FALSE branch, invert path info
if( _nodes[i + eidx + 1]->Opcode() == Op_IfFalse ) {
if( get_node(i + eidx + 1)->Opcode() == Op_IfFalse ) {
return 1.0f - prob; // not taken
} else {
return prob; // taken
......@@ -1773,7 +1773,7 @@ float Block::succ_prob(uint i) {
return 1.0f/_num_succs;
case Op_Catch: {
const CatchProjNode *ci = _nodes[i + eidx + 1]->as_CatchProj();
const CatchProjNode *ci = get_node(i + eidx + 1)->as_CatchProj();
if (ci->_con == CatchProjNode::fall_through_index) {
// Fall-thru path gets the lion's share.
return 1.0f - PROB_UNLIKELY_MAG(5)*_num_succs;
......@@ -1810,7 +1810,7 @@ float Block::succ_prob(uint i) {
// Return the number of fall-through candidates for a block
int Block::num_fall_throughs() {
int eidx = end_idx();
Node *n = _nodes[eidx]; // Get ending Node
Node *n = get_node(eidx); // Get ending Node
int op = n->Opcode();
if (n->is_Mach()) {
......@@ -1834,7 +1834,7 @@ int Block::num_fall_throughs() {
case Op_Catch: {
for (uint i = 0; i < _num_succs; i++) {
const CatchProjNode *ci = _nodes[i + eidx + 1]->as_CatchProj();
const CatchProjNode *ci = get_node(i + eidx + 1)->as_CatchProj();
if (ci->_con == CatchProjNode::fall_through_index) {
return 1;
}
......@@ -1862,14 +1862,14 @@ int Block::num_fall_throughs() {
// Return true if a specific successor could be fall-through target.
bool Block::succ_fall_through(uint i) {
int eidx = end_idx();
Node *n = _nodes[eidx]; // Get ending Node
Node *n = get_node(eidx); // Get ending Node
int op = n->Opcode();
if (n->is_Mach()) {
if (n->is_MachNullCheck()) {
// In theory, either side can fall-thru, for simplicity sake,
// let's say only the false branch can now.
return _nodes[i + eidx + 1]->Opcode() == Op_IfFalse;
return get_node(i + eidx + 1)->Opcode() == Op_IfFalse;
}
op = n->as_Mach()->ideal_Opcode();
}
......@@ -1883,7 +1883,7 @@ bool Block::succ_fall_through(uint i) {
return true;
case Op_Catch: {
const CatchProjNode *ci = _nodes[i + eidx + 1]->as_CatchProj();
const CatchProjNode *ci = get_node(i + eidx + 1)->as_CatchProj();
return ci->_con == CatchProjNode::fall_through_index;
}
......@@ -1907,7 +1907,7 @@ bool Block::succ_fall_through(uint i) {
// Update the probability of a two-branch to be uncommon
void Block::update_uncommon_branch(Block* ub) {
int eidx = end_idx();
Node *n = _nodes[eidx]; // Get ending Node
Node *n = get_node(eidx); // Get ending Node
int op = n->as_Mach()->ideal_Opcode();
......@@ -1923,7 +1923,7 @@ void Block::update_uncommon_branch(Block* ub) {
// If ub is the true path, make the proability small, else
// ub is the false path, and make the probability large
bool invert = (_nodes[s + eidx + 1]->Opcode() == Op_IfFalse);
bool invert = (get_node(s + eidx + 1)->Opcode() == Op_IfFalse);
// Get existing probability
float p = n->as_MachIf()->_prob;
......
......@@ -639,8 +639,8 @@ void IdealGraphPrinter::walk_nodes(Node *start, bool edges, VectorSet* temp_set)
// reachable but are in the CFG so add them here.
for (uint i = 0; i < C->cfg()->number_of_blocks(); i++) {
Block* block = C->cfg()->get_block(i);
for (uint s = 0; s < block->_nodes.size(); s++) {
nodeStack.push(block->_nodes[s]);
for (uint s = 0; s < block->number_of_nodes(); s++) {
nodeStack.push(block->get_node(s));
}
}
}
......@@ -713,9 +713,9 @@ void IdealGraphPrinter::print(Compile* compile, const char *name, Node *node, in
tail(SUCCESSORS_ELEMENT);
head(NODES_ELEMENT);
for (uint s = 0; s < block->_nodes.size(); s++) {
for (uint s = 0; s < block->number_of_nodes(); s++) {
begin_elem(NODE_ELEMENT);
print_attr(NODE_ID_PROPERTY, get_node_id(block->_nodes[s]));
print_attr(NODE_ID_PROPERTY, get_node_id(block->get_node(s)));
end_elem();
}
tail(NODES_ELEMENT);
......
......@@ -319,7 +319,7 @@ void PhaseChaitin::build_ifg_virtual( ) {
// value is then removed from the live-ness set and it's inputs are
// added to the live-ness set.
for (uint j = block->end_idx() + 1; j > 1; j--) {
Node* n = block->_nodes[j - 1];
Node* n = block->get_node(j - 1);
// Get value being defined
uint r = _lrg_map.live_range_id(n);
......@@ -456,7 +456,7 @@ uint PhaseChaitin::build_ifg_physical( ResourceArea *a ) {
// Compute first nonphi node index
uint first_inst;
for (first_inst = 1; first_inst < last_inst; first_inst++) {
if (!block->_nodes[first_inst]->is_Phi()) {
if (!block->get_node(first_inst)->is_Phi()) {
break;
}
}
......@@ -464,15 +464,15 @@ uint PhaseChaitin::build_ifg_physical( ResourceArea *a ) {
// Spills could be inserted before CreateEx node which should be
// first instruction in block after Phis. Move CreateEx up.
for (uint insidx = first_inst; insidx < last_inst; insidx++) {
Node *ex = block->_nodes[insidx];
Node *ex = block->get_node(insidx);
if (ex->is_SpillCopy()) {
continue;
}
if (insidx > first_inst && ex->is_Mach() && ex->as_Mach()->ideal_Opcode() == Op_CreateEx) {
// If the CreateEx isn't above all the MachSpillCopies
// then move it to the top.
block->_nodes.remove(insidx);
block->_nodes.insert(first_inst, ex);
block->remove_node(insidx);
block->insert_node(ex, first_inst);
}
// Stop once a CreateEx or any other node is found
break;
......@@ -523,7 +523,7 @@ uint PhaseChaitin::build_ifg_physical( ResourceArea *a ) {
// to the live-ness set.
uint j;
for (j = last_inst + 1; j > 1; j--) {
Node* n = block->_nodes[j - 1];
Node* n = block->get_node(j - 1);
// Get value being defined
uint r = _lrg_map.live_range_id(n);
......@@ -541,7 +541,7 @@ uint PhaseChaitin::build_ifg_physical( ResourceArea *a ) {
if( !n->is_Proj() ||
// Could also be a flags-projection of a dead ADD or such.
(_lrg_map.live_range_id(def) && !liveout.member(_lrg_map.live_range_id(def)))) {
block->_nodes.remove(j - 1);
block->remove_node(j - 1);
if (lrgs(r)._def == n) {
lrgs(r)._def = 0;
}
......@@ -605,7 +605,7 @@ uint PhaseChaitin::build_ifg_physical( ResourceArea *a ) {
// (j - 1) is index for current instruction 'n'
Node *m = n;
for (uint i = j; i <= last_inst && m->is_SpillCopy(); ++i) {
m = block->_nodes[i];
m = block->get_node(i);
}
if (m == single_use) {
lrgs(r)._area = 0.0;
......@@ -772,20 +772,20 @@ uint PhaseChaitin::build_ifg_physical( ResourceArea *a ) {
// Compute high pressure indice; avoid landing in the middle of projnodes
j = hrp_index[0];
if (j < block->_nodes.size() && j < block->end_idx() + 1) {
Node* cur = block->_nodes[j];
if (j < block->number_of_nodes() && j < block->end_idx() + 1) {
Node* cur = block->get_node(j);
while (cur->is_Proj() || (cur->is_MachNullCheck()) || cur->is_Catch()) {
j--;
cur = block->_nodes[j];
cur = block->get_node(j);
}
}
block->_ihrp_index = j;
j = hrp_index[1];
if (j < block->_nodes.size() && j < block->end_idx() + 1) {
Node* cur = block->_nodes[j];
if (j < block->number_of_nodes() && j < block->end_idx() + 1) {
Node* cur = block->get_node(j);
while (cur->is_Proj() || (cur->is_MachNullCheck()) || cur->is_Catch()) {
j--;
cur = block->_nodes[j];
cur = block->get_node(j);
}
}
block->_fhrp_index = j;
......
......@@ -75,11 +75,11 @@ void Block::implicit_null_check(PhaseCFG *cfg, Node *proj, Node *val, int allowe
// Get the successor block for if the test ptr is non-null
Block* not_null_block; // this one goes with the proj
Block* null_block;
if (_nodes[_nodes.size()-1] == proj) {
if (get_node(number_of_nodes()-1) == proj) {
null_block = _succs[0];
not_null_block = _succs[1];
} else {
assert(_nodes[_nodes.size()-2] == proj, "proj is one or the other");
assert(get_node(number_of_nodes()-2) == proj, "proj is one or the other");
not_null_block = _succs[0];
null_block = _succs[1];
}
......@@ -94,7 +94,7 @@ void Block::implicit_null_check(PhaseCFG *cfg, Node *proj, Node *val, int allowe
{
bool found_trap = false;
for (uint i1 = 0; i1 < null_block->_nodes.size(); i1++) {
Node* nn = null_block->_nodes[i1];
Node* nn = null_block->get_node(i1);
if (nn->is_MachCall() &&
nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) {
const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
......@@ -282,7 +282,7 @@ void Block::implicit_null_check(PhaseCFG *cfg, Node *proj, Node *val, int allowe
while( b != this ) {
uint k;
for( k = 1; k < b->_nodes.size(); k++ ) {
Node *n = b->_nodes[k];
Node *n = b->get_node(k);
if( n->needs_anti_dependence_check() &&
n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) )
break; // Found anti-dependent load
......@@ -344,8 +344,8 @@ void Block::implicit_null_check(PhaseCFG *cfg, Node *proj, Node *val, int allowe
cfg->map_node_to_block(best, this);
// Move the control dependence
if (best->in(0) && best->in(0) == old_block->_nodes[0])
best->set_req(0, _nodes[0]);
if (best->in(0) && best->in(0) == old_block->head())
best->set_req(0, head());
// Check for flag-killing projections that also need to be hoisted
// Should be DU safe because no edge updates.
......@@ -368,8 +368,8 @@ void Block::implicit_null_check(PhaseCFG *cfg, Node *proj, Node *val, int allowe
// We need to flip the projections to keep the same semantics.
if( proj->Opcode() == Op_IfTrue ) {
// Swap order of projections in basic block to swap branch targets
Node *tmp1 = _nodes[end_idx()+1];
Node *tmp2 = _nodes[end_idx()+2];
Node *tmp1 = get_node(end_idx()+1);
Node *tmp2 = get_node(end_idx()+2);
_nodes.map(end_idx()+1, tmp2);
_nodes.map(end_idx()+2, tmp1);
Node *tmp = new (C) Node(C->top()); // Use not NULL input
......@@ -624,7 +624,7 @@ uint Block::sched_call( Matcher &matcher, PhaseCFG* cfg, uint node_cnt, Node_Lis
int op = mcall->ideal_Opcode();
MachProjNode *proj = new (matcher.C) MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
cfg->map_node_to_block(proj, this);
_nodes.insert(node_cnt++, proj);
insert_node(proj, node_cnt++);
// Select the right register save policy.
const char * save_policy;
......@@ -685,7 +685,7 @@ bool Block::schedule_local(PhaseCFG *cfg, Matcher &matcher, GrowableArray<int> &
tty->print_cr("# --- schedule_local B%d, before: ---", _pre_order);
for (uint i = 0;i < _nodes.size();i++) {
tty->print("# ");
_nodes[i]->fast_dump();
get_node(i)->fast_dump();
}
tty->print_cr("#");
}
......@@ -699,11 +699,11 @@ bool Block::schedule_local(PhaseCFG *cfg, Matcher &matcher, GrowableArray<int> &
uint phi_cnt = 1;
uint i;
for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
Node *n = _nodes[i];
Node *n = get_node(i);
if( n->is_Phi() || // Found a PhiNode or ParmNode
(n->is_Proj() && n->in(0) == head()) ) {
// Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
_nodes.map(i,_nodes[phi_cnt]);
_nodes.map(i,get_node(phi_cnt));
_nodes.map(phi_cnt++,n); // swap Phi/Parm up front
} else { // All others
// Count block-local inputs to 'n'
......@@ -748,12 +748,12 @@ bool Block::schedule_local(PhaseCFG *cfg, Matcher &matcher, GrowableArray<int> &
}
}
for(uint i2=i; i2<_nodes.size(); i2++ ) // Trailing guys get zapped count
ready_cnt.at_put(_nodes[i2]->_idx, 0);
ready_cnt.at_put(get_node(i2)->_idx, 0);
// All the prescheduled guys do not hold back internal nodes
uint i3;
for(i3 = 0; i3<phi_cnt; i3++ ) { // For all pre-scheduled
Node *n = _nodes[i3]; // Get pre-scheduled
Node *n = get_node(i3); // Get pre-scheduled
for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
Node* m = n->fast_out(j);
if (cfg->get_block_for_node(m) == this) { // Local-block user
......@@ -767,7 +767,7 @@ bool Block::schedule_local(PhaseCFG *cfg, Matcher &matcher, GrowableArray<int> &
// Make a worklist
Node_List worklist;
for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist
Node *m = _nodes[i4];
Node *m = get_node(i4);
if( !ready_cnt.at(m->_idx) ) { // Zero ready count?
if (m->is_iteratively_computed()) {
// Push induction variable increments last to allow other uses
......@@ -789,12 +789,12 @@ bool Block::schedule_local(PhaseCFG *cfg, Matcher &matcher, GrowableArray<int> &
}
// Warm up the 'next_call' heuristic bits
needed_for_next_call(_nodes[0], next_call, cfg);
needed_for_next_call(head(), next_call, cfg);
#ifndef PRODUCT
if (cfg->trace_opto_pipelining()) {
for (uint j=0; j<_nodes.size(); j++) {
Node *n = _nodes[j];
Node *n = get_node(j);
int idx = n->_idx;
tty->print("# ready cnt:%3d ", ready_cnt.at(idx));
tty->print("latency:%3d ", cfg->get_latency_for_node(n));
......@@ -851,7 +851,7 @@ bool Block::schedule_local(PhaseCFG *cfg, Matcher &matcher, GrowableArray<int> &
MachProjNode *proj = new (matcher.C) MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
cfg->map_node_to_block(proj, this);
_nodes.insert(phi_cnt++, proj);
insert_node(proj, phi_cnt++);
add_call_kills(proj, regs, matcher._c_reg_save_policy, false);
}
......@@ -893,7 +893,7 @@ bool Block::schedule_local(PhaseCFG *cfg, Matcher &matcher, GrowableArray<int> &
tty->print_cr("# after schedule_local");
for (uint i = 0;i < _nodes.size();i++) {
tty->print("# ");
_nodes[i]->fast_dump();
get_node(i)->fast_dump();
}
tty->cr();
}
......@@ -952,7 +952,7 @@ static Node *catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def
// Check to see if the use_blk already has an identical phi inserted.
// If it exists, it will be at the first position since all uses of a
// def are processed together.
Node *phi = use_blk->_nodes[1];
Node *phi = use_blk->get_node(1);
if( phi->is_Phi() ) {
fixup = phi;
for (uint k = 1; k < use_blk->num_preds(); k++) {
......@@ -967,7 +967,7 @@ static Node *catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def
// If an existing PhiNode was not found, make a new one.
if (fixup == NULL) {
Node *new_phi = PhiNode::make(use_blk->head(), def);
use_blk->_nodes.insert(1, new_phi);
use_blk->insert_node(new_phi, 1);
cfg->map_node_to_block(new_phi, use_blk);
for (uint k = 1; k < use_blk->num_preds(); k++) {
new_phi->set_req(k, inputs[k]);
......@@ -977,7 +977,7 @@ static Node *catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def
} else {
// Found the use just below the Catch. Make it use the clone.
fixup = use_blk->_nodes[n_clone_idx];
fixup = use_blk->get_node(n_clone_idx);
}
return fixup;
......@@ -997,11 +997,11 @@ static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg,
for( uint k = 0; k < blk->_num_succs; k++ ) {
// Get clone in each successor block
Block *sb = blk->_succs[k];
Node *clone = sb->_nodes[offset_idx+1];
Node *clone = sb->get_node(offset_idx+1);
assert( clone->Opcode() == use->Opcode(), "" );
// Make use-clone reference the def-clone
catch_cleanup_fix_all_inputs(clone, def, sb->_nodes[n_clone_idx]);
catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
}
}
......@@ -1022,11 +1022,11 @@ void Block::call_catch_cleanup(PhaseCFG* cfg, Compile* C) {
// End of region to clone
uint end = end_idx();
if( !_nodes[end]->is_Catch() ) return;
if( !get_node(end)->is_Catch() ) return;
// Start of region to clone
uint beg = end;
while(!_nodes[beg-1]->is_MachProj() ||
!_nodes[beg-1]->in(0)->is_MachCall() ) {
while(!get_node(beg-1)->is_MachProj() ||
!get_node(beg-1)->in(0)->is_MachCall() ) {
beg--;
assert(beg > 0,"Catch cleanup walking beyond block boundary");
}
......@@ -1041,8 +1041,8 @@ void Block::call_catch_cleanup(PhaseCFG* cfg, Compile* C) {
for( uint j = end; j > beg; j-- ) {
// It is safe here to clone a node with anti_dependence
// since clones dominate on each path.
Node *clone = _nodes[j-1]->clone();
sb->_nodes.insert( 1, clone );
Node *clone = get_node(j-1)->clone();
sb->insert_node(clone, 1);
cfg->map_node_to_block(clone, sb);
}
}
......@@ -1051,7 +1051,7 @@ void Block::call_catch_cleanup(PhaseCFG* cfg, Compile* C) {
// Fixup edges. Check the def-use info per cloned Node
for(uint i2 = beg; i2 < end; i2++ ) {
uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
Node *n = _nodes[i2]; // Node that got cloned
Node *n = get_node(i2); // Node that got cloned
// Need DU safe iterator because of edge manipulation in calls.
Unique_Node_List *out = new Unique_Node_List(Thread::current()->resource_area());
for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
......@@ -1081,8 +1081,8 @@ void Block::call_catch_cleanup(PhaseCFG* cfg, Compile* C) {
// Remove the now-dead cloned ops
for(uint i3 = beg; i3 < end; i3++ ) {
_nodes[beg]->disconnect_inputs(NULL, C);
_nodes.remove(beg);
get_node(beg)->disconnect_inputs(NULL, C);
remove_node(beg);
}
// If the successor blocks have a CreateEx node, move it back to the top
......@@ -1091,20 +1091,20 @@ void Block::call_catch_cleanup(PhaseCFG* cfg, Compile* C) {
uint new_cnt = end - beg;
// Remove any newly created, but dead, nodes.
for( uint j = new_cnt; j > 0; j-- ) {
Node *n = sb->_nodes[j];
Node *n = sb->get_node(j);
if (n->outcnt() == 0 &&
(!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){
n->disconnect_inputs(NULL, C);
sb->_nodes.remove(j);
sb->remove_node(j);
new_cnt--;
}
}
// If any newly created nodes remain, move the CreateEx node to the top
if (new_cnt > 0) {
Node *cex = sb->_nodes[1+new_cnt];
Node *cex = sb->get_node(1+new_cnt);
if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
sb->_nodes.remove(1+new_cnt);
sb->_nodes.insert(1,cex);
sb->remove_node(1+new_cnt);
sb->insert_node(cex, 1);
}
}
}
......
......@@ -85,8 +85,8 @@ void PhaseLive::compute(uint maxlrg) {
IndexSet* def = &_defs[block->_pre_order-1];
DEBUG_ONLY(IndexSet *def_outside = getfreeset();)
uint i;
for (i = block->_nodes.size(); i > 1; i--) {
Node* n = block->_nodes[i-1];
for (i = block->number_of_nodes(); i > 1; i--) {
Node* n = block->get_node(i-1);
if (n->is_Phi()) {
break;
}
......@@ -112,7 +112,7 @@ void PhaseLive::compute(uint maxlrg) {
#endif
// Remove anything defined by Phis and the block start instruction
for (uint k = i; k > 0; k--) {
uint r = _names[block->_nodes[k - 1]->_idx];
uint r = _names[block->get_node(k - 1)->_idx];
def->insert(r);
use->remove(r);
}
......@@ -124,7 +124,7 @@ void PhaseLive::compute(uint maxlrg) {
// PhiNode uses go in the live-out set of prior blocks.
for (uint k = i; k > 0; k--) {
add_liveout(p, _names[block->_nodes[k-1]->in(l)->_idx], first_pass);
add_liveout(p, _names[block->get_node(k-1)->in(l)->_idx], first_pass);
}
}
freeset(block);
......@@ -254,10 +254,10 @@ void PhaseLive::add_liveout( Block *p, IndexSet *lo, VectorSet &first_pass ) {
void PhaseLive::dump( const Block *b ) const {
tty->print("Block %d: ",b->_pre_order);
tty->print("LiveOut: "); _live[b->_pre_order-1].dump();
uint cnt = b->_nodes.size();
uint cnt = b->number_of_nodes();
for( uint i=0; i<cnt; i++ ) {
tty->print("L%d/", _names[b->_nodes[i]->_idx] );
b->_nodes[i]->dump();
tty->print("L%d/", _names[b->get_node(i)->_idx] );
b->get_node(i)->dump();
}
tty->print("\n");
}
......@@ -269,7 +269,7 @@ void PhaseChaitin::verify_base_ptrs( ResourceArea *a ) const {
for (uint i = 0; i < _cfg.number_of_blocks(); i++) {
Block* block = _cfg.get_block(i);
for (uint j = block->end_idx() + 1; j > 1; j--) {
Node* n = block->_nodes[j-1];
Node* n = block->get_node(j-1);
if (n->is_Phi()) {
break;
}
......
......@@ -57,7 +57,7 @@ extern int emit_deopt_handler(CodeBuffer &cbuf);
// Convert Nodes to instruction bits and pass off to the VM
void Compile::Output() {
// RootNode goes
assert( _cfg->get_root_block()->_nodes.size() == 0, "" );
assert( _cfg->get_root_block()->number_of_nodes() == 0, "" );
// The number of new nodes (mostly MachNop) is proportional to
// the number of java calls and inner loops which are aligned.
......@@ -70,11 +70,11 @@ void Compile::Output() {
Block *entry = _cfg->get_block(1);
Block *broot = _cfg->get_root_block();
const StartNode *start = entry->_nodes[0]->as_Start();
const StartNode *start = entry->head()->as_Start();
// Replace StartNode with prolog
MachPrologNode *prolog = new (this) MachPrologNode();
entry->_nodes.map( 0, prolog );
entry->map_node(prolog, 0);
_cfg->map_node_to_block(prolog, entry);
_cfg->unmap_node_from_block(start); // start is no longer in any block
......@@ -144,8 +144,8 @@ void Compile::Output() {
for (uint i = 0; i < _cfg->number_of_blocks(); i++) {
tty->print("\nBB#%03d:\n", i);
Block* block = _cfg->get_block(i);
for (uint j = 0; j < block->_nodes.size(); j++) {
Node* n = block->_nodes[j];
for (uint j = 0; j < block->number_of_nodes(); j++) {
Node* n = block->get_node(j);
OptoReg::Name reg = _regalloc->get_reg_first(n);
tty->print(" %-6s ", reg >= 0 && reg < REG_COUNT ? Matcher::regName[reg] : "");
n->dump();
......@@ -226,8 +226,8 @@ void Compile::Insert_zap_nodes() {
// Insert call to zap runtime stub before every node with an oop map
for( uint i=0; i<_cfg->number_of_blocks(); i++ ) {
Block *b = _cfg->get_block(i);
for ( uint j = 0; j < b->_nodes.size(); ++j ) {
Node *n = b->_nodes[j];
for ( uint j = 0; j < b->number_of_nodes(); ++j ) {
Node *n = b->get_node(j);
// Determining if we should insert a zap-a-lot node in output.
// We do that for all nodes that has oopmap info, except for calls
......@@ -256,7 +256,7 @@ void Compile::Insert_zap_nodes() {
}
if (insert) {
Node *zap = call_zap_node(n->as_MachSafePoint(), i);
b->_nodes.insert( j, zap );
b->insert_node(zap, j);
_cfg->map_node_to_block(zap, b);
++j;
}
......@@ -379,10 +379,10 @@ void Compile::shorten_branches(uint* blk_starts, int& code_size, int& reloc_size
DEBUG_ONLY( jmp_rule[i] = 0; )
// Sum all instruction sizes to compute block size
uint last_inst = block->_nodes.size();
uint last_inst = block->number_of_nodes();
uint blk_size = 0;
for (uint j = 0; j < last_inst; j++) {
Node* nj = block->_nodes[j];
Node* nj = block->get_node(j);
// Handle machine instruction nodes
if (nj->is_Mach()) {
MachNode *mach = nj->as_Mach();
......@@ -477,18 +477,18 @@ void Compile::shorten_branches(uint* blk_starts, int& code_size, int& reloc_size
for (uint i = 0; i < nblocks; i++) {
Block* block = _cfg->get_block(i);
int idx = jmp_nidx[i];
MachNode* mach = (idx == -1) ? NULL: block->_nodes[idx]->as_Mach();
MachNode* mach = (idx == -1) ? NULL: block->get_node(idx)->as_Mach();
if (mach != NULL && mach->may_be_short_branch()) {
#ifdef ASSERT
assert(jmp_size[i] > 0 && mach->is_MachBranch(), "sanity");
int j;
// Find the branch; ignore trailing NOPs.
for (j = block->_nodes.size()-1; j>=0; j--) {
Node* n = block->_nodes[j];
for (j = block->number_of_nodes()-1; j>=0; j--) {
Node* n = block->get_node(j);
if (!n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con)
break;
}
assert(j >= 0 && j == idx && block->_nodes[j] == (Node*)mach, "sanity");
assert(j >= 0 && j == idx && block->get_node(j) == (Node*)mach, "sanity");
#endif
int br_size = jmp_size[i];
int br_offs = blk_starts[i] + jmp_offset[i];
......@@ -522,7 +522,7 @@ void Compile::shorten_branches(uint* blk_starts, int& code_size, int& reloc_size
diff -= nop_size;
}
adjust_block_start += diff;
block->_nodes.map(idx, replacement);
block->map_node(replacement, idx);
mach->subsume_by(replacement, C);
mach = replacement;
progress = true;
......@@ -1088,8 +1088,8 @@ CodeBuffer* Compile::init_buffer(uint* blk_starts) {
for (uint i = 0; i < _cfg->number_of_blocks(); i++) {
Block* b = _cfg->get_block(i);
for (uint j = 0; j < b->_nodes.size(); j++) {
Node* n = b->_nodes[j];
for (uint j = 0; j < b->number_of_nodes(); j++) {
Node* n = b->get_node(j);
// If the node is a MachConstantNode evaluate the constant
// value section.
......@@ -1247,14 +1247,14 @@ void Compile::fill_buffer(CodeBuffer* cb, uint* blk_starts) {
// Define the label at the beginning of the basic block
MacroAssembler(cb).bind(blk_labels[block->_pre_order]);
uint last_inst = block->_nodes.size();
uint last_inst = block->number_of_nodes();
// Emit block normally, except for last instruction.
// Emit means "dump code bits into code buffer".
for (uint j = 0; j<last_inst; j++) {
// Get the node
Node* n = block->_nodes[j];
Node* n = block->get_node(j);
// See if delay slots are supported
if (valid_bundle_info(n) &&
......@@ -1308,7 +1308,7 @@ void Compile::fill_buffer(CodeBuffer* cb, uint* blk_starts) {
assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
int nops_cnt = padding / nop_size;
MachNode *nop = new (this) MachNopNode(nops_cnt);
block->_nodes.insert(j++, nop);
block->insert_node(nop, j++);
last_inst++;
_cfg->map_node_to_block(nop, block);
nop->emit(*cb, _regalloc);
......@@ -1394,7 +1394,7 @@ void Compile::fill_buffer(CodeBuffer* cb, uint* blk_starts) {
// Insert padding between avoid_back_to_back branches.
if (needs_padding && replacement->avoid_back_to_back()) {
MachNode *nop = new (this) MachNopNode();
block->_nodes.insert(j++, nop);
block->insert_node(nop, j++);
_cfg->map_node_to_block(nop, block);
last_inst++;
nop->emit(*cb, _regalloc);
......@@ -1407,7 +1407,7 @@ void Compile::fill_buffer(CodeBuffer* cb, uint* blk_starts) {
jmp_size[i] = new_size;
jmp_rule[i] = mach->rule();
#endif
block->_nodes.map(j, replacement);
block->map_node(replacement, j);
mach->subsume_by(replacement, C);
n = replacement;
mach = replacement;
......@@ -1438,7 +1438,7 @@ void Compile::fill_buffer(CodeBuffer* cb, uint* blk_starts) {
count++;
uint i4;
for (i4 = 0; i4 < last_inst; ++i4) {
if (block->_nodes[i4] == oop_store) {
if (block->get_node(i4) == oop_store) {
break;
}
}
......@@ -1548,7 +1548,7 @@ void Compile::fill_buffer(CodeBuffer* cb, uint* blk_starts) {
int padding = nb->alignment_padding(current_offset);
if( padding > 0 ) {
MachNode *nop = new (this) MachNopNode(padding / nop_size);
block->_nodes.insert(block->_nodes.size(), nop);
block->insert_node(nop, block->number_of_nodes());
_cfg->map_node_to_block(nop, block);
nop->emit(*cb, _regalloc);
current_offset = cb->insts_size();
......@@ -1655,8 +1655,8 @@ void Compile::FillExceptionTables(uint cnt, uint *call_returns, uint *inct_start
int j;
// Find the branch; ignore trailing NOPs.
for (j = block->_nodes.size() - 1; j >= 0; j--) {
n = block->_nodes[j];
for (j = block->number_of_nodes() - 1; j >= 0; j--) {
n = block->get_node(j);
if (!n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con) {
break;
}
......@@ -1675,8 +1675,8 @@ void Compile::FillExceptionTables(uint cnt, uint *call_returns, uint *inct_start
uint call_return = call_returns[block->_pre_order];
#ifdef ASSERT
assert( call_return > 0, "no call seen for this basic block" );
while (block->_nodes[--j]->is_MachProj()) ;
assert(block->_nodes[j]->is_MachCall(), "CatchProj must follow call");
while (block->get_node(--j)->is_MachProj()) ;
assert(block->get_node(j)->is_MachCall(), "CatchProj must follow call");
#endif
// last instruction is a CatchNode, find it's CatchProjNodes
int nof_succs = block->_num_succs;
......@@ -1782,7 +1782,7 @@ Scheduling::Scheduling(Arena *arena, Compile &compile)
// Get the last node
Block* block = _cfg->get_block(_cfg->number_of_blocks() - 1);
_next_node = block->_nodes[block->_nodes.size() - 1];
_next_node = block->get_node(block->number_of_nodes() - 1);
}
#ifndef PRODUCT
......@@ -1875,7 +1875,7 @@ void Scheduling::ComputeLocalLatenciesForward(const Block *bb) {
// Used to allow latency 0 to force an instruction to the beginning
// of the bb
uint latency = 1;
Node *use = bb->_nodes[j];
Node *use = bb->get_node(j);
uint nlen = use->len();
// Walk over all the inputs
......@@ -2286,7 +2286,7 @@ void Scheduling::AddNodeToBundle(Node *n, const Block *bb) {
(OptoReg::is_valid(_regalloc->get_reg_first(n)) || op != Op_BoxLock)) ) {
// Push any trailing projections
if( bb->_nodes[bb->_nodes.size()-1] != n ) {
if( bb->get_node(bb->number_of_nodes()-1) != n ) {
for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
Node *foi = n->fast_out(i);
if( foi->is_Proj() )
......@@ -2329,21 +2329,21 @@ void Scheduling::ComputeUseCount(const Block *bb) {
_unconditional_delay_slot = NULL;
#ifdef ASSERT
for( uint i=0; i < bb->_nodes.size(); i++ )
assert( _uses[bb->_nodes[i]->_idx] == 0, "_use array not clean" );
for( uint i=0; i < bb->number_of_nodes(); i++ )
assert( _uses[bb->get_node(i)->_idx] == 0, "_use array not clean" );
#endif
// Force the _uses count to never go to zero for unscheduable pieces
// of the block
for( uint k = 0; k < _bb_start; k++ )
_uses[bb->_nodes[k]->_idx] = 1;
for( uint l = _bb_end; l < bb->_nodes.size(); l++ )
_uses[bb->_nodes[l]->_idx] = 1;
_uses[bb->get_node(k)->_idx] = 1;
for( uint l = _bb_end; l < bb->number_of_nodes(); l++ )
_uses[bb->get_node(l)->_idx] = 1;
// Iterate backwards over the instructions in the block. Don't count the
// branch projections at end or the block header instructions.
for( uint j = _bb_end-1; j >= _bb_start; j-- ) {
Node *n = bb->_nodes[j];
Node *n = bb->get_node(j);
if( n->is_Proj() ) continue; // Projections handled another way
// Account for all uses
......@@ -2398,8 +2398,8 @@ void Scheduling::DoScheduling() {
#ifndef PRODUCT
if (_cfg->C->trace_opto_output()) {
tty->print("# Schedule BB#%03d (initial)\n", i);
for (uint j = 0; j < bb->_nodes.size(); j++) {
bb->_nodes[j]->dump();
for (uint j = 0; j < bb->number_of_nodes(); j++) {
bb->get_node(j)->dump();
}
}
#endif
......@@ -2426,10 +2426,10 @@ void Scheduling::DoScheduling() {
}
// Leave untouched the starting instruction, any Phis, a CreateEx node
// or Top. bb->_nodes[_bb_start] is the first schedulable instruction.
_bb_end = bb->_nodes.size()-1;
// or Top. bb->get_node(_bb_start) is the first schedulable instruction.
_bb_end = bb->number_of_nodes()-1;
for( _bb_start=1; _bb_start <= _bb_end; _bb_start++ ) {
Node *n = bb->_nodes[_bb_start];
Node *n = bb->get_node(_bb_start);
// Things not matched, like Phinodes and ProjNodes don't get scheduled.
// Also, MachIdealNodes do not get scheduled
if( !n->is_Mach() ) continue; // Skip non-machine nodes
......@@ -2449,19 +2449,19 @@ void Scheduling::DoScheduling() {
// in the block), because they have delay slots we can fill. Calls all
// have their delay slots filled in the template expansions, so we don't
// bother scheduling them.
Node *last = bb->_nodes[_bb_end];
Node *last = bb->get_node(_bb_end);
// Ignore trailing NOPs.
while (_bb_end > 0 && last->is_Mach() &&
last->as_Mach()->ideal_Opcode() == Op_Con) {
last = bb->_nodes[--_bb_end];
last = bb->get_node(--_bb_end);
}
assert(!last->is_Mach() || last->as_Mach()->ideal_Opcode() != Op_Con, "");
if( last->is_Catch() ||
// Exclude unreachable path case when Halt node is in a separate block.
(_bb_end > 1 && last->is_Mach() && last->as_Mach()->ideal_Opcode() == Op_Halt) ) {
// There must be a prior call. Skip it.
while( !bb->_nodes[--_bb_end]->is_MachCall() ) {
assert( bb->_nodes[_bb_end]->is_MachProj(), "skipping projections after expected call" );
while( !bb->get_node(--_bb_end)->is_MachCall() ) {
assert( bb->get_node(_bb_end)->is_MachProj(), "skipping projections after expected call" );
}
} else if( last->is_MachNullCheck() ) {
// Backup so the last null-checked memory instruction is
......@@ -2470,7 +2470,7 @@ void Scheduling::DoScheduling() {
Node *mem = last->in(1);
do {
_bb_end--;
} while (mem != bb->_nodes[_bb_end]);
} while (mem != bb->get_node(_bb_end));
} else {
// Set _bb_end to point after last schedulable inst.
_bb_end++;
......@@ -2499,7 +2499,7 @@ void Scheduling::DoScheduling() {
assert( _scheduled.size() == _bb_end - _bb_start, "wrong number of instructions" );
#ifdef ASSERT
for( uint l = _bb_start; l < _bb_end; l++ ) {
Node *n = bb->_nodes[l];
Node *n = bb->get_node(l);
uint m;
for( m = 0; m < _bb_end-_bb_start; m++ )
if( _scheduled[m] == n )
......@@ -2510,14 +2510,14 @@ void Scheduling::DoScheduling() {
// Now copy the instructions (in reverse order) back to the block
for ( uint k = _bb_start; k < _bb_end; k++ )
bb->_nodes.map(k, _scheduled[_bb_end-k-1]);
bb->map_node(_scheduled[_bb_end-k-1], k);
#ifndef PRODUCT
if (_cfg->C->trace_opto_output()) {
tty->print("# Schedule BB#%03d (final)\n", i);
uint current = 0;
for (uint j = 0; j < bb->_nodes.size(); j++) {
Node *n = bb->_nodes[j];
for (uint j = 0; j < bb->number_of_nodes(); j++) {
Node *n = bb->get_node(j);
if( valid_bundle_info(n) ) {
Bundle *bundle = node_bundling(n);
if (bundle->instr_count() > 0 || bundle->flags() > 0) {
......@@ -2579,8 +2579,8 @@ void Scheduling::verify_good_schedule( Block *b, const char *msg ) {
// Walk over the block backwards. Check to make sure each DEF doesn't
// kill a live value (other than the one it's supposed to). Add each
// USE to the live set.
for( uint i = b->_nodes.size()-1; i >= _bb_start; i-- ) {
Node *n = b->_nodes[i];
for( uint i = b->number_of_nodes()-1; i >= _bb_start; i-- ) {
Node *n = b->get_node(i);
int n_op = n->Opcode();
if( n_op == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
// Fat-proj kills a slew of registers
......@@ -2711,7 +2711,7 @@ void Scheduling::anti_do_use( Block *b, Node *use, OptoReg::Name use_reg ) {
pinch->req() == 1 ) { // pinch not yet in block?
pinch->del_req(0); // yank pointer to later-def, also set flag
// Insert the pinch-point in the block just after the last use
b->_nodes.insert(b->find_node(use)+1,pinch);
b->insert_node(pinch, b->find_node(use) + 1);
_bb_end++; // Increase size scheduled region in block
}
......@@ -2763,10 +2763,10 @@ void Scheduling::ComputeRegisterAntidependencies(Block *b) {
// it being in the current block.
bool fat_proj_seen = false;
uint last_safept = _bb_end-1;
Node* end_node = (_bb_end-1 >= _bb_start) ? b->_nodes[last_safept] : NULL;
Node* end_node = (_bb_end-1 >= _bb_start) ? b->get_node(last_safept) : NULL;
Node* last_safept_node = end_node;
for( uint i = _bb_end-1; i >= _bb_start; i-- ) {
Node *n = b->_nodes[i];
Node *n = b->get_node(i);
int is_def = n->outcnt(); // def if some uses prior to adding precedence edges
if( n->is_MachProj() && n->ideal_reg() == MachProjNode::fat_proj ) {
// Fat-proj kills a slew of registers
......@@ -2815,7 +2815,7 @@ void Scheduling::ComputeRegisterAntidependencies(Block *b) {
// Do not allow defs of new derived values to float above GC
// points unless the base is definitely available at the GC point.
Node *m = b->_nodes[i];
Node *m = b->get_node(i);
// Add precedence edge from following safepoint to use of derived pointer
if( last_safept_node != end_node &&
......@@ -2832,11 +2832,11 @@ void Scheduling::ComputeRegisterAntidependencies(Block *b) {
if( n->jvms() ) { // Precedence edge from derived to safept
// Check if last_safept_node was moved by pinch-point insertion in anti_do_use()
if( b->_nodes[last_safept] != last_safept_node ) {
if( b->get_node(last_safept) != last_safept_node ) {
last_safept = b->find_node(last_safept_node);
}
for( uint j=last_safept; j > i; j-- ) {
Node *mach = b->_nodes[j];
Node *mach = b->get_node(j);
if( mach->is_Mach() && mach->as_Mach()->ideal_Opcode() == Op_AddP )
mach->add_prec( n );
}
......
......@@ -1648,10 +1648,10 @@ void PhasePeephole::do_transform() {
bool block_not_printed = true;
// and each instruction within a block
uint end_index = block->_nodes.size();
uint end_index = block->number_of_nodes();
// block->end_idx() not valid after PhaseRegAlloc
for( uint instruction_index = 1; instruction_index < end_index; ++instruction_index ) {
Node *n = block->_nodes.at(instruction_index);
Node *n = block->get_node(instruction_index);
if( n->is_Mach() ) {
MachNode *m = n->as_Mach();
int deleted_count = 0;
......@@ -1673,7 +1673,7 @@ void PhasePeephole::do_transform() {
}
// Print instructions being deleted
for( int i = (deleted_count - 1); i >= 0; --i ) {
block->_nodes.at(instruction_index-i)->as_Mach()->format(_regalloc); tty->cr();
block->get_node(instruction_index-i)->as_Mach()->format(_regalloc); tty->cr();
}
tty->print_cr("replaced with");
// Print new instruction
......@@ -1687,11 +1687,11 @@ void PhasePeephole::do_transform() {
// the node index to live range mappings.)
uint safe_instruction_index = (instruction_index - deleted_count);
for( ; (instruction_index > safe_instruction_index); --instruction_index ) {
block->_nodes.remove( instruction_index );
block->remove_node( instruction_index );
}
// install new node after safe_instruction_index
block->_nodes.insert( safe_instruction_index + 1, m2 );
end_index = block->_nodes.size() - 1; // Recompute new block size
block->insert_node(m2, safe_instruction_index + 1);
end_index = block->number_of_nodes() - 1; // Recompute new block size
NOT_PRODUCT( inc_peepholes(); )
}
}
......
......@@ -423,8 +423,8 @@ void PhaseChaitin::post_allocate_copy_removal() {
// Count of Phis in block
uint phi_dex;
for (phi_dex = 1; phi_dex < block->_nodes.size(); phi_dex++) {
Node* phi = block->_nodes[phi_dex];
for (phi_dex = 1; phi_dex < block->number_of_nodes(); phi_dex++) {
Node* phi = block->get_node(phi_dex);
if (!phi->is_Phi()) {
break;
}
......@@ -439,7 +439,7 @@ void PhaseChaitin::post_allocate_copy_removal() {
Block* pb = _cfg.get_block_for_node(block->pred(j));
// Remove copies along phi edges
for (uint k = 1; k < phi_dex; k++) {
elide_copy(block->_nodes[k], j, block, *blk2value[pb->_pre_order], *blk2regnd[pb->_pre_order], false);
elide_copy(block->get_node(k), j, block, *blk2value[pb->_pre_order], *blk2regnd[pb->_pre_order], false);
}
if (blk2value[pb->_pre_order]) { // Have a mapping on this edge?
// See if this predecessor's mappings have been used by everybody
......@@ -510,7 +510,7 @@ void PhaseChaitin::post_allocate_copy_removal() {
// For all Phi's
for (j = 1; j < phi_dex; j++) {
uint k;
Node *phi = block->_nodes[j];
Node *phi = block->get_node(j);
uint pidx = _lrg_map.live_range_id(phi);
OptoReg::Name preg = lrgs(_lrg_map.live_range_id(phi)).reg();
......@@ -522,7 +522,7 @@ void PhaseChaitin::post_allocate_copy_removal() {
u = u ? NodeSentinel : x; // Capture unique input, or NodeSentinel for 2nd input
}
if (u != NodeSentinel) { // Junk Phi. Remove
block->_nodes.remove(j--);
block->remove_node(j--);
phi_dex--;
_cfg.unmap_node_from_block(phi);
phi->replace_by(u);
......@@ -552,8 +552,8 @@ void PhaseChaitin::post_allocate_copy_removal() {
}
// For all remaining instructions
for (j = phi_dex; j < block->_nodes.size(); j++) {
Node* n = block->_nodes[j];
for (j = phi_dex; j < block->number_of_nodes(); j++) {
Node* n = block->get_node(j);
if(n->outcnt() == 0 && // Dead?
n != C->top() && // (ignore TOP, it has no du info)
......
......@@ -112,17 +112,17 @@ Node *PhaseChaitin::get_spillcopy_wide( Node *def, Node *use, uint uidx ) {
void PhaseChaitin::insert_proj( Block *b, uint i, Node *spill, uint maxlrg ) {
// Skip intervening ProjNodes. Do not insert between a ProjNode and
// its definer.
while( i < b->_nodes.size() &&
(b->_nodes[i]->is_Proj() ||
b->_nodes[i]->is_Phi() ) )
while( i < b->number_of_nodes() &&
(b->get_node(i)->is_Proj() ||
b->get_node(i)->is_Phi() ) )
i++;
// Do not insert between a call and his Catch
if( b->_nodes[i]->is_Catch() ) {
if( b->get_node(i)->is_Catch() ) {
// Put the instruction at the top of the fall-thru block.
// Find the fall-thru projection
while( 1 ) {
const CatchProjNode *cp = b->_nodes[++i]->as_CatchProj();
const CatchProjNode *cp = b->get_node(++i)->as_CatchProj();
if( cp->_con == CatchProjNode::fall_through_index )
break;
}
......@@ -131,7 +131,7 @@ void PhaseChaitin::insert_proj( Block *b, uint i, Node *spill, uint maxlrg ) {
i = 1; // Right at start of block
}
b->_nodes.insert(i,spill); // Insert node in block
b->insert_node(spill, i); // Insert node in block
_cfg.map_node_to_block(spill, b); // Update node->block mapping to reflect
// Adjust the point where we go hi-pressure
if( i <= b->_ihrp_index ) b->_ihrp_index++;
......@@ -160,9 +160,9 @@ uint PhaseChaitin::split_DEF( Node *def, Block *b, int loc, uint maxlrg, Node **
// (The implicit_null_check function ensures the use is also dominated
// by the branch-not-taken block.)
Node *be = b->end();
if( be->is_MachNullCheck() && be->in(1) == def && def == b->_nodes[loc] ) {
if( be->is_MachNullCheck() && be->in(1) == def && def == b->get_node(loc)) {
// Spill goes in the branch-not-taken block
b = b->_succs[b->_nodes[b->end_idx()+1]->Opcode() == Op_IfTrue];
b = b->_succs[b->get_node(b->end_idx()+1)->Opcode() == Op_IfTrue];
loc = 0; // Just past the Region
}
assert( loc >= 0, "must insert past block head" );
......@@ -450,7 +450,7 @@ bool PhaseChaitin::prompt_use( Block *b, uint lidx ) {
// Scan block for 1st use.
for( uint i = 1; i <= b->end_idx(); i++ ) {
Node *n = b->_nodes[i];
Node *n = b->get_node(i);
// Ignore PHI use, these can be up or down
if (n->is_Phi()) {
continue;
......@@ -647,7 +647,7 @@ uint PhaseChaitin::Split(uint maxlrg, ResourceArea* split_arena) {
// check block for appropriate phinode & update edges
for( insidx = 1; insidx <= b->end_idx(); insidx++ ) {
n1 = b->_nodes[insidx];
n1 = b->get_node(insidx);
// bail if this is not a phi
phi = n1->is_Phi() ? n1->as_Phi() : NULL;
if( phi == NULL ) {
......@@ -747,7 +747,7 @@ uint PhaseChaitin::Split(uint maxlrg, ResourceArea* split_arena) {
//----------Walk Instructions in the Block and Split----------
// For all non-phi instructions in the block
for( insidx = 1; insidx <= b->end_idx(); insidx++ ) {
Node *n = b->_nodes[insidx];
Node *n = b->get_node(insidx);
// Find the defining Node's live range index
uint defidx = _lrg_map.find_id(n);
uint cnt = n->req();
......@@ -776,7 +776,7 @@ uint PhaseChaitin::Split(uint maxlrg, ResourceArea* split_arena) {
assert(_lrg_map.find_id(n) == _lrg_map.find_id(u), "should be the same lrg");
n->replace_by(u); // Then replace with unique input
n->disconnect_inputs(NULL, C);
b->_nodes.remove(insidx);
b->remove_node(insidx);
insidx--;
b->_ihrp_index--;
b->_fhrp_index--;
......@@ -789,12 +789,12 @@ uint PhaseChaitin::Split(uint maxlrg, ResourceArea* split_arena) {
(b->_reg_pressure < (uint)INTPRESSURE) ||
b->_ihrp_index > 4000000 ||
b->_ihrp_index >= b->end_idx() ||
!b->_nodes[b->_ihrp_index]->is_Proj(), "" );
!b->get_node(b->_ihrp_index)->is_Proj(), "" );
assert( insidx > b->_fhrp_index ||
(b->_freg_pressure < (uint)FLOATPRESSURE) ||
b->_fhrp_index > 4000000 ||
b->_fhrp_index >= b->end_idx() ||
!b->_nodes[b->_fhrp_index]->is_Proj(), "" );
!b->get_node(b->_fhrp_index)->is_Proj(), "" );
// ********** Handle Crossing HRP Boundry **********
if( (insidx == b->_ihrp_index) || (insidx == b->_fhrp_index) ) {
......@@ -819,7 +819,7 @@ uint PhaseChaitin::Split(uint maxlrg, ResourceArea* split_arena) {
// Insert point is just past last use or def in the block
int insert_point = insidx-1;
while( insert_point > 0 ) {
Node *n = b->_nodes[insert_point];
Node *n = b->get_node(insert_point);
// Hit top of block? Quit going backwards
if (n->is_Phi()) {
break;
......@@ -865,7 +865,7 @@ uint PhaseChaitin::Split(uint maxlrg, ResourceArea* split_arena) {
}
} // end if LRG is UP
} // end for all spilling live ranges
assert( b->_nodes[insidx] == n, "got insidx set incorrectly" );
assert( b->get_node(insidx) == n, "got insidx set incorrectly" );
} // end if crossing HRP Boundry
// If the LRG index is oob, then this is a new spillcopy, skip it.
......@@ -878,7 +878,7 @@ uint PhaseChaitin::Split(uint maxlrg, ResourceArea* split_arena) {
if (copyidx && defidx == _lrg_map.live_range_id(n->in(copyidx))) {
n->replace_by( n->in(copyidx) );
n->set_req( copyidx, NULL );
b->_nodes.remove(insidx--);
b->remove_node(insidx--);
b->_ihrp_index--; // Adjust the point where we go hi-pressure
b->_fhrp_index--;
continue;
......@@ -932,10 +932,10 @@ uint PhaseChaitin::Split(uint maxlrg, ResourceArea* split_arena) {
// Rematerializable? Then clone def at use site instead
// of store/load
if( def->rematerialize() ) {
int old_size = b->_nodes.size();
int old_size = b->number_of_nodes();
def = split_Rematerialize( def, b, insidx, maxlrg, splits, slidx, lrg2reach, Reachblock, true );
if( !def ) return 0; // Bail out
insidx += b->_nodes.size()-old_size;
insidx += b->number_of_nodes()-old_size;
}
MachNode *mach = n->is_Mach() ? n->as_Mach() : NULL;
......@@ -1332,8 +1332,8 @@ uint PhaseChaitin::Split(uint maxlrg, ResourceArea* split_arena) {
// so look at the node before it.
int insert = pred->end_idx();
while (insert >= 1 &&
pred->_nodes[insert - 1]->is_SpillCopy() &&
_lrg_map.find(pred->_nodes[insert - 1]) >= lrgs_before_phi_split) {
pred->get_node(insert - 1)->is_SpillCopy() &&
_lrg_map.find(pred->get_node(insert - 1)) >= lrgs_before_phi_split) {
insert--;
}
def = split_Rematerialize(def, pred, insert, maxlrg, splits, slidx, lrg2reach, Reachblock, false);
......@@ -1402,7 +1402,7 @@ uint PhaseChaitin::Split(uint maxlrg, ResourceArea* split_arena) {
for (bidx = 0; bidx < _cfg.number_of_blocks(); bidx++) {
b = _cfg.get_block(bidx);
for (insidx = 0; insidx <= b->end_idx(); insidx++) {
Node *n = b->_nodes[insidx];
Node *n = b->get_node(insidx);
uint defidx = _lrg_map.find(n);
assert(defidx < _lrg_map.max_lrg_id(), "Bad live range index in Split");
assert(defidx < maxlrg,"Bad live range index in Split");
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册