提交 929bf276 编写于 作者: M morris

6518907: cleanup IA64 specific code in Hotspot

Summary: removed unused IA64 specific code
Reviewed-by: twisti, kvn, dholmes
上级 990dae26
......@@ -280,7 +280,7 @@ JNIEXPORT jbyteArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo
return (err == PS_OK)? array : 0;
}
#if defined(i386) || defined(ia64) || defined(amd64) || defined(sparc) || defined(sparcv9)
#if defined(i386) || defined(amd64) || defined(sparc) || defined(sparcv9)
JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLocal_getThreadIntegerRegisterSet0
(JNIEnv *env, jobject this_obj, jint lwp_id) {
......@@ -299,9 +299,6 @@ JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo
#ifdef i386
#define NPRGREG sun_jvm_hotspot_debugger_x86_X86ThreadContext_NPRGREG
#endif
#ifdef ia64
#define NPRGREG IA64_REG_COUNT
#endif
#ifdef amd64
#define NPRGREG sun_jvm_hotspot_debugger_amd64_AMD64ThreadContext_NPRGREG
#endif
......@@ -336,13 +333,6 @@ JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo
#endif /* i386 */
#if ia64
regs = (*env)->GetLongArrayElements(env, array, &isCopy);
for (i = 0; i < NPRGREG; i++ ) {
regs[i] = 0xDEADDEAD;
}
#endif /* ia64 */
#ifdef amd64
#define REG_INDEX(reg) sun_jvm_hotspot_debugger_amd64_AMD64ThreadContext_##reg
......
......@@ -79,14 +79,6 @@ combination of ptrace and /proc calls.
*************************************************************************************/
#ifdef ia64
struct user_regs_struct {
/* copied from user.h which doesn't define this in a struct */
#define IA64_REG_COUNT (EF_SIZE/8+32) /* integer and fp regs */
unsigned long regs[IA64_REG_COUNT]; /* integer and fp regs */
};
#endif
#if defined(sparc) || defined(sparcv9)
#define user_regs_struct pt_regs
......
......@@ -27,10 +27,7 @@
#include "sun_jvm_hotspot_debugger_windbg_WindbgDebuggerLocal.h"
#ifdef _M_IA64
#include "sun_jvm_hotspot_debugger_ia64_IA64ThreadContext.h"
#define NPRGREG sun_jvm_hotspot_debugger_ia64_IA64ThreadContext_NPRGREG
#elif _M_IX86
#ifdef _M_IX86
#include "sun_jvm_hotspot_debugger_x86_X86ThreadContext.h"
#define NPRGREG sun_jvm_hotspot_debugger_x86_X86ThreadContext_NPRGREG
#elif _M_AMD64
......@@ -491,92 +488,7 @@ static bool addThreads(JNIEnv* env, jobject obj) {
memset(&context, 0, sizeof(CONTEXT));
#undef REG_INDEX
#ifdef _M_IA64
#define REG_INDEX(x) sun_jvm_hotspot_debugger_ia64_IA64ThreadContext_##x
context.ContextFlags = CONTEXT_FULL | CONTEXT_DEBUG;
ptrIDebugAdvanced->GetThreadContext(&context, sizeof(CONTEXT));
ptrRegs[REG_INDEX(GR0)] = 0; // always 0
ptrRegs[REG_INDEX(GR1)] = context.IntGp; // r1
ptrRegs[REG_INDEX(GR2)] = context.IntT0; // r2-r3
ptrRegs[REG_INDEX(GR3)] = context.IntT1;
ptrRegs[REG_INDEX(GR4)] = context.IntS0; // r4-r7
ptrRegs[REG_INDEX(GR5)] = context.IntS1;
ptrRegs[REG_INDEX(GR6)] = context.IntS2;
ptrRegs[REG_INDEX(GR7)] = context.IntS3;
ptrRegs[REG_INDEX(GR8)] = context.IntV0; // r8
ptrRegs[REG_INDEX(GR9)] = context.IntT2; // r9-r11
ptrRegs[REG_INDEX(GR10)] = context.IntT3;
ptrRegs[REG_INDEX(GR11)] = context.IntT4;
ptrRegs[REG_INDEX(GR12)] = context.IntSp; // r12 stack pointer
ptrRegs[REG_INDEX(GR13)] = context.IntTeb; // r13 teb
ptrRegs[REG_INDEX(GR14)] = context.IntT5; // r14-r31
ptrRegs[REG_INDEX(GR15)] = context.IntT6;
ptrRegs[REG_INDEX(GR16)] = context.IntT7;
ptrRegs[REG_INDEX(GR17)] = context.IntT8;
ptrRegs[REG_INDEX(GR18)] = context.IntT9;
ptrRegs[REG_INDEX(GR19)] = context.IntT10;
ptrRegs[REG_INDEX(GR20)] = context.IntT11;
ptrRegs[REG_INDEX(GR21)] = context.IntT12;
ptrRegs[REG_INDEX(GR22)] = context.IntT13;
ptrRegs[REG_INDEX(GR23)] = context.IntT14;
ptrRegs[REG_INDEX(GR24)] = context.IntT15;
ptrRegs[REG_INDEX(GR25)] = context.IntT16;
ptrRegs[REG_INDEX(GR26)] = context.IntT17;
ptrRegs[REG_INDEX(GR27)] = context.IntT18;
ptrRegs[REG_INDEX(GR28)] = context.IntT19;
ptrRegs[REG_INDEX(GR29)] = context.IntT20;
ptrRegs[REG_INDEX(GR30)] = context.IntT21;
ptrRegs[REG_INDEX(GR31)] = context.IntT22;
ptrRegs[REG_INDEX(INT_NATS)] = context.IntNats;
ptrRegs[REG_INDEX(PREDS)] = context.Preds;
ptrRegs[REG_INDEX(BR_RP)] = context.BrRp;
ptrRegs[REG_INDEX(BR1)] = context.BrS0; // b1-b5
ptrRegs[REG_INDEX(BR2)] = context.BrS1;
ptrRegs[REG_INDEX(BR3)] = context.BrS2;
ptrRegs[REG_INDEX(BR4)] = context.BrS3;
ptrRegs[REG_INDEX(BR5)] = context.BrS4;
ptrRegs[REG_INDEX(BR6)] = context.BrT0; // b6-b7
ptrRegs[REG_INDEX(BR7)] = context.BrT1;
ptrRegs[REG_INDEX(AP_UNAT)] = context.ApUNAT;
ptrRegs[REG_INDEX(AP_LC)] = context.ApLC;
ptrRegs[REG_INDEX(AP_EC)] = context.ApEC;
ptrRegs[REG_INDEX(AP_CCV)] = context.ApCCV;
ptrRegs[REG_INDEX(AP_DCR)] = context.ApDCR;
ptrRegs[REG_INDEX(RS_PFS)] = context.RsPFS;
ptrRegs[REG_INDEX(RS_BSP)] = context.RsBSP;
ptrRegs[REG_INDEX(RS_BSPSTORE)] = context.RsBSPSTORE;
ptrRegs[REG_INDEX(RS_RSC)] = context.RsRSC;
ptrRegs[REG_INDEX(RS_RNAT)] = context.RsRNAT;
ptrRegs[REG_INDEX(ST_IPSR)] = context.StIPSR;
ptrRegs[REG_INDEX(ST_IIP)] = context.StIIP;
ptrRegs[REG_INDEX(ST_IFS)] = context.StIFS;
ptrRegs[REG_INDEX(DB_I0)] = context.DbI0;
ptrRegs[REG_INDEX(DB_I1)] = context.DbI1;
ptrRegs[REG_INDEX(DB_I2)] = context.DbI2;
ptrRegs[REG_INDEX(DB_I3)] = context.DbI3;
ptrRegs[REG_INDEX(DB_I4)] = context.DbI4;
ptrRegs[REG_INDEX(DB_I5)] = context.DbI5;
ptrRegs[REG_INDEX(DB_I6)] = context.DbI6;
ptrRegs[REG_INDEX(DB_I7)] = context.DbI7;
ptrRegs[REG_INDEX(DB_D0)] = context.DbD0;
ptrRegs[REG_INDEX(DB_D1)] = context.DbD1;
ptrRegs[REG_INDEX(DB_D2)] = context.DbD2;
ptrRegs[REG_INDEX(DB_D3)] = context.DbD3;
ptrRegs[REG_INDEX(DB_D4)] = context.DbD4;
ptrRegs[REG_INDEX(DB_D5)] = context.DbD5;
ptrRegs[REG_INDEX(DB_D6)] = context.DbD6;
ptrRegs[REG_INDEX(DB_D7)] = context.DbD7;
#elif _M_IX86
#ifdef _M_IX86
#define REG_INDEX(x) sun_jvm_hotspot_debugger_x86_X86ThreadContext_##x
context.ContextFlags = CONTEXT_FULL | CONTEXT_DEBUG_REGISTERS;
......
......@@ -1155,13 +1155,9 @@ void os::Linux::capture_initial_stack(size_t max_size) {
// for initial thread if its stack size exceeds 6M. Cap it at 2M,
// in case other parts in glibc still assumes 2M max stack size.
// FIXME: alt signal stack is gone, maybe we can relax this constraint?
#ifndef IA64
if (stack_size > 2 * K * K) stack_size = 2 * K * K;
#else
// Problem still exists RH7.2 (IA64 anyway) but 2MB is a little small
if (stack_size > 4 * K * K) stack_size = 4 * K * K;
#endif
if (stack_size > 2 * K * K IA64_ONLY(*2))
stack_size = 2 * K * K IA64_ONLY(*2);
// Try to figure out where the stack base (top) is. This is harder.
//
// When an application is started, glibc saves the initial stack pointer in
......@@ -4367,16 +4363,12 @@ int os::Linux::safe_cond_timedwait(pthread_cond_t *_cond, pthread_mutex_t *_mute
if (is_NPTL()) {
return pthread_cond_timedwait(_cond, _mutex, _abstime);
} else {
#ifndef IA64
// 6292965: LinuxThreads pthread_cond_timedwait() resets FPU control
// word back to default 64bit precision if condvar is signaled. Java
// wants 53bit precision. Save and restore current value.
int fpu = get_fpu_control_word();
#endif // IA64
int status = pthread_cond_timedwait(_cond, _mutex, _abstime);
#ifndef IA64
set_fpu_control_word(fpu);
#endif // IA64
return status;
}
}
......
......@@ -349,6 +349,33 @@ address os::current_stack_base() {
#ifdef _M_IA64
// IA64 has memory and register stacks
//
// This is the stack layout you get on NT/IA64 if you specify 1MB stack limit
// at thread creation (1MB backing store growing upwards, 1MB memory stack
// growing downwards, 2MB summed up)
//
// ...
// ------- top of stack (high address) -----
// |
// | 1MB
// | Backing Store (Register Stack)
// |
// | / \
// | |
// | |
// | |
// ------------------------ stack base -----
// | 1MB
// | Memory Stack
// |
// | |
// | |
// | |
// | \ /
// |
// ----- bottom of stack (low address) -----
// ...
stack_size = stack_size / 2;
#endif
return stack_bottom + stack_size;
......@@ -2005,17 +2032,34 @@ LONG Handle_Exception(struct _EXCEPTION_POINTERS* exceptionInfo, address handler
JavaThread* thread = JavaThread::current();
// Save pc in thread
#ifdef _M_IA64
thread->set_saved_exception_pc((address)exceptionInfo->ContextRecord->StIIP);
// Do not blow up if no thread info available.
if (thread) {
// Saving PRECISE pc (with slot information) in thread.
uint64_t precise_pc = (uint64_t) exceptionInfo->ExceptionRecord->ExceptionAddress;
// Convert precise PC into "Unix" format
precise_pc = (precise_pc & 0xFFFFFFFFFFFFFFF0) | ((precise_pc & 0xF) >> 2);
thread->set_saved_exception_pc((address)precise_pc);
}
// Set pc to handler
exceptionInfo->ContextRecord->StIIP = (DWORD64)handler;
// Clear out psr.ri (= Restart Instruction) in order to continue
// at the beginning of the target bundle.
exceptionInfo->ContextRecord->StIPSR &= 0xFFFFF9FFFFFFFFFF;
assert(((DWORD64)handler & 0xF) == 0, "Target address must point to the beginning of a bundle!");
#elif _M_AMD64
thread->set_saved_exception_pc((address)exceptionInfo->ContextRecord->Rip);
// Do not blow up if no thread info available.
if (thread) {
thread->set_saved_exception_pc((address)(DWORD_PTR)exceptionInfo->ContextRecord->Rip);
}
// Set pc to handler
exceptionInfo->ContextRecord->Rip = (DWORD64)handler;
#else
thread->set_saved_exception_pc((address)exceptionInfo->ContextRecord->Eip);
// Do not blow up if no thread info available.
if (thread) {
thread->set_saved_exception_pc((address)(DWORD_PTR)exceptionInfo->ContextRecord->Eip);
}
// Set pc to handler
exceptionInfo->ContextRecord->Eip = (LONG)handler;
exceptionInfo->ContextRecord->Eip = (DWORD)(DWORD_PTR)handler;
#endif
// Continue the execution
......@@ -2040,6 +2084,14 @@ extern "C" void events();
// included or copied here.
#define EXCEPTION_INFO_EXEC_VIOLATION 0x08
// Handle NAT Bit consumption on IA64.
#ifdef _M_IA64
#define EXCEPTION_REG_NAT_CONSUMPTION STATUS_REG_NAT_CONSUMPTION
#endif
// Windows Vista/2008 heap corruption check
#define EXCEPTION_HEAP_CORRUPTION 0xC0000374
#define def_excpt(val) #val, val
struct siglabel {
......@@ -2082,6 +2134,10 @@ struct siglabel exceptlabels[] = {
def_excpt(EXCEPTION_GUARD_PAGE),
def_excpt(EXCEPTION_INVALID_HANDLE),
def_excpt(EXCEPTION_UNCAUGHT_CXX_EXCEPTION),
def_excpt(EXCEPTION_HEAP_CORRUPTION),
#ifdef _M_IA64
def_excpt(EXCEPTION_REG_NAT_CONSUMPTION),
#endif
NULL, 0
};
......@@ -2206,7 +2262,14 @@ LONG WINAPI topLevelExceptionFilter(struct _EXCEPTION_POINTERS* exceptionInfo) {
if (InterceptOSException) return EXCEPTION_CONTINUE_SEARCH;
DWORD exception_code = exceptionInfo->ExceptionRecord->ExceptionCode;
#ifdef _M_IA64
address pc = (address) exceptionInfo->ContextRecord->StIIP;
// On Itanium, we need the "precise pc", which has the slot number coded
// into the least 4 bits: 0000=slot0, 0100=slot1, 1000=slot2 (Windows format).
address pc = (address) exceptionInfo->ExceptionRecord->ExceptionAddress;
// Convert the pc to "Unix format", which has the slot number coded
// into the least 2 bits: 0000=slot0, 0001=slot1, 0010=slot2
// This is needed for IA64 because "relocation" / "implicit null check" / "poll instruction"
// information is saved in the Unix format.
address pc_unix_format = (address) ((((uint64_t)pc) & 0xFFFFFFFFFFFFFFF0) | ((((uint64_t)pc) & 0xF) >> 2));
#elif _M_AMD64
address pc = (address) exceptionInfo->ContextRecord->Rip;
#else
......@@ -2321,29 +2384,40 @@ LONG WINAPI topLevelExceptionFilter(struct _EXCEPTION_POINTERS* exceptionInfo) {
if (exception_code == EXCEPTION_STACK_OVERFLOW) {
if (os::uses_stack_guard_pages()) {
#ifdef _M_IA64
//
// If it's a legal stack address continue, Windows will map it in.
//
// Use guard page for register stack.
PEXCEPTION_RECORD exceptionRecord = exceptionInfo->ExceptionRecord;
address addr = (address) exceptionRecord->ExceptionInformation[1];
if (addr > thread->stack_yellow_zone_base() && addr < thread->stack_base() )
return EXCEPTION_CONTINUE_EXECUTION;
// Check for a register stack overflow on Itanium
if (thread->addr_inside_register_stack_red_zone(addr)) {
// Fatal red zone violation happens if the Java program
// catches a StackOverflow error and does so much processing
// that it runs beyond the unprotected yellow guard zone. As
// a result, we are out of here.
fatal("ERROR: Unrecoverable stack overflow happened. JVM will exit.");
} else if(thread->addr_inside_register_stack(addr)) {
// Disable the yellow zone which sets the state that
// we've got a stack overflow problem.
if (thread->stack_yellow_zone_enabled()) {
thread->disable_stack_yellow_zone();
}
// Give us some room to process the exception.
thread->disable_register_stack_guard();
// Tracing with +Verbose.
if (Verbose) {
tty->print_cr("SOF Compiled Register Stack overflow at " INTPTR_FORMAT " (SIGSEGV)", pc);
tty->print_cr("Register Stack access at " INTPTR_FORMAT, addr);
tty->print_cr("Register Stack base " INTPTR_FORMAT, thread->register_stack_base());
tty->print_cr("Register Stack [" INTPTR_FORMAT "," INTPTR_FORMAT "]",
thread->register_stack_base(),
thread->register_stack_base() + thread->stack_size());
}
// The register save area is the same size as the memory stack
// and starts at the page just above the start of the memory stack.
// If we get a fault in this area, we've run out of register
// stack. If we are in java, try throwing a stack overflow exception.
if (addr > thread->stack_base() &&
addr <= (thread->stack_base()+thread->stack_size()) ) {
char buf[256];
jio_snprintf(buf, sizeof(buf),
"Register stack overflow, addr:%p, stack_base:%p\n",
addr, thread->stack_base() );
tty->print_raw_cr(buf);
// If not in java code, return and hope for the best.
return in_java ? Handle_Exception(exceptionInfo,
SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::STACK_OVERFLOW))
: EXCEPTION_CONTINUE_EXECUTION;
// Reguard the permanent register stack red zone just to be sure.
// We saw Windows silently disabling this without telling us.
thread->enable_register_stack_red_zone();
return Handle_Exception(exceptionInfo,
SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::STACK_OVERFLOW));
}
#endif
if (thread->stack_yellow_zone_enabled()) {
......@@ -2418,50 +2492,33 @@ LONG WINAPI topLevelExceptionFilter(struct _EXCEPTION_POINTERS* exceptionInfo) {
{
// Null pointer exception.
#ifdef _M_IA64
// We catch register stack overflows in compiled code by doing
// an explicit compare and executing a st8(G0, G0) if the
// BSP enters into our guard area. We test for the overflow
// condition and fall into the normal null pointer exception
// code if BSP hasn't overflowed.
if ( in_java ) {
if(thread->register_stack_overflow()) {
assert((address)exceptionInfo->ContextRecord->IntS3 ==
thread->register_stack_limit(),
"GR7 doesn't contain register_stack_limit");
// Disable the yellow zone which sets the state that
// we've got a stack overflow problem.
if (thread->stack_yellow_zone_enabled()) {
thread->disable_stack_yellow_zone();
// Process implicit null checks in compiled code. Note: Implicit null checks
// can happen even if "ImplicitNullChecks" is disabled, e.g. in vtable stubs.
if (CodeCache::contains((void*) pc_unix_format) && !MacroAssembler::needs_explicit_null_check((intptr_t) addr)) {
CodeBlob *cb = CodeCache::find_blob_unsafe(pc_unix_format);
// Handle implicit null check in UEP method entry
if (cb && (cb->is_frame_complete_at(pc) ||
(cb->is_nmethod() && ((nmethod *)cb)->inlinecache_check_contains(pc)))) {
if (Verbose) {
intptr_t *bundle_start = (intptr_t*) ((intptr_t) pc_unix_format & 0xFFFFFFFFFFFFFFF0);
tty->print_cr("trap: null_check at " INTPTR_FORMAT " (SIGSEGV)", pc_unix_format);
tty->print_cr(" to addr " INTPTR_FORMAT, addr);
tty->print_cr(" bundle is " INTPTR_FORMAT " (high), " INTPTR_FORMAT " (low)",
*(bundle_start + 1), *bundle_start);
}
// Give us some room to process the exception
thread->disable_register_stack_guard();
// Update GR7 with the new limit so we can continue running
// compiled code.
exceptionInfo->ContextRecord->IntS3 =
(ULONGLONG)thread->register_stack_limit();
return Handle_Exception(exceptionInfo,
SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::STACK_OVERFLOW));
} else {
//
// Check for implicit null
// We only expect null pointers in the stubs (vtable)
// the rest are checked explicitly now.
//
if (((uintptr_t)addr) < os::vm_page_size() ) {
// an access to the first page of VM--assume it is a null pointer
address stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::IMPLICIT_NULL);
if (stub != NULL) return Handle_Exception(exceptionInfo, stub);
}
SharedRuntime::continuation_for_implicit_exception(thread, pc_unix_format, SharedRuntime::IMPLICIT_NULL));
}
} // in_java
}
// IA64 doesn't use implicit null checking yet. So we shouldn't
// get here.
tty->print_raw_cr("Access violation, possible null pointer exception");
// Implicit null checks were processed above. Hence, we should not reach
// here in the usual case => die!
if (Verbose) tty->print_raw_cr("Access violation, possible null pointer exception");
report_error(t, exception_code, pc, exceptionInfo->ExceptionRecord,
exceptionInfo->ContextRecord);
return EXCEPTION_CONTINUE_SEARCH;
#else /* !IA64 */
#else // !IA64
// Windows 98 reports faulting addresses incorrectly
if (!MacroAssembler::needs_explicit_null_check((intptr_t)addr) ||
......@@ -2493,7 +2550,24 @@ LONG WINAPI topLevelExceptionFilter(struct _EXCEPTION_POINTERS* exceptionInfo) {
report_error(t, exception_code, pc, exceptionInfo->ExceptionRecord,
exceptionInfo->ContextRecord);
return EXCEPTION_CONTINUE_SEARCH;
}
} // /EXCEPTION_ACCESS_VIOLATION
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
#if defined _M_IA64
else if ((exception_code == EXCEPTION_ILLEGAL_INSTRUCTION ||
exception_code == EXCEPTION_ILLEGAL_INSTRUCTION_2)) {
M37 handle_wrong_method_break(0, NativeJump::HANDLE_WRONG_METHOD, PR0);
// Compiled method patched to be non entrant? Following conditions must apply:
// 1. must be first instruction in bundle
// 2. must be a break instruction with appropriate code
if((((uint64_t) pc & 0x0F) == 0) &&
(((IPF_Bundle*) pc)->get_slot0() == handle_wrong_method_break.bits())) {
return Handle_Exception(exceptionInfo,
(address)SharedRuntime::get_handle_wrong_method_stub());
}
} // /EXCEPTION_ILLEGAL_INSTRUCTION
#endif
if (in_java) {
switch (exception_code) {
......
......@@ -3099,9 +3099,9 @@ BytecodeInterpreter::print() {
tty->print_cr("&native_fresult: " INTPTR_FORMAT, (uintptr_t) &this->_native_fresult);
tty->print_cr("native_lresult: " INTPTR_FORMAT, (uintptr_t) this->_native_lresult);
#endif
#if defined(IA64) && !defined(ZERO)
#if !defined(ZERO)
tty->print_cr("last_Java_fp: " INTPTR_FORMAT, (uintptr_t) this->_last_Java_fp);
#endif // IA64 && !ZERO
#endif // !ZERO
tty->print_cr("self_link: " INTPTR_FORMAT, (uintptr_t) this->_self_link);
}
......
......@@ -88,12 +88,12 @@ void GraphKit::gen_stub(address C_function,
thread,
in_bytes(JavaThread::frame_anchor_offset()) +
in_bytes(JavaFrameAnchor::last_Java_pc_offset()));
#if defined(SPARC) || defined(IA64)
#if defined(SPARC)
Node* adr_flags = basic_plus_adr(top(),
thread,
in_bytes(JavaThread::frame_anchor_offset()) +
in_bytes(JavaFrameAnchor::flags_offset()));
#endif /* defined(SPARC) || defined(IA64) */
#endif /* defined(SPARC) */
// Drop in the last_Java_sp. last_Java_fp is not touched.
......@@ -102,10 +102,8 @@ void GraphKit::gen_stub(address C_function,
// users will look at the other fields.
//
Node *adr_sp = basic_plus_adr(top(), thread, in_bytes(JavaThread::last_Java_sp_offset()));
#ifndef IA64
Node *last_sp = basic_plus_adr(top(), frameptr(), (intptr_t) STACK_BIAS);
store_to_memory(NULL, adr_sp, last_sp, T_ADDRESS, NoAlias);
#endif
// Set _thread_in_native
// The order of stores into TLS is critical! Setting _thread_in_native MUST
......@@ -210,19 +208,12 @@ void GraphKit::gen_stub(address C_function,
//-----------------------------
// Clear last_Java_sp
#ifdef IA64
if( os::is_MP() ) insert_mem_bar(Op_MemBarRelease);
#endif
store_to_memory(NULL, adr_sp, null(), T_ADDRESS, NoAlias);
#ifdef IA64
if (os::is_MP() && UseMembar) insert_mem_bar(new MemBarVolatileNode());
#endif // def IA64
// Clear last_Java_pc and (optionally)_flags
store_to_memory(NULL, adr_last_Java_pc, null(), T_ADDRESS, NoAlias);
#if defined(SPARC) || defined(IA64)
#if defined(SPARC)
store_to_memory(NULL, adr_flags, intcon(0), T_INT, NoAlias);
#endif /* defined(SPARC) || defined(IA64) */
#endif /* defined(SPARC) */
#ifdef IA64
Node* adr_last_Java_fp = basic_plus_adr(top(), thread, in_bytes(JavaThread::last_Java_fp_offset()));
if( os::is_MP() ) insert_mem_bar(Op_MemBarRelease);
......
......@@ -985,15 +985,28 @@ void os::print_location(outputStream* st, intptr_t x, bool verbose) {
// if C stack is walkable beyond current frame. The check for fp() is not
// necessary on Sparc, but it's harmless.
bool os::is_first_C_frame(frame* fr) {
#ifdef IA64
// In order to walk native frames on Itanium, we need to access the unwind
// table, which is inside ELF. We don't want to parse ELF after fatal error,
// so return true for IA64. If we need to support C stack walking on IA64,
// this function needs to be moved to CPU specific files, as fp() on IA64
// is register stack, which grows towards higher memory address.
#if defined(IA64) && !defined(_WIN32)
// On IA64 we have to check if the callers bsp is still valid
// (i.e. within the register stack bounds).
// Notice: this only works for threads created by the VM and only if
// we walk the current stack!!! If we want to be able to walk
// arbitrary other threads, we'll have to somehow store the thread
// object in the frame.
Thread *thread = Thread::current();
if ((address)fr->fp() <=
thread->register_stack_base() HPUX_ONLY(+ 0x0) LINUX_ONLY(+ 0x50)) {
// This check is a little hacky, because on Linux the first C
// frame's ('start_thread') register stack frame starts at
// "register_stack_base + 0x48" while on HPUX, the first C frame's
// ('__pthread_bound_body') register stack frame seems to really
// start at "register_stack_base".
return true;
} else {
return false;
}
#elif defined(IA64) && defined(_WIN32)
return true;
#endif
#else
// Load up sp, fp, sender sp and sender fp, check for reasonable values.
// Check usp first, because if that's bad the other accessors may fault
// on some architectures. Ditto ufp second, etc.
......@@ -1023,6 +1036,7 @@ bool os::is_first_C_frame(frame* fr) {
if (old_fp - ufp > 64 * K) return true;
return false;
#endif
}
#ifdef ASSERT
......
......@@ -2816,10 +2816,6 @@ VMRegPair *SharedRuntime::find_callee_arguments(Symbol* sig, bool has_receiver,
JRT_LEAF(intptr_t*, SharedRuntime::OSR_migration_begin( JavaThread *thread) )
#ifdef IA64
ShouldNotReachHere(); // NYI
#endif /* IA64 */
//
// This code is dependent on the memory layout of the interpreter local
// array and the monitors. On all of our platforms the layout is identical
......
......@@ -53,7 +53,7 @@
# include "os_bsd.inline.hpp"
#endif
#if defined(__GNUC__) && !defined(IA64)
#if defined(__GNUC__)
// Need to inhibit inlining for older versions of GCC to avoid build-time failures
#define ATTR __attribute__((noinline))
#else
......
......@@ -233,8 +233,6 @@ void vframeArrayElement::unpack_on_stack(int caller_actual_parameters,
// Force early return from top frame after deoptimization
#ifndef CC_INTERP
pc = Interpreter::remove_activation_early_entry(state->earlyret_tos());
#else
// TBD: Need to implement ForceEarlyReturn for CC_INTERP (ia64)
#endif
} else {
// Possibly override the previous pc computation of the top (youngest) frame
......
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