提交 8bc37f7e 编写于 作者: T twisti

7023639: JSR 292 method handle invocation needs a fast path for compiled code

6984705: JSR 292 method handle creation should not go through JNI
Summary: remove assembly code for JDK 7 chained method handles
Reviewed-by: jrose, twisti, kvn, mhaupt
Contributed-by: NJohn Rose &lt;john.r.rose@oracle.com&gt;, Christian Thalinger &lt;christian.thalinger@oracle.com&gt;, Michael Haupt <michael.haupt@oracle.com>
上级 f48aa70a
......@@ -93,7 +93,6 @@ public class CodeBlob extends VMObject {
public boolean isUncommonTrapStub() { return false; }
public boolean isExceptionStub() { return false; }
public boolean isSafepointStub() { return false; }
public boolean isRicochetBlob() { return false; }
public boolean isAdapterBlob() { return false; }
// Fine grain nmethod support: isNmethod() == isJavaMethod() || isNativeMethod() || isOSRMethod()
......
......@@ -57,7 +57,6 @@ public class CodeCache {
virtualConstructor.addMapping("BufferBlob", BufferBlob.class);
virtualConstructor.addMapping("nmethod", NMethod.class);
virtualConstructor.addMapping("RuntimeStub", RuntimeStub.class);
virtualConstructor.addMapping("RicochetBlob", RicochetBlob.class);
virtualConstructor.addMapping("AdapterBlob", AdapterBlob.class);
virtualConstructor.addMapping("MethodHandlesAdapterBlob", MethodHandlesAdapterBlob.class);
virtualConstructor.addMapping("SafepointBlob", SafepointBlob.class);
......@@ -127,10 +126,6 @@ public class CodeCache {
Assert.that(result.blobContains(start) || result.blobContains(start.addOffsetTo(8)),
"found wrong CodeBlob");
}
if (result.isRicochetBlob()) {
// This should probably be done for other SingletonBlobs
return VM.getVM().ricochetBlob();
}
return result;
}
......
......@@ -147,12 +147,6 @@ public abstract class Frame implements Cloneable {
}
}
public boolean isRicochetFrame() {
CodeBlob cb = VM.getVM().getCodeCache().findBlob(getPC());
RicochetBlob rcb = VM.getVM().ricochetBlob();
return (cb == rcb && rcb != null && rcb.returnsToBounceAddr(getPC()));
}
public boolean isCompiledFrame() {
if (Assert.ASSERTS_ENABLED) {
Assert.that(!VM.getVM().isCore(), "noncore builds only");
......@@ -216,8 +210,7 @@ public abstract class Frame implements Cloneable {
public Frame realSender(RegisterMap map) {
if (!VM.getVM().isCore()) {
Frame result = sender(map);
while (result.isRuntimeFrame() ||
result.isRicochetFrame()) {
while (result.isRuntimeFrame()) {
result = result.sender(map);
}
return result;
......@@ -631,9 +624,6 @@ public abstract class Frame implements Cloneable {
if (Assert.ASSERTS_ENABLED) {
Assert.that(cb != null, "sanity check");
}
if (cb == VM.getVM().ricochetBlob()) {
oopsRicochetDo(oopVisitor, regMap);
}
if (cb.getOopMaps() != null) {
OopMapSet.oopsDo(this, cb, regMap, oopVisitor, VM.getVM().isDebugging());
......@@ -650,10 +640,6 @@ public abstract class Frame implements Cloneable {
// }
}
private void oopsRicochetDo (AddressVisitor oopVisitor, RegisterMap regMap) {
// XXX Empty for now
}
// FIXME: implement the above routines, plus add
// oops_interpreted_arguments_do and oops_compiled_arguments_do
}
......
......@@ -87,8 +87,6 @@ public class VM {
private StubRoutines stubRoutines;
private Bytes bytes;
private RicochetBlob ricochetBlob;
/** Flags indicating whether we are attached to a core, C1, or C2 build */
private boolean usingClientCompiler;
private boolean usingServerCompiler;
......@@ -628,18 +626,6 @@ public class VM {
return stubRoutines;
}
public RicochetBlob ricochetBlob() {
if (ricochetBlob == null) {
Type ricochetType = db.lookupType("SharedRuntime");
AddressField ricochetBlobAddress = ricochetType.getAddressField("_ricochet_blob");
Address addr = ricochetBlobAddress.getValue();
if (addr != null) {
ricochetBlob = new RicochetBlob(addr);
}
}
return ricochetBlob;
}
public VMRegImpl getVMRegImplInfo() {
if (vmregImpl == null) {
vmregImpl = new VMRegImpl();
......
......@@ -571,8 +571,6 @@ public class SPARCFrame extends Frame {
// registers callee-saved, then we will have to copy over
// the RegisterMap update logic from the Intel code.
if (isRicochetFrame()) return senderForRicochetFrame(map);
// The constructor of the sender must know whether this frame is interpreted so it can set the
// sender's _interpreter_sp_adjustment field.
if (VM.getVM().getInterpreter().contains(pc)) {
......@@ -945,20 +943,6 @@ public class SPARCFrame extends Frame {
}
private Frame senderForRicochetFrame(SPARCRegisterMap map) {
if (DEBUG) {
System.out.println("senderForRicochetFrame");
}
//RicochetFrame* f = RicochetFrame::from_frame(fr);
// Cf. is_interpreted_frame path of frame::sender
Address youngerSP = getSP();
Address sp = getSenderSP();
map.makeIntegerRegsUnsaved();
map.shiftWindow(sp, youngerSP);
boolean thisFrameAdjustedStack = true; // I5_savedSP is live in this RF
return new SPARCFrame(biasSP(sp), biasSP(youngerSP), thisFrameAdjustedStack);
}
private Frame senderForEntryFrame(RegisterMap regMap) {
SPARCRegisterMap map = (SPARCRegisterMap) regMap;
......
......@@ -269,7 +269,6 @@ public class X86Frame extends Frame {
if (isEntryFrame()) return senderForEntryFrame(map);
if (isInterpretedFrame()) return senderForInterpreterFrame(map);
if (isRicochetFrame()) return senderForRicochetFrame(map);
if(cb == null) {
cb = VM.getVM().getCodeCache().findBlob(getPC());
......@@ -288,16 +287,6 @@ public class X86Frame extends Frame {
return new X86Frame(getSenderSP(), getLink(), getSenderPC());
}
private Frame senderForRicochetFrame(X86RegisterMap map) {
if (DEBUG) {
System.out.println("senderForRicochetFrame");
}
X86RicochetFrame f = X86RicochetFrame.fromFrame(this);
if (map.getUpdateMap())
updateMapWithSavedLink(map, f.senderLinkAddress());
return new X86Frame(f.extendedSenderSP(), f.exactSenderSP(), f.senderLink(), f.senderPC());
}
private Frame senderForEntryFrame(X86RegisterMap map) {
if (DEBUG) {
System.out.println("senderForEntryFrame");
......
/*
* Copyright (c) 2011, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
*
*/
package sun.jvm.hotspot.runtime.x86;
import java.util.*;
import sun.jvm.hotspot.debugger.*;
import sun.jvm.hotspot.runtime.*;
import sun.jvm.hotspot.types.*;
public class X86RicochetFrame extends VMObject {
static {
VM.registerVMInitializedObserver(new Observer() {
public void update(Observable o, Object data) {
initialize(VM.getVM().getTypeDataBase());
}
});
}
private static void initialize(TypeDataBase db) {
Type type = db.lookupType("MethodHandles::RicochetFrame");
senderLinkField = type.getAddressField("_sender_link");
savedArgsBaseField = type.getAddressField("_saved_args_base");
exactSenderSPField = type.getAddressField("_exact_sender_sp");
senderPCField = type.getAddressField("_sender_pc");
}
private static AddressField senderLinkField;
private static AddressField savedArgsBaseField;
private static AddressField exactSenderSPField;
private static AddressField senderPCField;
static X86RicochetFrame fromFrame(X86Frame f) {
return new X86RicochetFrame(f.getFP().addOffsetTo(- senderLinkField.getOffset()));
}
private X86RicochetFrame(Address addr) {
super(addr);
}
public Address senderLink() {
return senderLinkField.getValue(addr);
}
public Address senderLinkAddress() {
return addr.addOffsetTo(senderLinkField.getOffset());
}
public Address savedArgsBase() {
return savedArgsBaseField.getValue(addr);
}
public Address extendedSenderSP() {
return savedArgsBase();
}
public Address exactSenderSP() {
return exactSenderSPField.getValue(addr);
}
public Address senderPC() {
return senderPCField.getValue(addr);
}
}
......@@ -36,6 +36,14 @@ OPT_CFLAGS/BYFILE = $(OPT_CFLAGS/$@)$(OPT_CFLAGS/DEFAULT$(OPT_CFLAGS/$@))
ifeq ("${Platform_compiler}", "sparcWorks")
OPT_CFLAGS/SLOWER = -xO2
ifeq ($(COMPILER_REV_NUMERIC), 510)
# CC 5.10 has bug XXXXX with -xO4
OPT_CFLAGS/jvmtiClassFileReconstituter.o = $(OPT_CFLAGS/SLOWER)
# jvm98 crashes on solaris-i586-fastdebug and solaris-sparc-fastdebug with stack overflow
OPT_CFLAGS/escape.o = $(OPT_CFLAGS) -xspace
OPT_CFLAGS/matcher.o = $(OPT_CFLAGS) -xspace
endif # COMPILER_REV_NUMERIC == 510
ifeq ($(COMPILER_REV_NUMERIC), 509)
# To avoid jvm98 crash
OPT_CFLAGS/instanceKlass.o = $(OPT_CFLAGS/SLOWER)
......
......@@ -32,6 +32,11 @@ OPT_CFLAGS/BYFILE = $(OPT_CFLAGS/$@)$(OPT_CFLAGS/DEFAULT$(OPT_CFLAGS/$@))
# (OPT_CFLAGS/SLOWER is also available, to alter compilation of buggy files)
ifeq ("${Platform_compiler}", "sparcWorks")
ifeq ($(COMPILER_REV_NUMERIC), 510)
# CC 5.10 has bug XXXXX with -xO4
OPT_CFLAGS/jvmtiClassFileReconstituter.o = $(OPT_CFLAGS/O2)
endif # COMPILER_REV_NUMERIC == 510
ifeq ($(shell expr $(COMPILER_REV_NUMERIC) \>= 509), 1)
# dtrace cannot handle tail call optimization (6672627, 6693876)
OPT_CFLAGS/jni.o = $(OPT_CFLAGS/DEFAULT) $(OPT_CCFLAGS/NO_TAIL_CALL_OPT)
......
......@@ -40,6 +40,11 @@ endif
# (OPT_CFLAGS/SLOWER is also available, to alter compilation of buggy files)
ifeq ("${Platform_compiler}", "sparcWorks")
ifeq ($(COMPILER_REV_NUMERIC), 510)
# CC 5.10 has bug XXXXX with -xO4
OPT_CFLAGS/jvmtiClassFileReconstituter.o = $(OPT_CFLAGS/O2)
endif # COMPILER_REV_NUMERIC == 510
ifeq ($(shell expr $(COMPILER_REV_NUMERIC) \>= 509), 1)
# dtrace cannot handle tail call optimization (6672627, 6693876)
OPT_CFLAGS/jni.o = $(OPT_CFLAGS/DEFAULT) $(OPT_CCFLAGS/NO_TAIL_CALL_OPT)
......
......@@ -44,8 +44,10 @@
#ifdef PRODUCT
#define BLOCK_COMMENT(str) /* nothing */
#define STOP(error) stop(error)
#else
#define BLOCK_COMMENT(str) block_comment(str)
#define STOP(error) block_comment(error); stop(error)
#endif
// Convert the raw encoding form into the form expected by the
......@@ -992,7 +994,7 @@ void MacroAssembler::set_last_Java_frame(Register last_java_sp, Register last_Ja
save_frame(0); // to avoid clobbering O0
ld_ptr(pc_addr, L0);
br_null_short(L0, Assembler::pt, PcOk);
stop("last_Java_pc not zeroed before leaving Java");
STOP("last_Java_pc not zeroed before leaving Java");
bind(PcOk);
// Verify that flags was zeroed on return to Java
......@@ -1001,7 +1003,7 @@ void MacroAssembler::set_last_Java_frame(Register last_java_sp, Register last_Ja
tst(L0);
br(Assembler::zero, false, Assembler::pt, FlagsOk);
delayed() -> restore();
stop("flags not zeroed before leaving Java");
STOP("flags not zeroed before leaving Java");
bind(FlagsOk);
#endif /* ASSERT */
//
......@@ -1021,7 +1023,7 @@ void MacroAssembler::set_last_Java_frame(Register last_java_sp, Register last_Ja
andcc(last_java_sp, 0x01, G0);
br(Assembler::notZero, false, Assembler::pt, StackOk);
delayed()->nop();
stop("Stack Not Biased in set_last_Java_frame");
STOP("Stack Not Biased in set_last_Java_frame");
bind(StackOk);
#endif // ASSERT
assert( last_java_sp != G4_scratch, "bad register usage in set_last_Java_frame");
......@@ -1650,23 +1652,28 @@ void MacroAssembler::safepoint() {
void RegistersForDebugging::print(outputStream* s) {
FlagSetting fs(Debugging, true);
int j;
for ( j = 0; j < 8; ++j )
if ( j != 6 ) s->print_cr("i%d = 0x%.16lx", j, i[j]);
else s->print_cr( "fp = 0x%.16lx", i[j]);
for (j = 0; j < 8; ++j) {
if (j != 6) { s->print("i%d = ", j); os::print_location(s, i[j]); }
else { s->print( "fp = " ); os::print_location(s, i[j]); }
}
s->cr();
for ( j = 0; j < 8; ++j )
s->print_cr("l%d = 0x%.16lx", j, l[j]);
for (j = 0; j < 8; ++j) {
s->print("l%d = ", j); os::print_location(s, l[j]);
}
s->cr();
for ( j = 0; j < 8; ++j )
if ( j != 6 ) s->print_cr("o%d = 0x%.16lx", j, o[j]);
else s->print_cr( "sp = 0x%.16lx", o[j]);
for (j = 0; j < 8; ++j) {
if (j != 6) { s->print("o%d = ", j); os::print_location(s, o[j]); }
else { s->print( "sp = " ); os::print_location(s, o[j]); }
}
s->cr();
for ( j = 0; j < 8; ++j )
s->print_cr("g%d = 0x%.16lx", j, g[j]);
for (j = 0; j < 8; ++j) {
s->print("g%d = ", j); os::print_location(s, g[j]);
}
s->cr();
// print out floats with compression
......@@ -2020,8 +2027,8 @@ void MacroAssembler::untested(const char* what) {
char* b = new char[1024];
sprintf(b, "untested: %s", what);
if ( ShowMessageBoxOnError ) stop(b);
else warn(b);
if (ShowMessageBoxOnError) { STOP(b); }
else { warn(b); }
}
......@@ -2998,26 +3005,60 @@ void MacroAssembler::lookup_interface_method(Register recv_klass,
}
// virtual method calling
void MacroAssembler::lookup_virtual_method(Register recv_klass,
RegisterOrConstant vtable_index,
Register method_result) {
assert_different_registers(recv_klass, method_result, vtable_index.register_or_noreg());
Register sethi_temp = method_result;
const int base = (instanceKlass::vtable_start_offset() * wordSize +
// method pointer offset within the vtable entry:
vtableEntry::method_offset_in_bytes());
RegisterOrConstant vtable_offset = vtable_index;
// Each of the following three lines potentially generates an instruction.
// But the total number of address formation instructions will always be
// at most two, and will often be zero. In any case, it will be optimal.
// If vtable_index is a register, we will have (sll_ptr N,x; inc_ptr B,x; ld_ptr k,x).
// If vtable_index is a constant, we will have at most (set B+X<<N,t; ld_ptr k,t).
vtable_offset = regcon_sll_ptr(vtable_index, exact_log2(vtableEntry::size() * wordSize), vtable_offset);
vtable_offset = regcon_inc_ptr(vtable_offset, base, vtable_offset, sethi_temp);
Address vtable_entry_addr(recv_klass, ensure_simm13_or_reg(vtable_offset, sethi_temp));
ld_ptr(vtable_entry_addr, method_result);
}
void MacroAssembler::check_klass_subtype(Register sub_klass,
Register super_klass,
Register temp_reg,
Register temp2_reg,
Label& L_success) {
Label L_failure, L_pop_to_failure;
check_klass_subtype_fast_path(sub_klass, super_klass,
temp_reg, temp2_reg,
&L_success, &L_failure, NULL);
Register sub_2 = sub_klass;
Register sup_2 = super_klass;
if (!sub_2->is_global()) sub_2 = L0;
if (!sup_2->is_global()) sup_2 = L1;
bool did_save = false;
if (temp_reg == noreg || temp2_reg == noreg) {
temp_reg = L2;
temp2_reg = L3;
save_frame_and_mov(0, sub_klass, sub_2, super_klass, sup_2);
sub_klass = sub_2;
super_klass = sup_2;
did_save = true;
}
Label L_failure, L_pop_to_failure, L_pop_to_success;
check_klass_subtype_fast_path(sub_klass, super_klass,
temp_reg, temp2_reg,
(did_save ? &L_pop_to_success : &L_success),
(did_save ? &L_pop_to_failure : &L_failure), NULL);
save_frame_and_mov(0, sub_klass, sub_2, super_klass, sup_2);
if (!did_save)
save_frame_and_mov(0, sub_klass, sub_2, super_klass, sup_2);
check_klass_subtype_slow_path(sub_2, sup_2,
L2, L3, L4, L5,
NULL, &L_pop_to_failure);
// on success:
bind(L_pop_to_success);
restore();
ba_short(L_success);
......@@ -3234,54 +3275,6 @@ void MacroAssembler::check_klass_subtype_slow_path(Register sub_klass,
}
void MacroAssembler::check_method_handle_type(Register mtype_reg, Register mh_reg,
Register temp_reg,
Label& wrong_method_type) {
assert_different_registers(mtype_reg, mh_reg, temp_reg);
// compare method type against that of the receiver
RegisterOrConstant mhtype_offset = delayed_value(java_lang_invoke_MethodHandle::type_offset_in_bytes, temp_reg);
load_heap_oop(mh_reg, mhtype_offset, temp_reg);
cmp_and_brx_short(temp_reg, mtype_reg, Assembler::notEqual, Assembler::pn, wrong_method_type);
}
// A method handle has a "vmslots" field which gives the size of its
// argument list in JVM stack slots. This field is either located directly
// in every method handle, or else is indirectly accessed through the
// method handle's MethodType. This macro hides the distinction.
void MacroAssembler::load_method_handle_vmslots(Register vmslots_reg, Register mh_reg,
Register temp_reg) {
assert_different_registers(vmslots_reg, mh_reg, temp_reg);
// load mh.type.form.vmslots
Register temp2_reg = vmslots_reg;
load_heap_oop(Address(mh_reg, delayed_value(java_lang_invoke_MethodHandle::type_offset_in_bytes, temp_reg)), temp2_reg);
load_heap_oop(Address(temp2_reg, delayed_value(java_lang_invoke_MethodType::form_offset_in_bytes, temp_reg)), temp2_reg);
ld( Address(temp2_reg, delayed_value(java_lang_invoke_MethodTypeForm::vmslots_offset_in_bytes, temp_reg)), vmslots_reg);
}
void MacroAssembler::jump_to_method_handle_entry(Register mh_reg, Register temp_reg, bool emit_delayed_nop) {
assert(mh_reg == G3_method_handle, "caller must put MH object in G3");
assert_different_registers(mh_reg, temp_reg);
// pick out the interpreted side of the handler
// NOTE: vmentry is not an oop!
ld_ptr(mh_reg, delayed_value(java_lang_invoke_MethodHandle::vmentry_offset_in_bytes, temp_reg), temp_reg);
// off we go...
ld_ptr(temp_reg, MethodHandleEntry::from_interpreted_entry_offset_in_bytes(), temp_reg);
jmp(temp_reg, 0);
// for the various stubs which take control at this point,
// see MethodHandles::generate_method_handle_stub
// Some callers can fill the delay slot.
if (emit_delayed_nop) {
delayed()->nop();
}
}
RegisterOrConstant MacroAssembler::argument_offset(RegisterOrConstant arg_slot,
Register temp_reg,
int extra_slot_offset) {
......@@ -3914,7 +3907,7 @@ void MacroAssembler::verify_tlab() {
ld_ptr(G2_thread, in_bytes(JavaThread::tlab_start_offset()), t2);
or3(t1, t2, t3);
cmp_and_br_short(t1, t2, Assembler::greaterEqual, Assembler::pn, next);
stop("assert(top >= start)");
STOP("assert(top >= start)");
should_not_reach_here();
bind(next);
......@@ -3922,13 +3915,13 @@ void MacroAssembler::verify_tlab() {
ld_ptr(G2_thread, in_bytes(JavaThread::tlab_end_offset()), t2);
or3(t3, t2, t3);
cmp_and_br_short(t1, t2, Assembler::lessEqual, Assembler::pn, next2);
stop("assert(top <= end)");
STOP("assert(top <= end)");
should_not_reach_here();
bind(next2);
and3(t3, MinObjAlignmentInBytesMask, t3);
cmp_and_br_short(t3, 0, Assembler::lessEqual, Assembler::pn, ok);
stop("assert(aligned)");
STOP("assert(aligned)");
should_not_reach_here();
bind(ok);
......@@ -3976,7 +3969,7 @@ void MacroAssembler::eden_allocate(
btst(MinObjAlignmentInBytesMask, obj);
br(Assembler::zero, false, Assembler::pt, L);
delayed()->nop();
stop("eden top is not properly aligned");
STOP("eden top is not properly aligned");
bind(L);
}
#endif // ASSERT
......@@ -4013,7 +4006,7 @@ void MacroAssembler::eden_allocate(
btst(MinObjAlignmentInBytesMask, top_addr);
br(Assembler::zero, false, Assembler::pt, L);
delayed()->nop();
stop("eden top is not properly aligned");
STOP("eden top is not properly aligned");
bind(L);
}
#endif // ASSERT
......@@ -4066,7 +4059,7 @@ void MacroAssembler::tlab_allocate(
btst(MinObjAlignmentInBytesMask, free);
br(Assembler::zero, false, Assembler::pt, L);
delayed()->nop();
stop("updated TLAB free is not properly aligned");
STOP("updated TLAB free is not properly aligned");
bind(L);
}
#endif // ASSERT
......@@ -4164,7 +4157,7 @@ void MacroAssembler::tlab_refill(Label& retry, Label& try_eden, Label& slow_case
ld_ptr(G2_thread, in_bytes(JavaThread::tlab_size_offset()), t2);
sll_ptr(t2, LogHeapWordSize, t2);
cmp_and_br_short(t1, t2, Assembler::equal, Assembler::pt, ok);
stop("assert(t1 == tlab_size)");
STOP("assert(t1 == tlab_size)");
should_not_reach_here();
bind(ok);
......
......@@ -2538,6 +2538,11 @@ public:
Register temp_reg, Register temp2_reg,
Label& no_such_interface);
// virtual method calling
void lookup_virtual_method(Register recv_klass,
RegisterOrConstant vtable_index,
Register method_result);
// Test sub_klass against super_klass, with fast and slow paths.
// The fast path produces a tri-state answer: yes / no / maybe-slow.
......@@ -2577,12 +2582,6 @@ public:
Label& L_success);
// method handles (JSR 292)
void check_method_handle_type(Register mtype_reg, Register mh_reg,
Register temp_reg,
Label& wrong_method_type);
void load_method_handle_vmslots(Register vmslots_reg, Register mh_reg,
Register temp_reg);
void jump_to_method_handle_entry(Register mh_reg, Register temp_reg, bool emit_delayed_nop = true);
// offset relative to Gargs of argument at tos[arg_slot].
// (arg_slot == 0 means the last argument, not the first).
RegisterOrConstant argument_offset(RegisterOrConstant arg_slot,
......@@ -2590,7 +2589,7 @@ public:
int extra_slot_offset = 0);
// Address of Gargs and argument_offset.
Address argument_address(RegisterOrConstant arg_slot,
Register temp_reg,
Register temp_reg = noreg,
int extra_slot_offset = 0);
// Stack overflow checking
......
......@@ -2956,6 +2956,7 @@ void LIR_Assembler::emit_lock(LIR_OpLock* op) {
void LIR_Assembler::emit_profile_call(LIR_OpProfileCall* op) {
ciMethod* method = op->profiled_method();
int bci = op->profiled_bci();
ciMethod* callee = op->profiled_callee();
// Update counter for all call types
ciMethodData* md = method->method_data_or_null();
......@@ -2984,9 +2985,11 @@ void LIR_Assembler::emit_profile_call(LIR_OpProfileCall* op) {
Address counter_addr(mdo, md->byte_offset_of_slot(data, CounterData::count_offset()) - mdo_offset_bias);
Bytecodes::Code bc = method->java_code_at_bci(bci);
const bool callee_is_static = callee->is_loaded() && callee->is_static();
// Perform additional virtual call profiling for invokevirtual and
// invokeinterface bytecodes
if ((bc == Bytecodes::_invokevirtual || bc == Bytecodes::_invokeinterface) &&
!callee_is_static && // required for optimized MH invokes
C1ProfileVirtualCalls) {
assert(op->recv()->is_single_cpu(), "recv must be allocated");
Register recv = op->recv()->as_register();
......
......@@ -515,9 +515,9 @@ address InterpreterGenerator::generate_accessor_entry(void) {
// Need to differentiate between igetfield, agetfield, bgetfield etc.
// because they are different sizes.
// Get the type from the constant pool cache
__ srl(G1_scratch, ConstantPoolCacheEntry::tosBits, G1_scratch);
// Make sure we don't need to mask G1_scratch for tosBits after the above shift
ConstantPoolCacheEntry::verify_tosBits();
__ srl(G1_scratch, ConstantPoolCacheEntry::tos_state_shift, G1_scratch);
// Make sure we don't need to mask G1_scratch after the above shift
ConstantPoolCacheEntry::verify_tos_state_shift();
__ cmp(G1_scratch, atos );
__ br(Assembler::equal, true, Assembler::pt, xreturn_path);
__ delayed()->ld_ptr(Otos_i, G3_scratch, Otos_i);
......
......@@ -514,7 +514,6 @@ frame frame::sender(RegisterMap* map) const {
// interpreted but its pc is in the code cache (for c1 -> osr_frame_return_id stub), so it must be
// explicitly recognized.
if (is_ricochet_frame()) return sender_for_ricochet_frame(map);
bool frame_is_interpreted = is_interpreted_frame();
if (frame_is_interpreted) {
......@@ -821,9 +820,7 @@ void frame::describe_pd(FrameValues& values, int frame_no) {
values.describe(frame_no, sp() + w, err_msg("register save area word %d", w), 1);
}
if (is_ricochet_frame()) {
MethodHandles::RicochetFrame::describe(this, values, frame_no);
} else if (is_interpreted_frame()) {
if (is_interpreted_frame()) {
DESCRIBE_FP_OFFSET(interpreter_frame_d_scratch_fp);
DESCRIBE_FP_OFFSET(interpreter_frame_l_scratch_fp);
DESCRIBE_FP_OFFSET(interpreter_frame_padding);
......
......@@ -505,7 +505,7 @@ void InterpreterMacroAssembler::store_ptr(int n, Register val) {
void InterpreterMacroAssembler::load_receiver(Register param_count,
Register recv) {
sll(param_count, Interpreter::logStackElementSize, param_count);
ld_ptr(Lesp, param_count, recv); // gets receiver Oop
ld_ptr(Lesp, param_count, recv); // gets receiver oop
}
void InterpreterMacroAssembler::empty_expression_stack() {
......@@ -767,8 +767,12 @@ void InterpreterMacroAssembler::get_cache_and_index_and_bytecode_at_bcp(Register
get_cache_and_index_at_bcp(cache, temp, bcp_offset, index_size);
ld_ptr(cache, constantPoolCacheOopDesc::base_offset() + ConstantPoolCacheEntry::indices_offset(), bytecode);
const int shift_count = (1 + byte_no) * BitsPerByte;
srl( bytecode, shift_count, bytecode);
and3(bytecode, 0xFF, bytecode);
assert((byte_no == TemplateTable::f1_byte && shift_count == ConstantPoolCacheEntry::bytecode_1_shift) ||
(byte_no == TemplateTable::f2_byte && shift_count == ConstantPoolCacheEntry::bytecode_2_shift),
"correct shift count");
srl(bytecode, shift_count, bytecode);
assert(ConstantPoolCacheEntry::bytecode_1_mask == ConstantPoolCacheEntry::bytecode_2_mask, "common mask");
and3(bytecode, ConstantPoolCacheEntry::bytecode_1_mask, bytecode);
}
......
......@@ -32,7 +32,6 @@
address generate_normal_entry(bool synchronized);
address generate_native_entry(bool synchronized);
address generate_abstract_entry(void);
address generate_method_handle_entry(void);
address generate_math_entry(AbstractInterpreter::MethodKind kind);
address generate_empty_entry(void);
address generate_accessor_entry(void);
......
......@@ -255,17 +255,6 @@ address InterpreterGenerator::generate_abstract_entry(void) {
}
// Method handle invoker
// Dispatch a method of the form java.lang.invoke.MethodHandles::invoke(...)
address InterpreterGenerator::generate_method_handle_entry(void) {
if (!EnableInvokeDynamic) {
return generate_abstract_entry();
}
return MethodHandles::generate_method_handle_interpreter_entry(_masm);
}
//----------------------------------------------------------------------------------------------------
// Entry points & stack frame layout
//
......@@ -395,7 +384,7 @@ address AbstractInterpreterGenerator::generate_method_entry(AbstractInterpreter:
case Interpreter::empty : entry_point = ((InterpreterGenerator*)this)->generate_empty_entry(); break;
case Interpreter::accessor : entry_point = ((InterpreterGenerator*)this)->generate_accessor_entry(); break;
case Interpreter::abstract : entry_point = ((InterpreterGenerator*)this)->generate_abstract_entry(); break;
case Interpreter::method_handle : entry_point = ((InterpreterGenerator*)this)->generate_method_handle_entry(); break;
case Interpreter::java_lang_math_sin : break;
case Interpreter::java_lang_math_cos : break;
case Interpreter::java_lang_math_tan : break;
......@@ -407,7 +396,9 @@ address AbstractInterpreterGenerator::generate_method_entry(AbstractInterpreter:
case Interpreter::java_lang_math_exp : break;
case Interpreter::java_lang_ref_reference_get
: entry_point = ((InterpreterGenerator*)this)->generate_Reference_get_entry(); break;
default : ShouldNotReachHere(); break;
default:
fatal(err_msg("unexpected method kind: %d", kind));
break;
}
if (entry_point) return entry_point;
......
......@@ -30,186 +30,9 @@ enum /* platform_dependent_constants */ {
adapter_code_size = NOT_LP64(23000 DEBUG_ONLY(+ 40000)) LP64_ONLY(35000 DEBUG_ONLY(+ 50000))
};
public:
class RicochetFrame : public ResourceObj {
friend class MethodHandles;
private:
/*
RF field x86 SPARC
sender_pc *(rsp+0) I7-0x8
sender_link rbp I6+BIAS
exact_sender_sp rsi/r13 I5_savedSP
conversion *(rcx+&amh_conv) L5_conv
saved_args_base rax L4_sab (cf. Gargs = G4)
saved_args_layout #NULL L3_sal
saved_target *(rcx+&mh_vmtgt) L2_stgt
continuation #STUB_CON L1_cont
*/
static const Register L1_continuation ; // what to do when control gets back here
static const Register L2_saved_target ; // target method handle to invoke on saved_args
static const Register L3_saved_args_layout; // caching point for MethodTypeForm.vmlayout cookie
static const Register L4_saved_args_base ; // base of pushed arguments (slot 0, arg N) (-3)
static const Register L5_conversion ; // misc. information from original AdapterMethodHandle (-2)
frame _fr;
RicochetFrame(const frame& fr) : _fr(fr) { }
intptr_t* register_addr(Register reg) const {
assert((_fr.sp() + reg->sp_offset_in_saved_window()) == _fr.register_addr(reg), "must agree");
return _fr.register_addr(reg);
}
intptr_t register_value(Register reg) const { return *register_addr(reg); }
public:
intptr_t* continuation() const { return (intptr_t*) register_value(L1_continuation); }
oop saved_target() const { return (oop) register_value(L2_saved_target); }
oop saved_args_layout() const { return (oop) register_value(L3_saved_args_layout); }
intptr_t* saved_args_base() const { return (intptr_t*) register_value(L4_saved_args_base); }
intptr_t conversion() const { return register_value(L5_conversion); }
intptr_t* exact_sender_sp() const { return (intptr_t*) register_value(I5_savedSP); }
intptr_t* sender_link() const { return _fr.sender_sp(); } // XXX
address sender_pc() const { return _fr.sender_pc(); }
// This value is not used for much, but it apparently must be nonzero.
static int frame_size_in_bytes() { return wordSize * 4; }
intptr_t* extended_sender_sp() const { return saved_args_base(); }
intptr_t return_value_slot_number() const {
return adapter_conversion_vminfo(conversion());
}
BasicType return_value_type() const {
return adapter_conversion_dest_type(conversion());
}
bool has_return_value_slot() const {
return return_value_type() != T_VOID;
}
intptr_t* return_value_slot_addr() const {
assert(has_return_value_slot(), "");
return saved_arg_slot_addr(return_value_slot_number());
}
intptr_t* saved_target_slot_addr() const {
return saved_arg_slot_addr(saved_args_length());
}
intptr_t* saved_arg_slot_addr(int slot) const {
assert(slot >= 0, "");
return (intptr_t*)( (address)saved_args_base() + (slot * Interpreter::stackElementSize) );
}
jint saved_args_length() const;
jint saved_arg_offset(int arg) const;
// GC interface
oop* saved_target_addr() { return (oop*)register_addr(L2_saved_target); }
oop* saved_args_layout_addr() { return (oop*)register_addr(L3_saved_args_layout); }
oop compute_saved_args_layout(bool read_cache, bool write_cache);
#ifdef ASSERT
// The magic number is supposed to help find ricochet frames within the bytes of stack dumps.
enum { MAGIC_NUMBER_1 = 0xFEED03E, MAGIC_NUMBER_2 = 0xBEEF03E };
static const Register L0_magic_number_1 ; // cookie for debugging, at start of RSA
static Address magic_number_2_addr() { return Address(L4_saved_args_base, -wordSize); }
intptr_t magic_number_1() const { return register_value(L0_magic_number_1); }
intptr_t magic_number_2() const { return saved_args_base()[-1]; }
#endif //ASSERT
public:
enum { RETURN_VALUE_PLACEHOLDER = (NOT_DEBUG(0) DEBUG_ONLY(42)) };
void verify() const NOT_DEBUG_RETURN; // check for MAGIC_NUMBER, etc.
static void generate_ricochet_blob(MacroAssembler* _masm,
// output params:
int* bounce_offset,
int* exception_offset,
int* frame_size_in_words);
static void enter_ricochet_frame(MacroAssembler* _masm,
Register recv_reg,
Register argv_reg,
address return_handler);
static void leave_ricochet_frame(MacroAssembler* _masm,
Register recv_reg,
Register new_sp_reg,
Register sender_pc_reg);
static RicochetFrame* from_frame(const frame& fr) {
RicochetFrame* rf = new RicochetFrame(fr);
rf->verify();
return rf;
}
static void verify_clean(MacroAssembler* _masm) NOT_DEBUG_RETURN;
static void describe(const frame* fr, FrameValues& values, int frame_no) PRODUCT_RETURN;
};
// Additional helper methods for MethodHandles code generation:
public:
static void load_klass_from_Class(MacroAssembler* _masm, Register klass_reg, Register temp_reg, Register temp2_reg);
static void load_conversion_vminfo(MacroAssembler* _masm, Address conversion_field_addr, Register reg);
static void extract_conversion_vminfo(MacroAssembler* _masm, Register conversion_field_reg, Register reg);
static void extract_conversion_dest_type(MacroAssembler* _masm, Register conversion_field_reg, Register reg);
static void load_stack_move(MacroAssembler* _masm,
Address G3_amh_conversion,
Register G5_stack_move);
static void insert_arg_slots(MacroAssembler* _masm,
RegisterOrConstant arg_slots,
Register argslot_reg,
Register temp_reg, Register temp2_reg, Register temp3_reg);
static void remove_arg_slots(MacroAssembler* _masm,
RegisterOrConstant arg_slots,
Register argslot_reg,
Register temp_reg, Register temp2_reg, Register temp3_reg);
static void push_arg_slots(MacroAssembler* _masm,
Register argslot_reg,
RegisterOrConstant slot_count,
Register temp_reg, Register temp2_reg);
static void move_arg_slots_up(MacroAssembler* _masm,
Register bottom_reg, // invariant
Address top_addr, // can use temp_reg
RegisterOrConstant positive_distance_in_slots,
Register temp_reg, Register temp2_reg);
static void move_arg_slots_down(MacroAssembler* _masm,
Address bottom_addr, // can use temp_reg
Register top_reg, // invariant
RegisterOrConstant negative_distance_in_slots,
Register temp_reg, Register temp2_reg);
static void move_typed_arg(MacroAssembler* _masm,
BasicType type, bool is_element,
Address value_src, Address slot_dest,
Register temp_reg);
static void move_return_value(MacroAssembler* _masm, BasicType type,
Address return_slot);
static void verify_argslot(MacroAssembler* _masm, Register argslot_reg,
Register temp_reg,
const char* error_message) NOT_DEBUG_RETURN;
static void verify_argslots(MacroAssembler* _masm,
RegisterOrConstant argslot_count,
Register argslot_reg,
Register temp_reg,
Register temp2_reg,
bool negate_argslot,
const char* error_message) NOT_DEBUG_RETURN;
static void verify_stack_move(MacroAssembler* _masm,
RegisterOrConstant arg_slots,
int direction) NOT_DEBUG_RETURN;
static void verify_klass(MacroAssembler* _masm,
Register obj_reg, KlassHandle klass,
......@@ -223,8 +46,17 @@ public:
"reference is a MH");
}
static void verify_ref_kind(MacroAssembler* _masm, int ref_kind, Register member_reg, Register temp) NOT_DEBUG_RETURN;
// Similar to InterpreterMacroAssembler::jump_from_interpreted.
// Takes care of special dispatch from single stepping too.
static void jump_from_method_handle(MacroAssembler* _masm, Register method, Register temp, Register temp2);
static void jump_from_method_handle(MacroAssembler* _masm, Register method,
Register temp, Register temp2,
bool for_compiler_entry);
static void jump_to_lambda_form(MacroAssembler* _masm,
Register recv, Register method_temp,
Register temp2, Register temp3,
bool for_compiler_entry);
static void trace_method_handle(MacroAssembler* _masm, const char* adaptername) PRODUCT_RETURN;
......@@ -400,13 +400,13 @@ int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
case T_LONG: // LP64, longs compete with int args
assert(sig_bt[i+1] == T_VOID, "");
#ifdef _LP64
if (int_reg_cnt < int_reg_max) int_reg_cnt++;
if (int_reg_cnt < int_reg_max) int_reg_cnt++;
#endif
break;
case T_OBJECT:
case T_ARRAY:
case T_ADDRESS: // Used, e.g., in slow-path locking for the lock's stack address
if (int_reg_cnt < int_reg_max) int_reg_cnt++;
if (int_reg_cnt < int_reg_max) int_reg_cnt++;
#ifndef _LP64
else stk_reg_pairs++;
#endif
......@@ -416,11 +416,11 @@ int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
case T_CHAR:
case T_BYTE:
case T_BOOLEAN:
if (int_reg_cnt < int_reg_max) int_reg_cnt++;
if (int_reg_cnt < int_reg_max) int_reg_cnt++;
else stk_reg_pairs++;
break;
case T_FLOAT:
if (flt_reg_cnt < flt_reg_max) flt_reg_cnt++;
if (flt_reg_cnt < flt_reg_max) flt_reg_cnt++;
else stk_reg_pairs++;
break;
case T_DOUBLE:
......@@ -436,7 +436,6 @@ int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
// This is where the longs/doubles start on the stack.
stk_reg_pairs = (stk_reg_pairs+1) & ~1; // Round
int int_reg_pairs = (int_reg_cnt+1) & ~1; // 32-bit 2-reg longs only
int flt_reg_pairs = (flt_reg_cnt+1) & ~1;
// int stk_reg = frame::register_save_words*(wordSize>>2);
......@@ -517,24 +516,15 @@ int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
stk_reg_pairs += 2;
}
#else // COMPILER2
if (int_reg_pairs + 1 < int_reg_max) {
if (is_outgoing) {
regs[i].set_pair(as_oRegister(int_reg_pairs + 1)->as_VMReg(), as_oRegister(int_reg_pairs)->as_VMReg());
} else {
regs[i].set_pair(as_iRegister(int_reg_pairs + 1)->as_VMReg(), as_iRegister(int_reg_pairs)->as_VMReg());
}
int_reg_pairs += 2;
} else {
regs[i].set2(VMRegImpl::stack2reg(stk_reg_pairs));
stk_reg_pairs += 2;
}
#endif // COMPILER2
#endif // _LP64
break;
case T_FLOAT:
if (flt_reg < flt_reg_max) regs[i].set1(as_FloatRegister(flt_reg++)->as_VMReg());
else regs[i].set1( VMRegImpl::stack2reg(stk_reg++));
else regs[i].set1(VMRegImpl::stack2reg(stk_reg++));
break;
case T_DOUBLE:
assert(sig_bt[i+1] == T_VOID, "expecting half");
......@@ -886,6 +876,20 @@ void AdapterGenerator::gen_c2i_adapter(
__ delayed()->add(SP, G1, Gargs);
}
static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, Register temp2_reg,
address code_start, address code_end,
Label& L_ok) {
Label L_fail;
__ set(ExternalAddress(code_start), temp_reg);
__ set(pointer_delta(code_end, code_start, 1), temp2_reg);
__ cmp(pc_reg, temp_reg);
__ brx(Assembler::lessEqualUnsigned, false, Assembler::pn, L_fail);
__ delayed()->add(temp_reg, temp2_reg, temp_reg);
__ cmp(pc_reg, temp_reg);
__ cmp_and_brx_short(pc_reg, temp_reg, Assembler::lessUnsigned, Assembler::pt, L_ok);
__ bind(L_fail);
}
void AdapterGenerator::gen_i2c_adapter(
int total_args_passed,
// VMReg max_arg,
......@@ -907,6 +911,51 @@ void AdapterGenerator::gen_i2c_adapter(
// This removes all sorts of headaches on the x86 side and also eliminates
// the possibility of having c2i -> i2c -> c2i -> ... endless transitions.
// More detail:
// Adapters can be frameless because they do not require the caller
// to perform additional cleanup work, such as correcting the stack pointer.
// An i2c adapter is frameless because the *caller* frame, which is interpreted,
// routinely repairs its own stack pointer (from interpreter_frame_last_sp),
// even if a callee has modified the stack pointer.
// A c2i adapter is frameless because the *callee* frame, which is interpreted,
// routinely repairs its caller's stack pointer (from sender_sp, which is set
// up via the senderSP register).
// In other words, if *either* the caller or callee is interpreted, we can
// get the stack pointer repaired after a call.
// This is why c2i and i2c adapters cannot be indefinitely composed.
// In particular, if a c2i adapter were to somehow call an i2c adapter,
// both caller and callee would be compiled methods, and neither would
// clean up the stack pointer changes performed by the two adapters.
// If this happens, control eventually transfers back to the compiled
// caller, but with an uncorrected stack, causing delayed havoc.
if (VerifyAdapterCalls &&
(Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
// So, let's test for cascading c2i/i2c adapters right now.
// assert(Interpreter::contains($return_addr) ||
// StubRoutines::contains($return_addr),
// "i2c adapter must return to an interpreter frame");
__ block_comment("verify_i2c { ");
Label L_ok;
if (Interpreter::code() != NULL)
range_check(masm, O7, O0, O1,
Interpreter::code()->code_start(), Interpreter::code()->code_end(),
L_ok);
if (StubRoutines::code1() != NULL)
range_check(masm, O7, O0, O1,
StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
L_ok);
if (StubRoutines::code2() != NULL)
range_check(masm, O7, O0, O1,
StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
L_ok);
const char* msg = "i2c adapter must return to an interpreter frame";
__ block_comment(msg);
__ stop(msg);
__ bind(L_ok);
__ block_comment("} verify_i2ce ");
}
// As you can see from the list of inputs & outputs there are not a lot
// of temp registers to work with: mostly G1, G3 & G4.
......@@ -1937,20 +1986,156 @@ static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType
__ bind(done);
}
static void verify_oop_args(MacroAssembler* masm,
int total_args_passed,
const BasicType* sig_bt,
const VMRegPair* regs) {
Register temp_reg = G5_method; // not part of any compiled calling seq
if (VerifyOops) {
for (int i = 0; i < total_args_passed; i++) {
if (sig_bt[i] == T_OBJECT ||
sig_bt[i] == T_ARRAY) {
VMReg r = regs[i].first();
assert(r->is_valid(), "bad oop arg");
if (r->is_stack()) {
RegisterOrConstant ld_off = reg2offset(r) + STACK_BIAS;
ld_off = __ ensure_simm13_or_reg(ld_off, temp_reg);
__ ld_ptr(SP, ld_off, temp_reg);
__ verify_oop(temp_reg);
} else {
__ verify_oop(r->as_Register());
}
}
}
}
}
static void gen_special_dispatch(MacroAssembler* masm,
int total_args_passed,
int comp_args_on_stack,
vmIntrinsics::ID special_dispatch,
const BasicType* sig_bt,
const VMRegPair* regs) {
verify_oop_args(masm, total_args_passed, sig_bt, regs);
// Now write the args into the outgoing interpreter space
bool has_receiver = false;
Register receiver_reg = noreg;
int member_arg_pos = -1;
Register member_reg = noreg;
int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(special_dispatch);
if (ref_kind != 0) {
member_arg_pos = total_args_passed - 1; // trailing MemberName argument
member_reg = G5_method; // known to be free at this point
has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
} else if (special_dispatch == vmIntrinsics::_invokeBasic) {
has_receiver = true;
} else {
fatal(err_msg("special_dispatch=%d", special_dispatch));
}
if (member_reg != noreg) {
// Load the member_arg into register, if necessary.
assert(member_arg_pos >= 0 && member_arg_pos < total_args_passed, "oob");
assert(sig_bt[member_arg_pos] == T_OBJECT, "dispatch argument must be an object");
VMReg r = regs[member_arg_pos].first();
assert(r->is_valid(), "bad member arg");
if (r->is_stack()) {
RegisterOrConstant ld_off = reg2offset(r) + STACK_BIAS;
ld_off = __ ensure_simm13_or_reg(ld_off, member_reg);
__ ld_ptr(SP, ld_off, member_reg);
} else {
// no data motion is needed
member_reg = r->as_Register();
}
}
if (has_receiver) {
// Make sure the receiver is loaded into a register.
assert(total_args_passed > 0, "oob");
assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
VMReg r = regs[0].first();
assert(r->is_valid(), "bad receiver arg");
if (r->is_stack()) {
// Porting note: This assumes that compiled calling conventions always
// pass the receiver oop in a register. If this is not true on some
// platform, pick a temp and load the receiver from stack.
assert(false, "receiver always in a register");
receiver_reg = G3_scratch; // known to be free at this point
RegisterOrConstant ld_off = reg2offset(r) + STACK_BIAS;
ld_off = __ ensure_simm13_or_reg(ld_off, member_reg);
__ ld_ptr(SP, ld_off, receiver_reg);
} else {
// no data motion is needed
receiver_reg = r->as_Register();
}
}
// Figure out which address we are really jumping to:
MethodHandles::generate_method_handle_dispatch(masm, special_dispatch,
receiver_reg, member_reg, /*for_compiler_entry:*/ true);
}
// ---------------------------------------------------------------------------
// Generate a native wrapper for a given method. The method takes arguments
// in the Java compiled code convention, marshals them to the native
// convention (handlizes oops, etc), transitions to native, makes the call,
// returns to java state (possibly blocking), unhandlizes any result and
// returns.
//
// Critical native functions are a shorthand for the use of
// GetPrimtiveArrayCritical and disallow the use of any other JNI
// functions. The wrapper is expected to unpack the arguments before
// passing them to the callee and perform checks before and after the
// native call to ensure that they GC_locker
// lock_critical/unlock_critical semantics are followed. Some other
// parts of JNI setup are skipped like the tear down of the JNI handle
// block and the check for pending exceptions it's impossible for them
// to be thrown.
//
// They are roughly structured like this:
// if (GC_locker::needs_gc())
// SharedRuntime::block_for_jni_critical();
// tranistion to thread_in_native
// unpack arrray arguments and call native entry point
// check for safepoint in progress
// check if any thread suspend flags are set
// call into JVM and possible unlock the JNI critical
// if a GC was suppressed while in the critical native.
// transition back to thread_in_Java
// return to caller
//
nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
methodHandle method,
int compile_id,
int total_in_args,
int comp_args_on_stack, // in VMRegStackSlots
BasicType *in_sig_bt,
VMRegPair *in_regs,
BasicType* in_sig_bt,
VMRegPair* in_regs,
BasicType ret_type) {
if (method->is_method_handle_intrinsic()) {
vmIntrinsics::ID iid = method->intrinsic_id();
intptr_t start = (intptr_t)__ pc();
int vep_offset = ((intptr_t)__ pc()) - start;
gen_special_dispatch(masm,
total_in_args,
comp_args_on_stack,
method->intrinsic_id(),
in_sig_bt,
in_regs);
int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
__ flush();
int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
return nmethod::new_native_nmethod(method,
compile_id,
masm->code(),
vep_offset,
frame_complete,
stack_slots / VMRegImpl::slots_per_word,
in_ByteSize(-1),
in_ByteSize(-1),
(OopMapSet*)NULL);
}
bool is_critical_native = true;
address native_func = method->critical_native_function();
if (native_func == NULL) {
......
......@@ -3404,14 +3404,6 @@ class StubGenerator: public StubCodeGenerator {
StubRoutines::_atomic_add_ptr_entry = StubRoutines::_atomic_add_entry;
#endif // COMPILER2 !=> _LP64
// Build this early so it's available for the interpreter. The
// stub expects the required and actual type to already be in O1
// and O2 respectively.
StubRoutines::_throw_WrongMethodTypeException_entry =
generate_throw_exception("WrongMethodTypeException throw_exception",
CAST_FROM_FN_PTR(address, SharedRuntime::throw_WrongMethodTypeException),
G5_method_type, G3_method_handle);
// Build this early so it's available for the interpreter.
StubRoutines::_throw_StackOverflowError_entry = generate_throw_exception("StackOverflowError throw_exception", CAST_FROM_FN_PTR(address, SharedRuntime::throw_StackOverflowError));
}
......
......@@ -694,9 +694,9 @@ address InterpreterGenerator::generate_accessor_entry(void) {
// Need to differentiate between igetfield, agetfield, bgetfield etc.
// because they are different sizes.
// Get the type from the constant pool cache
__ srl(G1_scratch, ConstantPoolCacheEntry::tosBits, G1_scratch);
// Make sure we don't need to mask G1_scratch for tosBits after the above shift
ConstantPoolCacheEntry::verify_tosBits();
__ srl(G1_scratch, ConstantPoolCacheEntry::tos_state_shift, G1_scratch);
// Make sure we don't need to mask G1_scratch after the above shift
ConstantPoolCacheEntry::verify_tos_state_shift();
__ cmp(G1_scratch, atos );
__ br(Assembler::equal, true, Assembler::pt, xreturn_path);
__ delayed()->ld_ptr(Otos_i, G3_scratch, Otos_i);
......@@ -1662,7 +1662,7 @@ int AbstractInterpreter::layout_activation(methodOop method,
int computed_sp_adjustment = (delta > 0) ? round_to(delta, WordsPerLong) : 0;
*interpreter_frame->register_addr(I5_savedSP) = (intptr_t) (fp + computed_sp_adjustment) - STACK_BIAS;
} else {
assert(caller->is_compiled_frame() || caller->is_entry_frame() || caller->is_ricochet_frame(), "only possible cases");
assert(caller->is_compiled_frame() || caller->is_entry_frame(), "only possible cases");
// Don't have Lesp available; lay out locals block in the caller
// adjacent to the register window save area.
//
......
......@@ -25,6 +25,13 @@
#ifndef CPU_SPARC_VM_TEMPLATETABLE_SPARC_HPP
#define CPU_SPARC_VM_TEMPLATETABLE_SPARC_HPP
static void prepare_invoke(int byte_no,
Register method, // linked method (or i-klass)
Register ra, // return address
Register index = noreg, // itable index, MethodType, etc.
Register recv = noreg, // if caller wants to see it
Register flags = noreg // if caller wants to test it
);
// helper function
static void invokevfinal_helper(Register Rcache, Register Rret);
static void invokeinterface_object_method(Register RklassOop, Register Rcall,
......
......@@ -70,7 +70,6 @@ VtableStub* VtableStubs::create_vtable_stub(int vtable_index) {
__ load_klass(O0, G3_scratch);
// set methodOop (in case of interpreted method), and destination address
int entry_offset = instanceKlass::vtable_start_offset() + vtable_index*vtableEntry::size();
#ifndef PRODUCT
if (DebugVtables) {
Label L;
......@@ -82,13 +81,8 @@ VtableStub* VtableStubs::create_vtable_stub(int vtable_index) {
__ bind(L);
}
#endif
int v_off = entry_offset*wordSize + vtableEntry::method_offset_in_bytes();
if (Assembler::is_simm13(v_off)) {
__ ld_ptr(G3, v_off, G5_method);
} else {
__ set(v_off,G5);
__ ld_ptr(G3, G5, G5_method);
}
__ lookup_virtual_method(G3_scratch, vtable_index, G5_method);
#ifndef PRODUCT
if (DebugVtables) {
......
......@@ -41,6 +41,15 @@
#include "gc_implementation/g1/heapRegion.hpp"
#endif
#ifdef PRODUCT
#define BLOCK_COMMENT(str) /* nothing */
#define STOP(error) stop(error)
#else
#define BLOCK_COMMENT(str) block_comment(str)
#define STOP(error) block_comment(error); stop(error)
#endif
#define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
// Implementation of AddressLiteral
AddressLiteral::AddressLiteral(address target, relocInfo::relocType rtype) {
......@@ -5508,23 +5517,7 @@ void MacroAssembler::debug32(int rdi, int rsi, int rbp, int rsp, int rbx, int rd
// To see where a verify_oop failed, get $ebx+40/X for this frame.
// This is the value of eip which points to where verify_oop will return.
if (os::message_box(msg, "Execution stopped, print registers?")) {
ttyLocker ttyl;
tty->print_cr("eip = 0x%08x", eip);
#ifndef PRODUCT
if ((WizardMode || Verbose) && PrintMiscellaneous) {
tty->cr();
findpc(eip);
tty->cr();
}
#endif
tty->print_cr("rax = 0x%08x", rax);
tty->print_cr("rbx = 0x%08x", rbx);
tty->print_cr("rcx = 0x%08x", rcx);
tty->print_cr("rdx = 0x%08x", rdx);
tty->print_cr("rdi = 0x%08x", rdi);
tty->print_cr("rsi = 0x%08x", rsi);
tty->print_cr("rbp = 0x%08x", rbp);
tty->print_cr("rsp = 0x%08x", rsp);
print_state32(rdi, rsi, rbp, rsp, rbx, rdx, rcx, rax, eip);
BREAKPOINT;
assert(false, "start up GDB");
}
......@@ -5536,12 +5529,53 @@ void MacroAssembler::debug32(int rdi, int rsi, int rbp, int rsp, int rbx, int rd
ThreadStateTransition::transition(thread, _thread_in_vm, saved_state);
}
void MacroAssembler::print_state32(int rdi, int rsi, int rbp, int rsp, int rbx, int rdx, int rcx, int rax, int eip) {
ttyLocker ttyl;
FlagSetting fs(Debugging, true);
tty->print_cr("eip = 0x%08x", eip);
#ifndef PRODUCT
if ((WizardMode || Verbose) && PrintMiscellaneous) {
tty->cr();
findpc(eip);
tty->cr();
}
#endif
#define PRINT_REG(rax) \
{ tty->print("%s = ", #rax); os::print_location(tty, rax); }
PRINT_REG(rax);
PRINT_REG(rbx);
PRINT_REG(rcx);
PRINT_REG(rdx);
PRINT_REG(rdi);
PRINT_REG(rsi);
PRINT_REG(rbp);
PRINT_REG(rsp);
#undef PRINT_REG
// Print some words near top of staack.
int* dump_sp = (int*) rsp;
for (int col1 = 0; col1 < 8; col1++) {
tty->print("(rsp+0x%03x) 0x%08x: ", (int)((intptr_t)dump_sp - (intptr_t)rsp), (intptr_t)dump_sp);
os::print_location(tty, *dump_sp++);
}
for (int row = 0; row < 16; row++) {
tty->print("(rsp+0x%03x) 0x%08x: ", (int)((intptr_t)dump_sp - (intptr_t)rsp), (intptr_t)dump_sp);
for (int col = 0; col < 8; col++) {
tty->print(" 0x%08x", *dump_sp++);
}
tty->cr();
}
// Print some instructions around pc:
Disassembler::decode((address)eip-64, (address)eip);
tty->print_cr("--------");
Disassembler::decode((address)eip, (address)eip+32);
}
void MacroAssembler::stop(const char* msg) {
ExternalAddress message((address)msg);
// push address of message
pushptr(message.addr());
{ Label L; call(L, relocInfo::none); bind(L); } // push eip
pusha(); // push registers
pusha(); // push registers
call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::debug32)));
hlt();
}
......@@ -5558,6 +5592,18 @@ void MacroAssembler::warn(const char* msg) {
pop_CPU_state();
}
void MacroAssembler::print_state() {
{ Label L; call(L, relocInfo::none); bind(L); } // push eip
pusha(); // push registers
push_CPU_state();
call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::print_state32)));
pop_CPU_state();
popa();
addl(rsp, wordSize);
}
#else // _LP64
// 64 bit versions
......@@ -6023,14 +6069,33 @@ void MacroAssembler::stop(const char* msg) {
}
void MacroAssembler::warn(const char* msg) {
push(rsp);
push(rbp);
movq(rbp, rsp);
andq(rsp, -16); // align stack as required by push_CPU_state and call
push_CPU_state(); // keeps alignment at 16 bytes
lea(c_rarg0, ExternalAddress((address) msg));
call_VM_leaf(CAST_FROM_FN_PTR(address, warning), c_rarg0);
pop_CPU_state();
pop(rsp);
mov(rsp, rbp);
pop(rbp);
}
void MacroAssembler::print_state() {
address rip = pc();
pusha(); // get regs on stack
push(rbp);
movq(rbp, rsp);
andq(rsp, -16); // align stack as required by push_CPU_state and call
push_CPU_state(); // keeps alignment at 16 bytes
lea(c_rarg0, InternalAddress(rip));
lea(c_rarg1, Address(rbp, wordSize)); // pass pointer to regs array
call_VM_leaf(CAST_FROM_FN_PTR(address, MacroAssembler::print_state64), c_rarg0, c_rarg1);
pop_CPU_state();
mov(rsp, rbp);
pop(rbp);
popa();
}
#ifndef PRODUCT
......@@ -6039,7 +6104,7 @@ extern "C" void findpc(intptr_t x);
void MacroAssembler::debug64(char* msg, int64_t pc, int64_t regs[]) {
// In order to get locks to work, we need to fake a in_VM state
if (ShowMessageBoxOnError ) {
if (ShowMessageBoxOnError) {
JavaThread* thread = JavaThread::current();
JavaThreadState saved_state = thread->thread_state();
thread->set_thread_state(_thread_in_vm);
......@@ -6053,30 +6118,9 @@ void MacroAssembler::debug64(char* msg, int64_t pc, int64_t regs[]) {
// XXX correct this offset for amd64
// This is the value of eip which points to where verify_oop will return.
if (os::message_box(msg, "Execution stopped, print registers?")) {
ttyLocker ttyl;
tty->print_cr("rip = 0x%016lx", pc);
#ifndef PRODUCT
tty->cr();
findpc(pc);
tty->cr();
#endif
tty->print_cr("rax = 0x%016lx", regs[15]);
tty->print_cr("rbx = 0x%016lx", regs[12]);
tty->print_cr("rcx = 0x%016lx", regs[14]);
tty->print_cr("rdx = 0x%016lx", regs[13]);
tty->print_cr("rdi = 0x%016lx", regs[8]);
tty->print_cr("rsi = 0x%016lx", regs[9]);
tty->print_cr("rbp = 0x%016lx", regs[10]);
tty->print_cr("rsp = 0x%016lx", regs[11]);
tty->print_cr("r8 = 0x%016lx", regs[7]);
tty->print_cr("r9 = 0x%016lx", regs[6]);
tty->print_cr("r10 = 0x%016lx", regs[5]);
tty->print_cr("r11 = 0x%016lx", regs[4]);
tty->print_cr("r12 = 0x%016lx", regs[3]);
tty->print_cr("r13 = 0x%016lx", regs[2]);
tty->print_cr("r14 = 0x%016lx", regs[1]);
tty->print_cr("r15 = 0x%016lx", regs[0]);
print_state64(pc, regs);
BREAKPOINT;
assert(false, "start up GDB");
}
ThreadStateTransition::transition(thread, _thread_in_vm, saved_state);
} else {
......@@ -6087,6 +6131,54 @@ void MacroAssembler::debug64(char* msg, int64_t pc, int64_t regs[]) {
}
}
void MacroAssembler::print_state64(int64_t pc, int64_t regs[]) {
ttyLocker ttyl;
FlagSetting fs(Debugging, true);
tty->print_cr("rip = 0x%016lx", pc);
#ifndef PRODUCT
tty->cr();
findpc(pc);
tty->cr();
#endif
#define PRINT_REG(rax, value) \
{ tty->print("%s = ", #rax); os::print_location(tty, value); }
PRINT_REG(rax, regs[15]);
PRINT_REG(rbx, regs[12]);
PRINT_REG(rcx, regs[14]);
PRINT_REG(rdx, regs[13]);
PRINT_REG(rdi, regs[8]);
PRINT_REG(rsi, regs[9]);
PRINT_REG(rbp, regs[10]);
PRINT_REG(rsp, regs[11]);
PRINT_REG(r8 , regs[7]);
PRINT_REG(r9 , regs[6]);
PRINT_REG(r10, regs[5]);
PRINT_REG(r11, regs[4]);
PRINT_REG(r12, regs[3]);
PRINT_REG(r13, regs[2]);
PRINT_REG(r14, regs[1]);
PRINT_REG(r15, regs[0]);
#undef PRINT_REG
// Print some words near top of staack.
int64_t* rsp = (int64_t*) regs[11];
int64_t* dump_sp = rsp;
for (int col1 = 0; col1 < 8; col1++) {
tty->print("(rsp+0x%03x) 0x%016lx: ", (int)((intptr_t)dump_sp - (intptr_t)rsp), (int64_t)dump_sp);
os::print_location(tty, *dump_sp++);
}
for (int row = 0; row < 25; row++) {
tty->print("(rsp+0x%03x) 0x%016lx: ", (int)((intptr_t)dump_sp - (intptr_t)rsp), (int64_t)dump_sp);
for (int col = 0; col < 4; col++) {
tty->print(" 0x%016lx", *dump_sp++);
}
tty->cr();
}
// Print some instructions around pc:
Disassembler::decode((address)pc-64, (address)pc);
tty->print_cr("--------");
Disassembler::decode((address)pc, (address)pc+32);
}
#endif // _LP64
// Now versions that are common to 32/64 bit
......@@ -6456,7 +6548,7 @@ void MacroAssembler::call_VM_base(Register oop_result,
get_thread(rax);
cmpptr(java_thread, rax);
jcc(Assembler::equal, L);
stop("MacroAssembler::call_VM_base: rdi not callee saved?");
STOP("MacroAssembler::call_VM_base: rdi not callee saved?");
bind(L);
}
pop(rax);
......@@ -7196,7 +7288,7 @@ void MacroAssembler::pow_or_exp(bool is_exp, int num_fpu_regs_in_use) {
jcc(Assembler::notZero, integer);
cmpl(tmp3, 0x80000000);
jcc(Assembler::notZero, integer);
stop("integer indefinite value shouldn't be seen here");
STOP("integer indefinite value shouldn't be seen here");
bind(integer);
}
#else
......@@ -7206,7 +7298,7 @@ void MacroAssembler::pow_or_exp(bool is_exp, int num_fpu_regs_in_use) {
shlq(tmp3, 1);
jcc(Assembler::carryClear, integer);
jcc(Assembler::notZero, integer);
stop("integer indefinite value shouldn't be seen here");
STOP("integer indefinite value shouldn't be seen here");
bind(integer);
}
#endif
......@@ -8388,7 +8480,7 @@ Register MacroAssembler::tlab_refill(Label& retry,
shlptr(tsize, LogHeapWordSize);
cmpptr(t1, tsize);
jcc(Assembler::equal, ok);
stop("assert(t1 != tlab size)");
STOP("assert(t1 != tlab size)");
should_not_reach_here();
bind(ok);
......@@ -8727,6 +8819,19 @@ void MacroAssembler::lookup_interface_method(Register recv_klass,
}
// virtual method calling
void MacroAssembler::lookup_virtual_method(Register recv_klass,
RegisterOrConstant vtable_index,
Register method_result) {
const int base = instanceKlass::vtable_start_offset() * wordSize;
assert(vtableEntry::size() * wordSize == wordSize, "else adjust the scaling in the code below");
Address vtable_entry_addr(recv_klass,
vtable_index, Address::times_ptr,
base + vtableEntry::method_offset_in_bytes());
movptr(method_result, vtable_entry_addr);
}
void MacroAssembler::check_klass_subtype(Register sub_klass,
Register super_klass,
Register temp_reg,
......@@ -8976,6 +9081,7 @@ void MacroAssembler::verify_oop(Register reg, const char* s) {
// Pass register number to verify_oop_subroutine
char* b = new char[strlen(s) + 50];
sprintf(b, "verify_oop: %s: %s", reg->name(), s);
BLOCK_COMMENT("verify_oop {");
#ifdef _LP64
push(rscratch1); // save r10, trashed by movptr()
#endif
......@@ -8990,6 +9096,7 @@ void MacroAssembler::verify_oop(Register reg, const char* s) {
movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
call(rax);
// Caller pops the arguments (oop, message) and restores rax, r10
BLOCK_COMMENT("} verify_oop");
}
......@@ -9010,7 +9117,7 @@ RegisterOrConstant MacroAssembler::delayed_value_impl(intptr_t* delayed_value_ad
jcc(Assembler::notZero, L);
char* buf = new char[40];
sprintf(buf, "DelayedValue="INTPTR_FORMAT, delayed_value_addr[1]);
stop(buf);
STOP(buf);
} else {
jccb(Assembler::notZero, L);
hlt();
......@@ -9026,60 +9133,6 @@ RegisterOrConstant MacroAssembler::delayed_value_impl(intptr_t* delayed_value_ad
}
// registers on entry:
// - rax ('check' register): required MethodType
// - rcx: method handle
// - rdx, rsi, or ?: killable temp
void MacroAssembler::check_method_handle_type(Register mtype_reg, Register mh_reg,
Register temp_reg,
Label& wrong_method_type) {
Address type_addr(mh_reg, delayed_value(java_lang_invoke_MethodHandle::type_offset_in_bytes, temp_reg));
// compare method type against that of the receiver
if (UseCompressedOops) {
load_heap_oop(temp_reg, type_addr);
cmpptr(mtype_reg, temp_reg);
} else {
cmpptr(mtype_reg, type_addr);
}
jcc(Assembler::notEqual, wrong_method_type);
}
// A method handle has a "vmslots" field which gives the size of its
// argument list in JVM stack slots. This field is either located directly
// in every method handle, or else is indirectly accessed through the
// method handle's MethodType. This macro hides the distinction.
void MacroAssembler::load_method_handle_vmslots(Register vmslots_reg, Register mh_reg,
Register temp_reg) {
assert_different_registers(vmslots_reg, mh_reg, temp_reg);
// load mh.type.form.vmslots
Register temp2_reg = vmslots_reg;
load_heap_oop(temp2_reg, Address(mh_reg, delayed_value(java_lang_invoke_MethodHandle::type_offset_in_bytes, temp_reg)));
load_heap_oop(temp2_reg, Address(temp2_reg, delayed_value(java_lang_invoke_MethodType::form_offset_in_bytes, temp_reg)));
movl(vmslots_reg, Address(temp2_reg, delayed_value(java_lang_invoke_MethodTypeForm::vmslots_offset_in_bytes, temp_reg)));
}
// registers on entry:
// - rcx: method handle
// - rdx: killable temp (interpreted only)
// - rax: killable temp (compiled only)
void MacroAssembler::jump_to_method_handle_entry(Register mh_reg, Register temp_reg) {
assert(mh_reg == rcx, "caller must put MH object in rcx");
assert_different_registers(mh_reg, temp_reg);
// pick out the interpreted side of the handler
// NOTE: vmentry is not an oop!
movptr(temp_reg, Address(mh_reg, delayed_value(java_lang_invoke_MethodHandle::vmentry_offset_in_bytes, temp_reg)));
// off we go...
jmp(Address(temp_reg, MethodHandleEntry::from_interpreted_entry_offset_in_bytes()));
// for the various stubs which take control at this point,
// see MethodHandles::generate_method_handle_stub
}
Address MacroAssembler::argument_address(RegisterOrConstant arg_slot,
int extra_slot_offset) {
// cf. TemplateTable::prepare_invoke(), if (load_receiver).
......@@ -9152,14 +9205,14 @@ void MacroAssembler::verify_tlab() {
movptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_top_offset())));
cmpptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_start_offset())));
jcc(Assembler::aboveEqual, next);
stop("assert(top >= start)");
STOP("assert(top >= start)");
should_not_reach_here();
bind(next);
movptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_end_offset())));
cmpptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_top_offset())));
jcc(Assembler::aboveEqual, ok);
stop("assert(top <= end)");
STOP("assert(top <= end)");
should_not_reach_here();
bind(ok);
......@@ -9592,6 +9645,25 @@ void MacroAssembler::store_heap_oop(Address dst, Register src) {
movptr(dst, src);
}
void MacroAssembler::cmp_heap_oop(Register src1, Address src2, Register tmp) {
assert_different_registers(src1, tmp);
#ifdef _LP64
if (UseCompressedOops) {
bool did_push = false;
if (tmp == noreg) {
tmp = rax;
push(tmp);
did_push = true;
assert(!src2.uses(rsp), "can't push");
}
load_heap_oop(tmp, src2);
cmpptr(src1, tmp);
if (did_push) pop(tmp);
} else
#endif
cmpptr(src1, src2);
}
// Used for storing NULLs.
void MacroAssembler::store_heap_oop_null(Address dst) {
#ifdef _LP64
......@@ -9622,7 +9694,7 @@ void MacroAssembler::verify_heapbase(const char* msg) {
push(rscratch1); // cmpptr trashes rscratch1
cmpptr(r12_heapbase, ExternalAddress((address)Universe::narrow_oop_base_addr()));
jcc(Assembler::equal, ok);
stop(msg);
STOP(msg);
bind(ok);
pop(rscratch1);
}
......@@ -9655,7 +9727,7 @@ void MacroAssembler::encode_heap_oop_not_null(Register r) {
Label ok;
testq(r, r);
jcc(Assembler::notEqual, ok);
stop("null oop passed to encode_heap_oop_not_null");
STOP("null oop passed to encode_heap_oop_not_null");
bind(ok);
}
#endif
......@@ -9676,7 +9748,7 @@ void MacroAssembler::encode_heap_oop_not_null(Register dst, Register src) {
Label ok;
testq(src, src);
jcc(Assembler::notEqual, ok);
stop("null oop passed to encode_heap_oop_not_null2");
STOP("null oop passed to encode_heap_oop_not_null2");
bind(ok);
}
#endif
......@@ -9867,7 +9939,7 @@ void MacroAssembler::verified_entry(int framesize, bool stack_bang, bool fp_mode
cmpptr(rax, StackAlignmentInBytes-wordSize);
pop(rax);
jcc(Assembler::equal, L);
stop("Stack is not properly aligned!");
STOP("Stack is not properly aligned!");
bind(L);
}
#endif
......@@ -10541,13 +10613,6 @@ void MacroAssembler::char_arrays_equals(bool is_array_equ, Register ary1, Regist
bind(DONE);
}
#ifdef PRODUCT
#define BLOCK_COMMENT(str) /* nothing */
#else
#define BLOCK_COMMENT(str) block_comment(str)
#endif
#define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
void MacroAssembler::generate_fill(BasicType t, bool aligned,
Register to, Register value, Register count,
Register rtmp, XMMRegister xtmp) {
......
......@@ -1940,6 +1940,7 @@ class MacroAssembler: public Assembler {
void load_heap_oop(Register dst, Address src);
void load_heap_oop_not_null(Register dst, Address src);
void store_heap_oop(Address dst, Register src);
void cmp_heap_oop(Register src1, Address src2, Register tmp = noreg);
// Used for storing NULL. All other oop constants should be
// stored using routines that take a jobject.
......@@ -2117,6 +2118,11 @@ class MacroAssembler: public Assembler {
Register scan_temp,
Label& no_such_interface);
// virtual method calling
void lookup_virtual_method(Register recv_klass,
RegisterOrConstant vtable_index,
Register method_result);
// Test sub_klass against super_klass, with fast and slow paths.
// The fast path produces a tri-state answer: yes / no / maybe-slow.
......@@ -2152,15 +2158,8 @@ class MacroAssembler: public Assembler {
Label& L_success);
// method handles (JSR 292)
void check_method_handle_type(Register mtype_reg, Register mh_reg,
Register temp_reg,
Label& wrong_method_type);
void load_method_handle_vmslots(Register vmslots_reg, Register mh_reg,
Register temp_reg);
void jump_to_method_handle_entry(Register mh_reg, Register temp_reg);
Address argument_address(RegisterOrConstant arg_slot, int extra_slot_offset = 0);
//----
void set_word_if_not_zero(Register reg); // sets reg to 1 if not zero, otherwise 0
......@@ -2179,8 +2178,13 @@ class MacroAssembler: public Assembler {
// prints msg and continues
void warn(const char* msg);
// dumps registers and other state
void print_state();
static void debug32(int rdi, int rsi, int rbp, int rsp, int rbx, int rdx, int rcx, int rax, int eip, char* msg);
static void debug64(char* msg, int64_t pc, int64_t regs[]);
static void print_state32(int rdi, int rsi, int rbp, int rsp, int rbx, int rdx, int rcx, int rax, int eip);
static void print_state64(int64_t pc, int64_t regs[]);
void os_breakpoint();
......
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......@@ -38,6 +38,5 @@
address generate_empty_entry();
address generate_accessor_entry();
address generate_Reference_get_entry();
address generate_method_handle_entry();
#endif // CPU_ZERO_VM_INTERPRETERGENERATOR_ZERO_HPP
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