提交 62d3ded9 编写于 作者: K kvn

8005055: pass outputStream to more opto debug routines

Summary: pass the output stream to node->dump() and everything reachable from there
Reviewed-by: kvn
Contributed-by: goetz.lindenmaier@sap.com
上级 482ef3f8
......@@ -542,17 +542,17 @@ void print_register_type(OopMapValue::oop_types x, VMReg optional,
st->print("Oop");
break;
case OopMapValue::value_value:
st->print("Value" );
st->print("Value");
break;
case OopMapValue::narrowoop_value:
tty->print("NarrowOop" );
st->print("NarrowOop");
break;
case OopMapValue::callee_saved_value:
st->print("Callers_" );
st->print("Callers_");
optional->print_on(st);
break;
case OopMapValue::derived_oop_value:
st->print("Derived_oop_" );
st->print("Derived_oop_");
optional->print_on(st);
break;
default:
......
......@@ -165,13 +165,13 @@ uint ReturnNode::match_edge(uint idx) const {
#ifndef PRODUCT
void ReturnNode::dump_req() const {
void ReturnNode::dump_req(outputStream *st) const {
// Dump the required inputs, enclosed in '(' and ')'
uint i; // Exit value of loop
for( i=0; i<req(); i++ ) { // For all required inputs
if( i == TypeFunc::Parms ) tty->print("returns");
if( in(i) ) tty->print("%c%d ", Compile::current()->node_arena()->contains(in(i)) ? ' ' : 'o', in(i)->_idx);
else tty->print("_ ");
for (i = 0; i < req(); i++) { // For all required inputs
if (i == TypeFunc::Parms) st->print("returns");
if (in(i)) st->print("%c%d ", Compile::current()->node_arena()->contains(in(i)) ? ' ' : 'o', in(i)->_idx);
else st->print("_ ");
}
}
#endif
......@@ -208,13 +208,13 @@ uint RethrowNode::match_edge(uint idx) const {
}
#ifndef PRODUCT
void RethrowNode::dump_req() const {
void RethrowNode::dump_req(outputStream *st) const {
// Dump the required inputs, enclosed in '(' and ')'
uint i; // Exit value of loop
for( i=0; i<req(); i++ ) { // For all required inputs
if( i == TypeFunc::Parms ) tty->print("exception");
if( in(i) ) tty->print("%c%d ", Compile::current()->node_arena()->contains(in(i)) ? ' ' : 'o', in(i)->_idx);
else tty->print("_ ");
for (i = 0; i < req(); i++) { // For all required inputs
if (i == TypeFunc::Parms) st->print("exception");
if (in(i)) st->print("%c%d ", Compile::current()->node_arena()->contains(in(i)) ? ' ' : 'o', in(i)->_idx);
else st->print("_ ");
}
}
#endif
......@@ -330,7 +330,8 @@ static void format_helper( PhaseRegAlloc *regalloc, outputStream* st, Node *n, c
st->print(" %s%d]=#ScObj" INT32_FORMAT, msg, i, sco_n);
return;
}
if( OptoReg::is_valid(regalloc->get_reg_first(n))) { // Check for undefined
if (regalloc->node_regs_max_index() > 0 &&
OptoReg::is_valid(regalloc->get_reg_first(n))) { // Check for undefined
char buf[50];
regalloc->dump_register(n,buf);
st->print(" %s%d]=%s",msg,i,buf);
......@@ -381,7 +382,7 @@ static void format_helper( PhaseRegAlloc *regalloc, outputStream* st, Node *n, c
//------------------------------format-----------------------------------------
void JVMState::format(PhaseRegAlloc *regalloc, const Node *n, outputStream* st) const {
st->print(" #");
if( _method ) {
if (_method) {
_method->print_short_name(st);
st->print(" @ bci:%d ",_bci);
} else {
......@@ -393,21 +394,22 @@ void JVMState::format(PhaseRegAlloc *regalloc, const Node *n, outputStream* st)
MachSafePointNode *mcall = n->as_MachSafePoint();
uint i;
// Print locals
for( i = 0; i < (uint)loc_size(); i++ )
format_helper( regalloc, st, mcall->local(this, i), "L[", i, &scobjs );
for (i = 0; i < (uint)loc_size(); i++)
format_helper(regalloc, st, mcall->local(this, i), "L[", i, &scobjs);
// Print stack
for (i = 0; i < (uint)stk_size(); i++) {
if ((uint)(_stkoff + i) >= mcall->len())
st->print(" oob ");
else
format_helper( regalloc, st, mcall->stack(this, i), "STK[", i, &scobjs );
format_helper(regalloc, st, mcall->stack(this, i), "STK[", i, &scobjs);
}
for (i = 0; (int)i < nof_monitors(); i++) {
Node *box = mcall->monitor_box(this, i);
Node *obj = mcall->monitor_obj(this, i);
if ( OptoReg::is_valid(regalloc->get_reg_first(box)) ) {
if (regalloc->node_regs_max_index() > 0 &&
OptoReg::is_valid(regalloc->get_reg_first(box))) {
box = BoxLockNode::box_node(box);
format_helper( regalloc, st, box, "MON-BOX[", i, &scobjs );
format_helper(regalloc, st, box, "MON-BOX[", i, &scobjs);
} else {
OptoReg::Name box_reg = BoxLockNode::reg(box);
st->print(" MON-BOX%d=%s+%d",
......@@ -420,7 +422,7 @@ void JVMState::format(PhaseRegAlloc *regalloc, const Node *n, outputStream* st)
if (BoxLockNode::box_node(box)->is_eliminated())
obj_msg = "MON-OBJ(LOCK ELIMINATED)[";
}
format_helper( regalloc, st, obj, obj_msg, i, &scobjs );
format_helper(regalloc, st, obj, obj_msg, i, &scobjs);
}
for (i = 0; i < (uint)scobjs.length(); i++) {
......@@ -463,9 +465,9 @@ void JVMState::format(PhaseRegAlloc *regalloc, const Node *n, outputStream* st)
st->print(" [");
cifield = iklass->nonstatic_field_at(0);
cifield->print_name_on(st);
format_helper( regalloc, st, fld_node, ":", 0, &scobjs );
format_helper(regalloc, st, fld_node, ":", 0, &scobjs);
} else {
format_helper( regalloc, st, fld_node, "[", 0, &scobjs );
format_helper(regalloc, st, fld_node, "[", 0, &scobjs);
}
for (uint j = 1; j < nf; j++) {
fld_node = mcall->in(first_ind+j);
......@@ -473,9 +475,9 @@ void JVMState::format(PhaseRegAlloc *regalloc, const Node *n, outputStream* st)
st->print(", [");
cifield = iklass->nonstatic_field_at(j);
cifield->print_name_on(st);
format_helper( regalloc, st, fld_node, ":", j, &scobjs );
format_helper(regalloc, st, fld_node, ":", j, &scobjs);
} else {
format_helper( regalloc, st, fld_node, ", [", j, &scobjs );
format_helper(regalloc, st, fld_node, ", [", j, &scobjs);
}
}
}
......@@ -483,7 +485,7 @@ void JVMState::format(PhaseRegAlloc *regalloc, const Node *n, outputStream* st)
}
}
st->print_cr("");
if (caller() != NULL) caller()->format(regalloc, n, st);
if (caller() != NULL) caller()->format(regalloc, n, st);
}
......@@ -586,15 +588,15 @@ JVMState* JVMState::clone_deep(Compile* C) const {
uint CallNode::cmp( const Node &n ) const
{ return _tf == ((CallNode&)n)._tf && _jvms == ((CallNode&)n)._jvms; }
#ifndef PRODUCT
void CallNode::dump_req() const {
void CallNode::dump_req(outputStream *st) const {
// Dump the required inputs, enclosed in '(' and ')'
uint i; // Exit value of loop
for( i=0; i<req(); i++ ) { // For all required inputs
if( i == TypeFunc::Parms ) tty->print("(");
if( in(i) ) tty->print("%c%d ", Compile::current()->node_arena()->contains(in(i)) ? ' ' : 'o', in(i)->_idx);
else tty->print("_ ");
for (i = 0; i < req(); i++) { // For all required inputs
if (i == TypeFunc::Parms) st->print("(");
if (in(i)) st->print("%c%d ", Compile::current()->node_arena()->contains(in(i)) ? ' ' : 'o', in(i)->_idx);
else st->print("_ ");
}
tty->print(")");
st->print(")");
}
void CallNode::dump_spec(outputStream *st) const {
......
......@@ -126,7 +126,7 @@ public:
virtual uint ideal_reg() const { return NotAMachineReg; }
virtual uint match_edge(uint idx) const;
#ifndef PRODUCT
virtual void dump_req() const;
virtual void dump_req(outputStream *st = tty) const;
#endif
};
......@@ -147,7 +147,7 @@ class RethrowNode : public Node {
virtual uint match_edge(uint idx) const;
virtual uint ideal_reg() const { return NotAMachineReg; }
#ifndef PRODUCT
virtual void dump_req() const;
virtual void dump_req(outputStream *st = tty) const;
#endif
};
......@@ -579,7 +579,7 @@ public:
virtual uint match_edge(uint idx) const;
#ifndef PRODUCT
virtual void dump_req() const;
virtual void dump_req(outputStream *st = tty) const;
virtual void dump_spec(outputStream *st) const;
#endif
};
......
......@@ -506,7 +506,7 @@ int MachConstantNode::constant_offset() {
#ifndef PRODUCT
void MachNullCheckNode::format( PhaseRegAlloc *ra_, outputStream *st ) const {
int reg = ra_->get_reg_first(in(1)->in(_vidx));
tty->print("%s %s", Name(), Matcher::regName[reg]);
st->print("%s %s", Name(), Matcher::regName[reg]);
}
#endif
......
......@@ -1476,35 +1476,35 @@ static bool is_disconnected(const Node* n) {
}
#ifdef ASSERT
static void dump_orig(Node* orig) {
static void dump_orig(Node* orig, outputStream *st) {
Compile* C = Compile::current();
if (NotANode(orig)) orig = NULL;
if (orig != NULL && !C->node_arena()->contains(orig)) orig = NULL;
if (orig == NULL) return;
tty->print(" !orig=");
if (NotANode(orig)) orig = NULL;
if (orig != NULL && !C->node_arena()->contains(orig)) orig = NULL;
if (orig == NULL) return;
st->print(" !orig=");
Node* fast = orig->debug_orig(); // tortoise & hare algorithm to detect loops
if (NotANode(fast)) fast = NULL;
if (NotANode(fast)) fast = NULL;
while (orig != NULL) {
bool discon = is_disconnected(orig); // if discon, print [123] else 123
if (discon) tty->print("[");
if (discon) st->print("[");
if (!Compile::current()->node_arena()->contains(orig))
tty->print("o");
tty->print("%d", orig->_idx);
if (discon) tty->print("]");
st->print("o");
st->print("%d", orig->_idx);
if (discon) st->print("]");
orig = orig->debug_orig();
if (NotANode(orig)) orig = NULL;
if (orig != NULL && !C->node_arena()->contains(orig)) orig = NULL;
if (orig != NULL) tty->print(",");
if (NotANode(orig)) orig = NULL;
if (orig != NULL && !C->node_arena()->contains(orig)) orig = NULL;
if (orig != NULL) st->print(",");
if (fast != NULL) {
// Step fast twice for each single step of orig:
fast = fast->debug_orig();
if (NotANode(fast)) fast = NULL;
if (NotANode(fast)) fast = NULL;
if (fast != NULL && fast != orig) {
fast = fast->debug_orig();
if (NotANode(fast)) fast = NULL;
if (NotANode(fast)) fast = NULL;
}
if (fast == orig) {
tty->print("...");
st->print("...");
break;
}
}
......@@ -1531,35 +1531,34 @@ void Node::set_debug_orig(Node* orig) {
//------------------------------dump------------------------------------------
// Dump a Node
void Node::dump() const {
void Node::dump(const char* suffix, outputStream *st) const {
Compile* C = Compile::current();
bool is_new = C->node_arena()->contains(this);
_in_dump_cnt++;
tty->print("%c%d\t%s\t=== ",
is_new ? ' ' : 'o', _idx, Name());
st->print("%c%d\t%s\t=== ", is_new ? ' ' : 'o', _idx, Name());
// Dump the required and precedence inputs
dump_req();
dump_prec();
dump_req(st);
dump_prec(st);
// Dump the outputs
dump_out();
dump_out(st);
if (is_disconnected(this)) {
#ifdef ASSERT
tty->print(" [%d]",debug_idx());
dump_orig(debug_orig());
st->print(" [%d]",debug_idx());
dump_orig(debug_orig(), st);
#endif
tty->cr();
st->cr();
_in_dump_cnt--;
return; // don't process dead nodes
}
// Dump node-specific info
dump_spec(tty);
dump_spec(st);
#ifdef ASSERT
// Dump the non-reset _debug_idx
if( Verbose && WizardMode ) {
tty->print(" [%d]",debug_idx());
if (Verbose && WizardMode) {
st->print(" [%d]",debug_idx());
}
#endif
......@@ -1569,88 +1568,88 @@ void Node::dump() const {
const TypeInstPtr *toop = t->isa_instptr();
const TypeKlassPtr *tkls = t->isa_klassptr();
ciKlass* klass = toop ? toop->klass() : (tkls ? tkls->klass() : NULL );
if( klass && klass->is_loaded() && klass->is_interface() ) {
tty->print(" Interface:");
} else if( toop ) {
tty->print(" Oop:");
} else if( tkls ) {
tty->print(" Klass:");
if (klass && klass->is_loaded() && klass->is_interface()) {
st->print(" Interface:");
} else if (toop) {
st->print(" Oop:");
} else if (tkls) {
st->print(" Klass:");
}
t->dump();
} else if( t == Type::MEMORY ) {
tty->print(" Memory:");
MemNode::dump_adr_type(this, adr_type(), tty);
} else if( Verbose || WizardMode ) {
tty->print(" Type:");
if( t ) {
t->dump();
t->dump_on(st);
} else if (t == Type::MEMORY) {
st->print(" Memory:");
MemNode::dump_adr_type(this, adr_type(), st);
} else if (Verbose || WizardMode) {
st->print(" Type:");
if (t) {
t->dump_on(st);
} else {
tty->print("no type");
st->print("no type");
}
} else if (t->isa_vect() && this->is_MachSpillCopy()) {
// Dump MachSpillcopy vector type.
t->dump();
t->dump_on(st);
}
if (is_new) {
debug_only(dump_orig(debug_orig()));
debug_only(dump_orig(debug_orig(), st));
Node_Notes* nn = C->node_notes_at(_idx);
if (nn != NULL && !nn->is_clear()) {
if (nn->jvms() != NULL) {
tty->print(" !jvms:");
nn->jvms()->dump_spec(tty);
st->print(" !jvms:");
nn->jvms()->dump_spec(st);
}
}
}
tty->cr();
if (suffix) st->print(suffix);
_in_dump_cnt--;
}
//------------------------------dump_req--------------------------------------
void Node::dump_req() const {
void Node::dump_req(outputStream *st) const {
// Dump the required input edges
for (uint i = 0; i < req(); i++) { // For all required inputs
Node* d = in(i);
if (d == NULL) {
tty->print("_ ");
st->print("_ ");
} else if (NotANode(d)) {
tty->print("NotANode "); // uninitialized, sentinel, garbage, etc.
st->print("NotANode "); // uninitialized, sentinel, garbage, etc.
} else {
tty->print("%c%d ", Compile::current()->node_arena()->contains(d) ? ' ' : 'o', d->_idx);
st->print("%c%d ", Compile::current()->node_arena()->contains(d) ? ' ' : 'o', d->_idx);
}
}
}
//------------------------------dump_prec-------------------------------------
void Node::dump_prec() const {
void Node::dump_prec(outputStream *st) const {
// Dump the precedence edges
int any_prec = 0;
for (uint i = req(); i < len(); i++) { // For all precedence inputs
Node* p = in(i);
if (p != NULL) {
if( !any_prec++ ) tty->print(" |");
if (NotANode(p)) { tty->print("NotANode "); continue; }
tty->print("%c%d ", Compile::current()->node_arena()->contains(in(i)) ? ' ' : 'o', in(i)->_idx);
if (!any_prec++) st->print(" |");
if (NotANode(p)) { st->print("NotANode "); continue; }
st->print("%c%d ", Compile::current()->node_arena()->contains(in(i)) ? ' ' : 'o', in(i)->_idx);
}
}
}
//------------------------------dump_out--------------------------------------
void Node::dump_out() const {
void Node::dump_out(outputStream *st) const {
// Delimit the output edges
tty->print(" [[");
st->print(" [[");
// Dump the output edges
for (uint i = 0; i < _outcnt; i++) { // For all outputs
Node* u = _out[i];
if (u == NULL) {
tty->print("_ ");
st->print("_ ");
} else if (NotANode(u)) {
tty->print("NotANode ");
st->print("NotANode ");
} else {
tty->print("%c%d ", Compile::current()->node_arena()->contains(u) ? ' ' : 'o', u->_idx);
st->print("%c%d ", Compile::current()->node_arena()->contains(u) ? ' ' : 'o', u->_idx);
}
}
tty->print("]] ");
st->print("]] ");
}
//------------------------------dump_nodes-------------------------------------
......
......@@ -994,12 +994,13 @@ public:
#ifndef PRODUCT
Node* find(int idx) const; // Search the graph for the given idx.
Node* find_ctrl(int idx) const; // Search control ancestors for the given idx.
void dump() const; // Print this node,
void dump() const { dump("\n"); } // Print this node.
void dump(const char* suffix, outputStream *st = tty) const;// Print this node.
void dump(int depth) const; // Print this node, recursively to depth d
void dump_ctrl(int depth) const; // Print control nodes, to depth d
virtual void dump_req() const; // Print required-edge info
virtual void dump_prec() const; // Print precedence-edge info
virtual void dump_out() const; // Print the output edge info
virtual void dump_req(outputStream *st = tty) const; // Print required-edge info
virtual void dump_prec(outputStream *st = tty) const; // Print precedence-edge info
virtual void dump_out(outputStream *st = tty) const; // Print the output edge info
virtual void dump_spec(outputStream *st) const {}; // Print per-node info
void verify_edges(Unique_Node_List &visited); // Verify bi-directional edges
void verify() const; // Check Def-Use info for my subgraph
......
......@@ -77,7 +77,7 @@ class OptoReg VALUE_OBJ_CLASS_SPEC {
// (We would like to have an operator+ for RegName, but it is not
// a class, so this would be illegal in C++.)
static void dump( int );
static void dump(int, outputStream *st = tty);
// Get the stack slot number of an OptoReg::Name
static unsigned int reg2stack( OptoReg::Name r) {
......
......@@ -40,6 +40,7 @@ PhaseRegAlloc::PhaseRegAlloc( uint unique, PhaseCFG &cfg,
Phase(Register_Allocation), _cfg(cfg), _matcher(matcher),
_node_oops(Thread::current()->resource_area()),
_node_regs(0),
_node_regs_max_index(0),
_framesize(0xdeadbeef)
{
int i;
......
......@@ -108,13 +108,13 @@ int find_hihghest_bit( uint32 mask ) {
//------------------------------dump-------------------------------------------
#ifndef PRODUCT
void OptoReg::dump( int r ) {
switch( r ) {
case Special: tty->print("r---"); break;
case Bad: tty->print("rBAD"); break;
void OptoReg::dump(int r, outputStream *st) {
switch (r) {
case Special: st->print("r---"); break;
case Bad: st->print("rBAD"); break;
default:
if( r < _last_Mach_Reg ) tty->print(Matcher::regName[r]);
else tty->print("rS%d",r);
if (r < _last_Mach_Reg) st->print(Matcher::regName[r]);
else st->print("rS%d",r);
break;
}
}
......@@ -404,53 +404,53 @@ uint RegMask::Size() const {
#ifndef PRODUCT
//------------------------------print------------------------------------------
void RegMask::dump( ) const {
tty->print("[");
void RegMask::dump(outputStream *st) const {
st->print("[");
RegMask rm = *this; // Structure copy into local temp
OptoReg::Name start = rm.find_first_elem(); // Get a register
if( OptoReg::is_valid(start) ) { // Check for empty mask
if (OptoReg::is_valid(start)) { // Check for empty mask
rm.Remove(start); // Yank from mask
OptoReg::dump(start); // Print register
OptoReg::dump(start, st); // Print register
OptoReg::Name last = start;
// Now I have printed an initial register.
// Print adjacent registers as "rX-rZ" instead of "rX,rY,rZ".
// Begin looping over the remaining registers.
while( 1 ) { //
while (1) { //
OptoReg::Name reg = rm.find_first_elem(); // Get a register
if( !OptoReg::is_valid(reg) )
if (!OptoReg::is_valid(reg))
break; // Empty mask, end loop
rm.Remove(reg); // Yank from mask
if( last+1 == reg ) { // See if they are adjacent
if (last+1 == reg) { // See if they are adjacent
// Adjacent registers just collect into long runs, no printing.
last = reg;
} else { // Ending some kind of run
if( start == last ) { // 1-register run; no special printing
} else if( start+1 == last ) {
tty->print(","); // 2-register run; print as "rX,rY"
OptoReg::dump(last);
if (start == last) { // 1-register run; no special printing
} else if (start+1 == last) {
st->print(","); // 2-register run; print as "rX,rY"
OptoReg::dump(last, st);
} else { // Multi-register run; print as "rX-rZ"
tty->print("-");
OptoReg::dump(last);
st->print("-");
OptoReg::dump(last, st);
}
tty->print(","); // Seperate start of new run
st->print(","); // Seperate start of new run
start = last = reg; // Start a new register run
OptoReg::dump(start); // Print register
OptoReg::dump(start, st); // Print register
} // End of if ending a register run or not
} // End of while regmask not empty
if( start == last ) { // 1-register run; no special printing
} else if( start+1 == last ) {
tty->print(","); // 2-register run; print as "rX,rY"
OptoReg::dump(last);
if (start == last) { // 1-register run; no special printing
} else if (start+1 == last) {
st->print(","); // 2-register run; print as "rX,rY"
OptoReg::dump(last, st);
} else { // Multi-register run; print as "rX-rZ"
tty->print("-");
OptoReg::dump(last);
st->print("-");
OptoReg::dump(last, st);
}
if( rm.is_AllStack() ) tty->print("...");
if (rm.is_AllStack()) st->print("...");
}
tty->print("]");
st->print("]");
}
#endif
......@@ -310,7 +310,7 @@ public:
#ifndef PRODUCT
void print() const { dump(); }
void dump() const; // Print a mask
void dump(outputStream *st = tty) const; // Print a mask
#endif
static const RegMask Empty; // Common empty mask
......
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