1. 09 11月, 2013 1 次提交
  2. 25 10月, 2013 2 次提交
  3. 10 10月, 2013 1 次提交
    • S
      xen: introduce xen_alloc/free_coherent_pages · d6fe76c5
      Stefano Stabellini 提交于
      xen_swiotlb_alloc_coherent needs to allocate a coherent buffer for cpu
      and devices. On native x86 is sufficient to call __get_free_pages in
      order to get a coherent buffer, while on ARM (and potentially ARM64) we
      need to call the native dma_ops->alloc implementation.
      
      Introduce xen_alloc_coherent_pages to abstract the arch specific buffer
      allocation.
      
      Similarly introduce xen_free_coherent_pages to free a coherent buffer:
      on x86 is simply a call to free_pages while on ARM and ARM64 is
      arm_dma_ops.free.
      Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
      
      
      Changes in v7:
      - rename __get_dma_ops to __generic_dma_ops;
      - call __generic_dma_ops(hwdev)->alloc/free on arm64 too.
      
      Changes in v6:
      - call __get_dma_ops to get the native dma_ops pointer on arm.
      d6fe76c5
  4. 19 10月, 2013 1 次提交
  5. 10 10月, 2013 1 次提交
    • S
      xen/arm,arm64: enable SWIOTLB_XEN · 83862ccf
      Stefano Stabellini 提交于
      Xen on arm and arm64 needs SWIOTLB_XEN: when running on Xen we need to
      program the hardware with mfns rather than pfns for dma addresses.
      Remove SWIOTLB_XEN dependency on X86 and PCI and make XEN select
      SWIOTLB_XEN on arm and arm64.
      
      At the moment always rely on swiotlb-xen, but when Xen starts supporting
      hardware IOMMUs we'll be able to avoid it conditionally on the presence
      of an IOMMU on the platform.
      
      Implement xen_create_contiguous_region on arm and arm64: for the moment
      we assume that dom0 has been mapped 1:1 (physical addresses == machine
      addresses) therefore we don't need to call XENMEM_exchange. Simply
      return the physical address as dma address.
      
      Initialize the xen-swiotlb from xen_early_init (before the native
      dma_ops are initialized), set xen_dma_ops to &xen_swiotlb_dma_ops.
      Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
      
      
      Changes in v8:
      - assume dom0 is mapped 1:1, no need to call XENMEM_exchange.
      
      Changes in v7:
      - call __set_phys_to_machine_multi from xen_create_contiguous_region and
      xen_destroy_contiguous_region to update the P2M;
      - don't call XENMEM_unpin, it has been removed;
      - call XENMEM_exchange instead of XENMEM_exchange_and_pin;
      - set nr_exchanged to 0 before calling the hypercall.
      
      Changes in v6:
      - introduce and export xen_dma_ops;
      - call xen_mm_init from as arch_initcall.
      
      Changes in v4:
      - remove redefinition of DMA_ERROR_CODE;
      - update the code to use XENMEM_exchange_and_pin and XENMEM_unpin;
      - add a note about hardware IOMMU in the commit message.
      
      Changes in v3:
      - code style changes;
      - warn on XENMEM_put_dma_buf failures.
      83862ccf
  6. 18 10月, 2013 1 次提交
    • S
      arm/xen,arm64/xen: introduce p2m · 4a19138c
      Stefano Stabellini 提交于
      Introduce physical to machine and machine to physical tracking
      mechanisms based on rbtrees for arm/xen and arm64/xen.
      
      We need it because any guests on ARM are an autotranslate guests,
      therefore a physical address is potentially different from a machine
      address. When programming a device to do DMA, we need to be
      extra-careful to use machine addresses rather than physical addresses to
      program the device. Therefore we need to know the physical to machine
      mappings.
      
      For the moment we assume that dom0 starts with a 1:1 physical to machine
      mapping, in other words physical addresses correspond to machine
      addresses. However when mapping a foreign grant reference, obviously the
      1:1 model doesn't work anymore. So at the very least we need to be able
      to track grant mappings.
      
      We need locking to protect accesses to the two trees.
      Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
      
      Changes in v8:
      - move pfn_to_mfn and mfn_to_pfn to page.h as static inline functions;
      - no need to walk the tree if phys_to_mach.rb_node is NULL;
      - correctly handle multipage p2m entries;
      - substitute the spin_lock with a rwlock.
      4a19138c
  7. 15 10月, 2013 1 次提交
  8. 03 10月, 2013 1 次提交
  9. 30 9月, 2013 2 次提交
  10. 28 9月, 2013 1 次提交
  11. 25 9月, 2013 2 次提交
  12. 20 9月, 2013 3 次提交
  13. 13 9月, 2013 3 次提交
  14. 12 9月, 2013 1 次提交
    • N
      mm: migrate: check movability of hugepage in unmap_and_move_huge_page() · 83467efb
      Naoya Horiguchi 提交于
      Currently hugepage migration works well only for pmd-based hugepages
      (mainly due to lack of testing,) so we had better not enable migration of
      other levels of hugepages until we are ready for it.
      
      Some users of hugepage migration (mbind, move_pages, and migrate_pages) do
      page table walk and check pud/pmd_huge() there, so they are safe.  But the
      other users (softoffline and memory hotremove) don't do this, so without
      this patch they can try to migrate unexpected types of hugepages.
      
      To prevent this, we introduce hugepage_migration_support() as an
      architecture dependent check of whether hugepage are implemented on a pmd
      basis or not.  And on some architecture multiple sizes of hugepages are
      available, so hugepage_migration_support() also checks hugepage size.
      Signed-off-by: NNaoya Horiguchi <n-horiguchi@ah.jp.nec.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Hillf Danton <dhillf@gmail.com>
      Cc: Wanpeng Li <liwanp@linux.vnet.ibm.com>
      Cc: Mel Gorman <mgorman@suse.de>
      Cc: Hugh Dickins <hughd@google.com>
      Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
      Cc: Michal Hocko <mhocko@suse.cz>
      Cc: Rik van Riel <riel@redhat.com>
      Cc: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      83467efb
  15. 03 9月, 2013 1 次提交
  16. 02 9月, 2013 2 次提交
  17. 31 8月, 2013 1 次提交
  18. 29 8月, 2013 1 次提交
  19. 28 8月, 2013 2 次提交
  20. 22 8月, 2013 3 次提交
  21. 20 8月, 2013 5 次提交
  22. 16 8月, 2013 1 次提交
    • L
      Fix TLB gather virtual address range invalidation corner cases · 2b047252
      Linus Torvalds 提交于
      Ben Tebulin reported:
      
       "Since v3.7.2 on two independent machines a very specific Git
        repository fails in 9/10 cases on git-fsck due to an SHA1/memory
        failures.  This only occurs on a very specific repository and can be
        reproduced stably on two independent laptops.  Git mailing list ran
        out of ideas and for me this looks like some very exotic kernel issue"
      
      and bisected the failure to the backport of commit 53a59fc6 ("mm:
      limit mmu_gather batching to fix soft lockups on !CONFIG_PREEMPT").
      
      That commit itself is not actually buggy, but what it does is to make it
      much more likely to hit the partial TLB invalidation case, since it
      introduces a new case in tlb_next_batch() that previously only ever
      happened when running out of memory.
      
      The real bug is that the TLB gather virtual memory range setup is subtly
      buggered.  It was introduced in commit 597e1c35 ("mm/mmu_gather:
      enable tlb flush range in generic mmu_gather"), and the range handling
      was already fixed at least once in commit e6c495a9 ("mm: fix the TLB
      range flushed when __tlb_remove_page() runs out of slots"), but that fix
      was not complete.
      
      The problem with the TLB gather virtual address range is that it isn't
      set up by the initial tlb_gather_mmu() initialization (which didn't get
      the TLB range information), but it is set up ad-hoc later by the
      functions that actually flush the TLB.  And so any such case that forgot
      to update the TLB range entries would potentially miss TLB invalidates.
      
      Rather than try to figure out exactly which particular ad-hoc range
      setup was missing (I personally suspect it's the hugetlb case in
      zap_huge_pmd(), which didn't have the same logic as zap_pte_range()
      did), this patch just gets rid of the problem at the source: make the
      TLB range information available to tlb_gather_mmu(), and initialize it
      when initializing all the other tlb gather fields.
      
      This makes the patch larger, but conceptually much simpler.  And the end
      result is much more understandable; even if you want to play games with
      partial ranges when invalidating the TLB contents in chunks, now the
      range information is always there, and anybody who doesn't want to
      bother with it won't introduce subtle bugs.
      
      Ben verified that this fixes his problem.
      Reported-bisected-and-tested-by: NBen Tebulin <tebulin@googlemail.com>
      Build-testing-by: NStephen Rothwell <sfr@canb.auug.org.au>
      Build-testing-by: NRichard Weinberger <richard.weinberger@gmail.com>
      Reviewed-by: NMichal Hocko <mhocko@suse.cz>
      Acked-by: NPeter Zijlstra <peterz@infradead.org>
      Cc: stable@vger.kernel.org
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      2b047252
  23. 09 8月, 2013 3 次提交
    • C
      arm64: KVM: use 'int' instead of 'u32' for variable 'target' in kvm_host.h. · 6c8c0c4d
      Chen Gang 提交于
      'target' will be set to '-1' in kvm_arch_vcpu_init(), and it need check
      'target' whether less than zero or not in kvm_vcpu_initialized().
      
      So need define target as 'int' instead of 'u32', just like ARM has done.
      
      The related warning:
      
        arch/arm64/kvm/../../../arch/arm/kvm/arm.c:497:2: warning: comparison of unsigned expression >= 0 is always true [-Wtype-limits]
      Signed-off-by: NChen Gang <gang.chen@asianux.com>
      [Marc: reformated the Subject line to fit the series]
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      6c8c0c4d
    • M
      arm64: KVM: add missing dsb before invalidating Stage-2 TLBs · f142e5ee
      Marc Zyngier 提交于
      When performing a Stage-2 TLB invalidation, it is necessary to
      make sure the write to the page tables is observable by all CPUs.
      
      For this purpose, add dsb instructions to __kvm_tlb_flush_vmid_ipa
      and __kvm_flush_vm_context before doing the TLB invalidation itself.
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      f142e5ee
    • M
      arm64: KVM: perform save/restore of PAR_EL1 · 1bbd8054
      Marc Zyngier 提交于
      Not saving PAR_EL1 is an unfortunate oversight. If the guest
      performs an AT* operation and gets scheduled out before reading
      the result of the translation from PAREL1, it could become
      corrupted by another guest or the host.
      
      Saving this register is made slightly more complicated as KVM also
      uses it on the permission fault handling path, leading to an ugly
      "stash and restore" sequence. Fortunately, this is already a slow
      path so we don't really care. Also, Linux doesn't do any AT*
      operation, so Linux guests are not impacted by this bug.
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      1bbd8054