1. 02 4月, 2015 3 次提交
    • G
      ARM: 8338/1: kexec: Relax SMP validation to improve DT compatibility · fee3fd4f
      Geert Uytterhoeven 提交于
      When trying to kexec into a new kernel on a platform where multiple CPU
      cores are present, but no SMP bringup code is available yet, the
      kexec_load system call fails with:
      
          kexec_load failed: Invalid argument
      
      The SMP test added to machine_kexec_prepare() in commit 2103f6cb
      ("ARM: 7807/1: kexec: validate CPU hotplug support") wants to prohibit
      kexec on SMP platforms where it cannot disable secondary CPUs.
      However, this test is too strict: if the secondary CPUs couldn't be
      enabled in the first place, there's no need to disable them later at
      kexec time.  Hence skip the test in the absence of SMP bringup code.
      
      This allows to add all CPU cores to the DTS from the beginning, without
      having to implement SMP bringup first, improving DT compatibility.
      Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Acked-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      fee3fd4f
    • R
      ARM: move reboot code to arch/arm/kernel/reboot.c · 045ab94e
      Russell King 提交于
      Move shutdown and reboot related code to a separate file, out of
      process.c.  This helps to avoid polluting process.c with non-process
      related code.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      045ab94e
    • R
      ARM: fix broken hibernation · 767bf7e7
      Russell King 提交于
      Normally, when a CPU wants to clear a cache line to zero in the external
      L2 cache, it would generate bus cycles to write each word as it would do
      with any other data access.
      
      However, a Cortex A9 connected to a L2C-310 has a specific feature where
      the CPU can detect this operation, and signal that it wants to zero an
      entire cache line.  This feature, known as Full Line of Zeros (FLZ),
      involves a non-standard AXI signalling mechanism which only the L2C-310
      can properly interpret.
      
      There are separate enable bits in both the L2C-310 and the Cortex A9 -
      the L2C-310 needs to be enabled and have the FLZ enable bit set in the
      auxiliary control register before the Cortex A9 has this feature
      enabled.
      
      Unfortunately, the suspend code was not respecting this - it's not
      obvious from the code:
      
      swsusp_arch_suspend()
       cpu_suspend() /* saves the Cortex A9 auxiliary control register */
        arch_save_image()
        soft_restart() /* turns off FLZ in Cortex A9, and disables L2C */
         cpu_resume() /* restores the Cortex A9 registers, inc auxcr */
      
      At this point, we end up with the L2C disabled, but the Cortex A9 with
      FLZ enabled - which means any memset() or zeroing of a full cache line
      will fail to take effect.
      
      A similar issue exists in the resume path, but it's slightly more
      complex:
      
      swsusp_arch_suspend()
       cpu_suspend() /* saves the Cortex A9 auxiliary control register */
        arch_save_image() /* image with A9 auxcr saved */
      ...
      swsusp_arch_resume()
       call_with_stack()
        arch_restore_image() /* restores image with A9 auxcr saved above */
        soft_restart() /* turns off FLZ in Cortex A9, and disables L2C */
         cpu_resume() /* restores the Cortex A9 registers, inc auxcr */
      
      Again, here we end up with the L2C disabled, but Cortex A9 FLZ enabled.
      
      There's no need to turn off the L2C in either of these two paths; there
      are benefits from not doing so - for example, the page copies will be
      faster with the L2C enabled.
      
      Hence, fix this by providing a variant of soft_restart() which can be
      used without turning the L2 cache controller off, and use it in both
      of these paths to keep the L2C enabled across the respective resume
      transitions.
      
      Fixes: 8ef418c7 ("ARM: l2c: trial at enabling some Cortex-A9 optimisations")
      Reported-by: NSean Cross <xobs@kosagi.com>
      Tested-by: NSean Cross <xobs@kosagi.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      767bf7e7
  2. 30 3月, 2015 6 次提交
  3. 29 3月, 2015 2 次提交
  4. 28 3月, 2015 5 次提交
  5. 18 3月, 2015 1 次提交
  6. 10 3月, 2015 1 次提交
  7. 25 2月, 2015 1 次提交
  8. 23 2月, 2015 3 次提交
  9. 20 2月, 2015 1 次提交
  10. 19 2月, 2015 2 次提交
  11. 18 2月, 2015 12 次提交
    • P
      ARM: mm: Remove Kconfig symbol CACHE_PL310 · d88d6cfc
      Paul Bolle 提交于
      Commit 20e783e3 ("ARM: 8296/1: cache-l2x0: clean up aurora cache
      handling") removed the only user of the Kconfig symbol CACHE_PL310.
      Setting CACHE_PL310 is now pointless. Remove its Kconfig entry, and one
      select of this symbol.
      Signed-off-by: NPaul Bolle <pebolle@tiscali.nl>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      d88d6cfc
    • A
      ARM: rockchip: force built-in regulator support for PM · d1bef995
      Arnd Bergmann 提交于
      The rockchips suspend/resume code requires regulators to work,
      and gives a compile-time error if they are not available:
      
      arch/arm/mach-rockchip/built-in.o: In function `rk3288_suspend_finish':
      :(.text+0x146): undefined reference to `regulator_suspend_finish'
      arch/arm/mach-rockchip/built-in.o: In function `rk3288_suspend_prepare':
      :(.text+0x18e): undefined reference to `regulator_suspend_prepare'
      
      To solve this, we now enable regulators whenever they are needed,
      which is what we do on a lot of other platforms as well.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      d1bef995
    • A
      ARM: mvebu: build armada375-smp code conditionally · 16523518
      Arnd Bergmann 提交于
      mvebu_armada375_smp_wa_init is only used on armada 375 but is defined
      for all mvebu machines. As it calls a function that is only provided
      sometimes, this can result in a link error:
      
      arch/arm/mach-mvebu/built-in.o: In function `mvebu_armada375_smp_wa_init':
      :(.text+0x228): undefined reference to `mvebu_setup_boot_addr_wa'
      
      To solve this, we can just change the existing #ifdef around the
      function to also check for Armada375 SMP platforms.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Fixes: 305969fb ("ARM: mvebu: use the common function for Armada 375 SMP workaround")
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Cc: Gregory Clement <gregory.clement@free-electrons.com>
      16523518
    • A
      ARM: sti: always enable RESET_CONTROLLER · 1fd01aa2
      Arnd Bergmann 提交于
      A lot of the sti device drivers require reset controller support,
      but do not all have individual 'depends on RESET_CONTROLLER'
      statements. Using 'select' here once avoids a lot of build errors
      resulting from this.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
      Acked-by: NPatrice Chotard <patrice.chotard@st.com>
      Cc: Srinivas Kandagatla <srinivas.kandagatla@gmail.com>
      1fd01aa2
    • A
      ARM: rockchip: make rockchip_suspend_init conditional · c8823e7a
      Arnd Bergmann 提交于
      If CONFIG_PM_SLEEP is disabled, we get a build error for rockchips:
      
      arch/arm/mach-rockchip/built-in.o: In function `rockchip_dt_init':
      :(.init.text+0x1c): undefined reference to `rockchip_suspend_init'
      
      This adds an inline alternative for that case.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
      Cc: linux-rockchip@lists.infradead.org
      c8823e7a
    • A
      ARM: ixp4xx: fix {in,out}s{bwl} data types · 1aeb3c5c
      Arnd Bergmann 提交于
      Most platforms use void pointer arguments in these functions, but
      ixp4xx does not, which triggers lots of warnings in device drivers like:
      
      net/ethernet/8390/ne2k-pci.c: In function 'ne2k_pci_get_8390_hdr':
      net/ethernet/8390/ne2k-pci.c:503:3: warning: passing argument 2 of 'insw' from incompatible pointer type
         insw(NE_BASE + NE_DATAPORT, hdr, sizeof(struct e8390_pkt_hdr)>>1);
         ^
      In file included from include/asm/io.h:214:0,
                       from /git/arm-soc/include/linux/io.h:22,
                       from /git/arm-soc/include/linux/pci.h:31,
                       from net/ethernet/8390/ne2k-pci.c:48:
      mach-ixp4xx/include/mach/io.h:316:91: note: expected 'u16 *' but argument is of type 'struct e8390_pkt_hdr *'
       static inline void insw(u32 io_addr, u16 *vaddr, u32 count)
      
      Fixing the drivers seems hopeless, so this changes the ixp4xx code
      to do the same as the others to avoid the warnings.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NKrzysztof Halasa <khalasa@piap.pl>
      Cc: Imre Kaloz <kaloz@openwrt.org>
      1aeb3c5c
    • A
      ARM: prima2: do not select SMP_ON_UP · d76f733d
      Arnd Bergmann 提交于
      The new Atlas7 platform implicitly selects 'CONFIG_SMP_ON_UP',
      which leads to problems if we enable building the platform without
      MMU, as that combination is not allowed and causes a link error:
      
      arch/arm/kernel/built-in.o: In function `c_show':
      :(.text+0x1872): undefined reference to `smp_on_up'
      :(.text+0x1876): undefined reference to `smp_on_up'
      arch/arm/kernel/built-in.o: In function `arch_irq_work_raise':
      :(.text+0x3d48): undefined reference to `smp_on_up'
      :(.text+0x3d4c): undefined reference to `smp_on_up'
      arch/arm/kernel/built-in.o: In function `smp_setup_processor_id':
      :(.init.text+0x180): undefined reference to `smp_on_up'
      
      This removes the 'select' statement.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Fixes: 4cba0585 ("ARM: sirf: add Atlas7 machine support")
      Acked-by: NBarry Song <Baohua.Song@csr.com>
      Cc: Zhiwu Song <Zhiwu.Song@csr.com>
      d76f733d
    • A
      ARM: at91: fix pm declarations · a91c5824
      Arnd Bergmann 提交于
      In a recent rearrangement of the at91 pm initialization code, a broken
      set of declarations was added for the !CONFIG_PM-case, leading to
      this link error:
      
      arch/arm/mach-at91/board-dt-sama5.o: In function `at91_rm9200_pm_init':
      arch/arm/mach-at91/generic.h:40: multiple definition of `at91_rm9200_pm_init'
      arch/arm/mach-at91/setup.o:arch/arm/mach-at91/generic.h:40: first defined here
      arch/arm/mach-at91/board-dt-sama5.o: In function `at91_sam9260_pm_init':
      arch/arm/mach-at91/generic.h:41: multiple definition of `at91_sam9260_pm_init'
      arch/arm/mach-at91/setup.o:arch/arm/mach-at91/generic.h:41: first defined here
      arch/arm/mach-at91/board-dt-sama5.o: In function `at91_sam9g45_pm_init':
      arch/arm/mach-at91/generic.h:42: multiple definition of `at91_sam9g45_pm_init'
      arch/arm/mach-at91/setup.o:arch/arm/mach-at91/generic.h:42: first defined here
      
      This adds the missing 'static inline' to the declarations to avoid
      creating a copy of the functions in each file that includes the
      header.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Fixes: 4db0ba22 ("ARM: at91: pm: prepare for multiplatform")
      Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
      Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
      Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
      a91c5824
    • A
      ARM: davinci: multi-soc kernels require AUTO_ZRELADDR · 99bd667a
      Arnd Bergmann 提交于
      The davinci DA8xx and DMx families have incompatible zreladdr
      settings, and attempting to build a kernel with both enabled
      results in an error unless AUTO_ZRELADDR is set:
      
      multiple zreladdrs: 0xc0008000 0x80008000
      This needs CONFIG_AUTO_ZRELADDR to be set
      
      This patch changes Kconfig to make the two families mutually
      exclusive when this is unset.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NSekhar Nori <nsekhar@ti.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      99bd667a
    • A
      ARM: davinci: davinci_cfg_reg cannot be init · 31612d64
      Arnd Bergmann 提交于
      davinci_cfg_reg gets called from a lot of locations that
      might get called after the init section has been discarded,
      so the function itself must not be marked __init either.
      
      The kernel build currently warns about this with lots of
      messages like:
      
      WARNING: vmlinux.o(.text.unlikely+0x24c): Section mismatch in reference from the function dm365evm_mmc_configure() to the function .init.text:davinci_cfg_reg()
      The function dm365evm_mmc_configure() references
      the function __init davinci_cfg_reg().
      This is often because dm365evm_mmc_configure lacks a __init
      annotation or the annotation of davinci_cfg_reg is wrong.
      
      This removes the extraneous __init_or_module annotation.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NSekhar Nori <nsekhar@ti.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      31612d64
    • A
      ARM: BCM: put back ARCH_MULTI_V7 dependency for mobile · ff34cae5
      Arnd Bergmann 提交于
      A recent cleanup rearranged the Kconfig file for mach-bcm and
      accidentally dropped the dependency on ARCH_MULTI_V7, which
      makes it possible to now build the two mobile SoC platforms
      on an ARMv6-only kernel, resulting in a log of Kconfig
      warnings like
      
      warning: ARCH_BCM_MOBILE selects ARM_ERRATA_775420 which has unmet direct dependencies (CPU_V7)
      
      and which of course cannot work on any machine.
      
      This puts back the dependencies as before.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Fixes: 64e74aa7 ("ARM: mach-bcm: ARCH_BCM_MOBILE: remove one level of menu from Kconfig")
      Acked-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Acked-by: NScott Branden <sbranden@broadcom.com>
      ff34cae5
    • A
      ARM: vexpress: use ARM_CPU_SUSPEND if needed · 95fcedb0
      Arnd Bergmann 提交于
      The vexpress tc2 power management code calls mcpm_loopback, which
      is only available if ARM_CPU_SUSPEND is enabled, otherwise we
      get a link error:
      
      arch/arm/mach-vexpress/built-in.o: In function `tc2_pm_init':
      arch/arm/mach-vexpress/tc2_pm.c:389: undefined reference to `mcpm_loopback'
      
      This explicitly selects ARM_CPU_SUSPEND like other platforms that
      need it.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Fixes: 3592d7e0 ("ARM: 8082/1: TC2: test the MCPM loopback during boot")
      Acked-by: NNicolas Pitre <nico@linaro.org>
      Acked-by: NLiviu Dudau <liviu.dudau@arm.com>
      Cc: Kevin Hilman <khilman@linaro.org>
      Cc: Sudeep Holla <sudeep.holla@arm.com>
      Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      95fcedb0
  12. 17 2月, 2015 3 次提交
    • A
      arm: dts: zynq: update isl9305 compatible string to use isil vendor prefix · b4770fe5
      Arnaud Ebalard 提交于
      "isil" and "isl" prefixes are used at various locations inside the kernel
      to reference Intersil corporation.  This patch is part of a series fixing
      those locations were "isl" is used in compatible strings to use the now
      expected "isil" prefix instead (NASDAQ symbol for Intersil and most used
      version).
      
      Note: isl9305 is an I2C device so the patch does not in fact currently
      depend on the introduction of "isil"-based compatible string in isl9305
      driver (provided by another patch) because I2C core does not check the
      prefix yet.
      Signed-off-by: NArnaud Ebalard <arno@natisbad.org>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: Pawel Moll <pawel.moll@arm.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
      Cc: Kumar Gala <galak@codeaurora.org>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Stephen Warren <swarren@wwwdotorg.org>
      Cc: Thierry Reding <thierry.reding@gmail.com>
      Cc: Alexandre Courbot <gnurou@gmail.com>
      Cc: Uwe Kleine-Knig <uwe@kleine-koenig.org>
      Cc: Alessandro Zummo <a.zummo@towertech.it>
      Cc: Peter Huewe <peter.huewe@infineon.com>
      Cc: Linus Walleij <linus.walleij@linaro.org>
      Cc: Mark Brown <broonie@kernel.org>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Darshana Padmadas <darshanapadmadas@gmail.com>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rob Landley <rob@landley.net>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Cc: Guenter Roeck <linux@roeck-us.net>
      Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
      Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      b4770fe5
    • R
      ARM: dts: add I2C device nodes for Broadcom Cygnus · b51c05a3
      Ray Jui 提交于
      Add I2C device nodes and its properties in bcm-cygnus.dtsi but keep
      them disabled there. Individual I2C devices can be enabled in board
      specific dts file when I2C slave devices are enabled in the future
      Signed-off-by: NRay Jui <rjui@broadcom.com>
      Reviewed-by: NScott Branden <sbranden@broadcom.com>
      Reviewed-by: NKevin Cernekee <cernekee@chromium.org>
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      b51c05a3
    • F
      ARM: dts: BCM63xx: fix L2 cache properties · 9df11828
      Florian Fainelli 提交于
      The L2 cache properties were completely off with respect to what the
      hardware is configured for. Fix the cache-size, cache-line-size and
      cache-sets to reflect the L2 cache controller we have: 512KB, 16 ways
      and 32 bytes per cache-line.
      
      Fixes: 46d4bca0 ("ARM: BCM63XX: add BCM63138 minimal Device Tree")
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      9df11828