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  1. 16 2月, 2012 1 次提交
  3. 05 1月, 2012 2 次提交
  5. 20 12月, 2011 1 次提交
    • S
      powerpc: Rename mapping based RELOCATABLE to DYNAMIC_MEMSTART for BookE · 0f890c8d
      由 Suzuki Poulose 提交于 
      The current implementation of CONFIG_RELOCATABLE in BookE is based
on mapping the page aligned kernel load address to KERNELBASE. This
approach however is not enough for platforms, where the TLB page size
is large (e.g, 256M on 44x). So we are renaming the RELOCATABLE used
currently in BookE to DYNAMIC_MEMSTART to reflect the actual method.

The CONFIG_RELOCATABLE for PPC32(BookE) based on processing of the
dynamic relocations will be introduced in the later in the patch series.

This change would allow the use of the old method of RELOCATABLE for
platforms which can afford to enforce the page alignment (platforms with
smaller TLB size).

Changes since v3:

* Introduced a new config, NONSTATIC_KERNEL, to denote a kernel which is
  either a RELOCATABLE or DYNAMIC_MEMSTART(Suggested by: Josh Boyer)
Suggested-by: NScott Wood <scottwood@freescale.com>
Tested-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NSuzuki K. Poulose <suzuki@in.ibm.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: Josh Boyer <jwboyer@gmail.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linux ppc dev <linuxppc-dev@lists.ozlabs.org>
Signed-off-by: NJosh Boyer <jwboyer@gmail.com>
      0f890c8d
  7. 09 12月, 2011 1 次提交
  9. 08 12月, 2011 3 次提交
  11. 07 12月, 2011 2 次提交
  13. 30 11月, 2011 1 次提交
    • T
      powerpc/40x: Add APM8018X SOC support · d5b9ee7b
      由 Tanmay Inamdar 提交于 
      The AppliedMicro APM8018X embedded processor targets embedded applications that
require low power and a small footprint. It features a PowerPC 405 processor
core built in a 65nm low-power CMOS process with a five-stage pipeline executing
up to one instruction per cycle. The family has 128-kbytes of on-chip memory,
a 128-bit local bus and on-chip DDR2 SDRAM controller with 16-bit interface.
Signed-off-by: NTanmay Inamdar <tinamdar@apm.com>
Signed-off-by: NJosh Boyer <jwboyer@gmail.com>
      d5b9ee7b
  15. 25 11月, 2011 2 次提交
  17. 08 11月, 2011 1 次提交
  19. 04 11月, 2011 1 次提交
    • S
      powerpc/p3060qds: Add support for P3060QDS board · 96cc017c
      由 Shengzhou Liu 提交于 
      The P3060QDS is a Freescale reference board that hosts the six-core P3060 SOC.
The P3060 Processor combines six e500mc Power Architecture processor cores with
high-performance datapath acceleration architecture(DPAA), CoreNet fabric
infrastructure, as well as network and peripheral interfaces.

P3060QDS Board Overview:
Memory subsystem:
  - 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
  - 128M Bytes NOR flash single-chip memory
  - 16M Bytes SPI flash
  - 8K Bytes AT24C64 I2C EEPROM
Ethernet:
  - 4x1G + 4x1G/2.5G Ethernet controllers
  - 2xRGMII + 1xMII, three VSC8641 PHYs on board
  - Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3
PCIe: Two PCI Express 2.0 controllers/ports
USB:  Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board
I2C:  Four I2C controllers
UART: Supports up to four UARTs
RapidIO: Supports two serial RapidIO ports
Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      96cc017c
  21. 12 10月, 2011 3 次提交
  23. 07 10月, 2011 1 次提交
    • M
      powerpc/85xx: Rename p2040_rdb.c to p2041_rdb.c · d3133765
      由 Mingkai Hu 提交于 
      There's only p2041rdb board for official release, but the p2041 silicon
on the board can be converted to p2040 silicon without XAUI and L2 cache
function, then the board becomes p2040rdb board. so we use the file name
p2041_rdb.c to handle P2040RDB board and P2041RDB board which is also
consistent with the board name under U-Boot.

During the rename we make few other minor changes to the device tree:
* Move USB phy setting into p2041si.dtsi as its SoC not board defined
* Convert PCI clock-frequency to decimal to be more readable
Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      d3133765
  25. 29 9月, 2011 1 次提交
  27. 23 9月, 2011 3 次提交
  29. 31 8月, 2011 2 次提交
  31. 19 8月, 2011 1 次提交
    • T
      net: fix IBM EMAC driver after rename. · 3b3bceef
      由 Tony Breeds 提交于 
      In commit 9aa32835 (ehea/ibm*: Move the
IBM drivers) the IBM_NEW_EMAC* were renames to IBM_EMAC*

The conversion was incomplete so that even if the driver was added to
the .config it wasn't built, but there were no errors).  In this commit
we also update the various defconfigs that use EMAC to use the new
Kconfig symbol, and explicitly add the NET_VENDOR_IBM guard.

We do not explicitly select the Kconfig dependencies, as this would force
EMAC on.  Doing it in the defconfig allows more flexibility.

Tested on a canyondlands board.
Signed-off-by: NTony Breeds <tony@bakeyournoodle.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      3b3bceef
  33. 12 8月, 2011 1 次提交
  35. 19 7月, 2011 4 次提交
  37. 12 7月, 2011 1 次提交
  39. 08 7月, 2011 2 次提交
    • M
      powerpc/85xx: Add p2040 RDB board support · 3fce1c0b
      由 Mingkai Hu 提交于 
      P2040RDB Specification:
-----------------------
2Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
128 Mbyte NOR flash single-chip memory
256 Kbit M24256 I2C EEPROM
16 Mbyte SPI memory
SD connector to interface with the SD memory card
dTSEC1: connected to the Vitesse SGMII PHY (VSC8221)
dTSEC2: connected to the Vitesse SGMII PHY (VSC8221)
dTSEC3: connected to the Vitesse SGMII PHY (VSC8221)
dTSEC4: connected to the Vitesse RGMII PHY (VSC8641)
dTSEC5: connected to the Vitesse RGMII PHY (VSC8641)
I2C1: Real time clock, Temperature sensor
I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM
SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors
UART: supports two UARTs up to 115200 bps for console
USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces
PCIe:
 - Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1
 - Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2
Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      3fce1c0b
    • T
      powerpc/85xx: add hypervisor config entries to corenet_smp_defconfig · 59f8df29
      由 Timur Tabi 提交于 
      CONFIG_PPC_EPAPR_HV_BYTECHAN adds support for the Freescale hypervisor
byte channel tty driver.

CONFIG_VIRT_DRIVERS and CONFIG_FSL_HV_MANAGER add support for the Freescale
hypervisor management driver.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      59f8df29
  41. 29 6月, 2011 1 次提交
  43. 27 6月, 2011 3 次提交
  45. 23 6月, 2011 2 次提交