- 13 3月, 2018 3 次提交
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由 Jerome Brunet 提交于
The mux documentation mentions the non-existing parameter width instead of mask, so just sed this. The table field is missing in the documentation of clk_mux. Add a small blurb explaining what it is Fixes: 9d9f78ed ("clk: basic clock hardware types") Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NMichael Turquette <mturquette@baylibre.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Jerome Brunet 提交于
Add helper functions for the translation between parent index and register value in the generic multiplexer function. The purpose of this change is avoid duplicating the code in other clock providers, using the same generic logic. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NMichael Turquette <mturquette@baylibre.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Jerome Brunet 提交于
Export clk_div_mask() in clk-provider header so every clock providers derived from the generic clock divider may share the definition instead of redefining it. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NMichael Turquette <mturquette@baylibre.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 11 1月, 2018 1 次提交
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由 Geert Uytterhoeven 提交于
Currently the virtual "clk_flags" file in debugfs shows the numeric value of the top-level framework flags for the specified clock. Hence the user must manually interpret these values. Moreover, on big-endian 64-bit systems, the wrong half of the value is shown, due to the cast from "unsigned long *" to "u32 *". Fix both issues by showing the symbolic flag names instead. Any non-standard flags are shown as a hex number. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 29 12月, 2017 1 次提交
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由 Jerome Brunet 提交于
divider_recalc_rate() is an helper function used by clock divider of different types, so the structure containing the 'hw' pointer is not always a 'struct clk_divider' At the following line: > div = _get_div(table, val, flags, divider->width); in several cases, the value of 'divider->width' is garbage as the actual structure behind this memory is not a 'struct clk_divider' Fortunately, this width value is used by _get_val() only when CLK_DIVIDER_MAX_AT_ZERO flag is set. This has never been the case so far when the structure is not a 'struct clk_divider'. This is probably why we did not notice this bug before Fixes: afe76c8f ("clk: allow a clk divider with max divisor when zero") Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NSylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 22 12月, 2017 1 次提交
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由 Chunyan Zhang 提交于
These macros are used by more than one SoC vendor platforms, avoid to have many copies of these code, this patch moves them to the common header file which every clock drivers can access to. Signed-off-by: NChunyan Zhang <chunyan.zhang@spreadtrum.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 20 12月, 2017 1 次提交
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由 Jerome Brunet 提交于
The patch adds clk_core_protect and clk_core_unprotect to the internal CCF API. These functions allow to set a new constraint along the clock tree to prevent any change, even indirect, which may result in rate change or glitch. Tested-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NMichael Turquette <mturquette@baylibre.com> Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NMichael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20171201215200.23523-7-jbrunet@baylibre.com
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- 02 11月, 2017 2 次提交
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由 Linus Walleij 提交于
After som grep:ing it turns out nothing in the kernel is really calling clk_[hw_]_register_gpio_[gate|mux](). All existing instances are just created directly from the device tree probe functions at the bottom of the clk-gpio.c clock provider file. This means we can change the signature of the function without any consequences! Everyone should be using GPIO descriptors now, so let's just go in and enforce that. This saves a bit of code since GPIO descriptors know inherently if they are active low so no need for the code keeping track of that. We leave it to the caller to come up with the GPIO descriptor. It is nowadays possible to do that even without a corresponding device, so no excuse not to pass them around. The one in-kernel user lifecycles it using devm_gpiod_get() in gpio_clk_driver_probe(). Cc: Sergej Sawazki <ce3a@gmx.de> Cc: Jyri Sarha <jsarha@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Sometimes we only have one of_clk_del_provider() call in driver error and remove paths, because we're missing a devm_of_clk_add_hw_provider() API. Introduce the API so we can convert drivers to use this and potentially reduce the amount of code needed to remove providers in drivers. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 01 9月, 2017 1 次提交
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由 Gabriel Fernandez 提交于
This patch exposes clk_gate_ops::is_enabled as functions that can be directly called and assigned in places like this so we don't need wrapper functions that do nothing besides forward the call. Signed-off-by: NGabriel Fernandez <gabriel.fernandez@st.com> Suggested-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 08 8月, 2017 1 次提交
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由 Elaine Zhang 提交于
Fractional dividers may have special requirements concerning numerator and denominator selection that differ from just getting the best approximation. For example on Rockchip socs the denominator must be at least 20 times larger than the numerator to generate precise clock frequencies. Therefore add the ability to provide custom approximation functions. Signed-off-by: NElaine Zhang <zhangqing@rock-chips.com> Acked-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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- 07 6月, 2017 1 次提交
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由 Maxime Ripard 提交于
So far, divider_round_rate only considers the parent clock returned by clk_hw_get_parent. This works fine on clocks that have a single parents, this doesn't work on muxes, since we will only consider the first parent, while other parents may totally be able to provide a better combination. Clocks in that case cannot use divider_round_rate, so would have to come up with a very similar logic to work around it. Instead of having to do something like this, and duplicate that logic everywhere, create a divider_round_rate parent to allow caller to give an additional parameter for the parent clock to consider. Reviewed-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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- 18 10月, 2016 1 次提交
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由 Shawn Guo 提交于
The new introduced macro CLK_OF_DECLARE_DRIVER is usually used to declare clock driver init functions, which are mostly decorated with __init. Add __init decoration for CLK_OF_DECLARE_DRIVER function to avoid causing section mismatch warnings on client clock drivers. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Fixes: c7296c51 ("clk: core: New macro CLK_OF_DECLARE_DRIVER") Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 24 9月, 2016 1 次提交
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由 Masahiro Yamada 提交于
The "num" is the number of clk_hw entries in the structure, so "unsigned int" would be a better fit. (size_t looks like data size we count by byte.) Besides, struct clk_onecell_data already uses unsigned int for "clk_num". Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 27 8月, 2016 1 次提交
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由 Rafał Miłecki 提交于
In the commit 929e7f3b ("clk: Make of_clk_get_parent_count() return unsigned ints") of_clk_get_parent_count has been modified to return unsigned int. There is also a dummy implementation of the same function for configs without CONFIG_OF. For the consistency it should be updated as well. Signed-off-by: NRafał Miłecki <rafal@milecki.pl> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 13 8月, 2016 1 次提交
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由 Ricardo Ribalda Delgado 提交于
This will be used by drivers that requires initialization at of_clk_init() time and also during platform device probing. Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 02 7月, 2016 1 次提交
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由 Dong Aisheng 提交于
On Freescale i.MX7D platform, all clocks operations, including enable/disable, rate change and re-parent, requires its parent clock enable. Current clock core can not support it well. This patch introduce a new flag CLK_OPS_PARENT_ENABLE to handle this special case in clock core that enable its parent clock firstly for each operation and disable it later after operation complete. The patch part 1 fixes the possible disabling clocks while its parent is off during kernel booting phase in clk_disable_unused_subtree(). Before the completion of kernel booting, clock tree is still not built completely, there may be a case that the child clock is on but its parent is off which could be caused by either HW initial reset state or bootloader initialization. Taking bootloader as an example, we may enable all clocks in HW by default. And during kernel booting time, the parent clock could be disabled in its driver probe due to calling clk_prepare_enable and clk_disable_unprepare. Because it's child clock is only enabled in HW while its SW usecount in clock tree is still 0, so clk_disable of parent clock will gate the parent clock in both HW and SW usecount ultimately. Then there will be a child clock is still on in HW but its parent is already off. Later in clk_disable_unused(), this clock disable accessing while its parent off will cause system hang due to the limitation of HW which must require its parent on. This patch simply enables the parent clock first before disabling if flag CLK_OPS_PARENT_ENABLE is set in clk_disable_unused_subtree(). This is a simple solution and only affects booting time. After kernel booting up the clock tree is already created, there will be no case that child is off but its parent is off. So no need do this checking for normal clk_disable() later. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 01 7月, 2016 1 次提交
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由 Masahiro Yamada 提交于
This will be used to migrate to the clk_hw APIs. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 02 6月, 2016 1 次提交
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由 Stephen Boyd 提交于
Now that we've gotten rid of all the users of this flag we can retire the number, leaving a slot open for a future flag user. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 22 4月, 2016 1 次提交
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由 Maxime Ripard 提交于
The composite clock didn't have any unregistration function, which forced us to use clk_unregister directly on it. While it was already not great from an API point of view, it also meant that we were leaking the clk_composite structure allocated in clk_register_composite. Add a clk_unregister_composite function to fix this. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 20 4月, 2016 10 次提交
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由 Stephen Boyd 提交于
Add registration APIs in the clk fixed-rate code to return struct clk_hw pointers instead of struct clk pointers. This way we hide the struct clk pointer from providers unless they need to use consumer facing APIs. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Add registration APIs in the clk gpio code to return struct clk_hw pointers instead of struct clk pointers. This way we hide the struct clk pointer from providers unless they need to use consumer facing APIs. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Add registration APIs in the clk composite code to return struct clk_hw pointers instead of struct clk pointers. This way we hide the struct clk pointer from providers unless they need to use consumer facing APIs. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Add registration APIs in the clk fractional divider code to return struct clk_hw pointers instead of struct clk pointers. This way we hide the struct clk pointer from providers unless they need to use consumer facing APIs. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Add registration APIs in the clk fixed-factor code to return struct clk_hw pointers instead of struct clk pointers. This way we hide the struct clk pointer from providers unless they need to use consumer facing APIs. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Add registration APIs in the clk mux code to return struct clk_hw pointers instead of struct clk pointers. This way we hide the struct clk pointer from providers unless they need to use consumer facing APIs. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Add registration APIs in the clk gate code to return struct clk_hw pointers instead of struct clk pointers. This way we hide the struct clk pointer from providers unless they need to use consumer facing APIs. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Add registration APIs in the clk divider code to return struct clk_hw pointers instead of struct clk pointers. This way we hide the struct clk pointer from providers unless they need to use consumer facing APIs. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
Now that we have a clk registration API that doesn't return struct clks, we need to have some way to hand out struct clks via the clk_get() APIs that doesn't involve associating struct clk pointers with an OF node. Currently we ask the OF provider to give us a struct clk pointer for some clkspec, turn that struct clk into a struct clk_hw and then allocate a new struct clk to return to the caller. Let's add a clk_hw based OF provider hook that returns a struct clk_hw directly, so that we skip the intermediate step of converting from struct clk to struct clk_hw. Eventually when we've converted all OF clk providers to struct clk_hw based APIs we can remove the struct clk based ones. It should also be noted that we change the onecell provider to have a flex array instead of a pointer for the array of clk_hw pointers. This allows providers to allocate one structure of the correct length in one step instead of two. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
We've largely split the clk consumer and provider APIs along struct clk and struct clk_hw, but clk_register() still returns a struct clk pointer for each struct clk_hw that's registered. Eventually we'd like to only allocate struct clks when there's a user, because struct clk is per-user now, so clk_register() needs to change. Let's add new APIs to register struct clk_hws, but this time we'll hide the struct clk from the caller by returning an int error code. Also add an unregistration API that takes the clk_hw structure that was passed to the registration API. This way provider drivers never have to deal with a struct clk pointer unless they're using the clk consumer APIs. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 10 4月, 2016 2 次提交
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由 Lee Jones 提交于
This call matches clocks which have been marked as critical in DT and sets the appropriate flag. These flags can then be used to mark the clock core flags appropriately prior to registration. Legacy bindings requiring this feature must add the clock-critical property to their binding descriptions, as it is not a part of common-clock binding. Cc: devicetree@vger.kernel.org Signed-off-by: NLee Jones <lee.jones@linaro.org> Reviewed-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NMichael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1455225554-13267-4-git-send-email-mturquette@baylibre.com
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由 Lee Jones 提交于
Critical clocks are those which must not be gated, else undefined or catastrophic failure would occur. Here we have chosen to ensure the prepare/enable counts are correctly incremented, so as not to confuse users with enabled clocks with no visible users. Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NMichael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1455225554-13267-2-git-send-email-mturquette@baylibre.com
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- 27 2月, 2016 1 次提交
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由 Stephen Boyd 提交于
Russell King recently pointed out a bug in the clk-gpio code where it fails to register the clk if of_clk_get_parent_count() returns an error because the "clocks" property isn't present in the DT node. If we're trying to count parents from DT we'd like to know the count, not if there is a "clocks" property or not. Furthermore, some drivers are assigning the return value to their clk_init_data::num_parents member which is unsigned, leading to potentially large numbers of parents when the property isn't present. Let's change the API to return an unsigned int instead of an int. All the callers just want to know the count anyway, and this avoids the bug that was in the clk-gpio driver. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 07 2月, 2016 2 次提交
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由 Stephen Boyd 提交于
These functions either never existed or were only used in OF_CLK_DECLARE() macros. Remove the dead prototypes. Cc: Jyri Sarha <jsarha@ti.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Stephen Boyd 提交于
We don't use CLK_IS_ROOT but in a few places in the common clk framework core. Let's replace those checks with a check for the number of parents a clk has instead of the flag, freeing up one flag for something else. We don't remove the flag yet so that things keep building, but we'll remove it once all drivers have removed their flag usage. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 30 1月, 2016 4 次提交
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由 Masahiro Yamada 提交于
Allow to unregister fixed rate clock. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Masahiro Yamada 提交于
Allow to unregister fixed factor clock. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Geliang Tang 提交于
to_clk_*(_hw) macros have been repeatedly defined in many places. This patch moves all the to_clk_*(_hw) definitions in the common clock framework to public header clk-provider.h, and drop the local definitions. Signed-off-by: NGeliang Tang <geliangtang@163.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Heiko Stuebner 提交于
Commit e6d5e7d9 ("clk-divider: Fix READ_ONLY when divider > 1") removed the special ops struct for read-only clocks and instead opted to handle them inside the regular ops. On the rk3368 this results in breakage as aclkm now gets set a value. While it is the same divider value, the A53 core still doesn't like it, which can result in the cpu ending up in a hang. The reason being that "ACLKENMasserts one clock cycle before the rising edge of ACLKM" and the clock should only be touched when STANDBYWFIL2 is asserted. To fix this, reintroduce the read-only ops but do include the round_rate callback. That way no writes that may be unsafe are done to the divider register in any case. The Rockchip use of the clk_divider_ops is adapted to this split again, as is the nxp, lpc18xx-ccu driver that was included since the original commit. On lpc18xx-ccu the divider seems to always be read-only so only uses the new ops now. Fixes: e6d5e7d9 ("clk-divider: Fix READ_ONLY when divider > 1") Reported-by: NZhang Qing <zhangqing@rock-chips.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 24 12月, 2015 1 次提交
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由 Heiko Stuebner 提交于
Some clocks need to be enabled to accept rate changes. This patch adds a new flag CLK_SET_RATE_UNGATE that lets clk_change_rate enable the clock before trying to change the rate and disable it again afterwards. This of course doesn't effect clocks that are already running at that point, as their refcount will only temporarily increase. Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Tested-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: NMichael Turquette <mturquette@baylibre.com>
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