- 28 8月, 2015 1 次提交
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由 Ben Skeggs 提交于
We only need to mask 0x0f on GM2xx, and want to keep the higher bits on earlier cards. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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- 22 1月, 2015 2 次提交
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由 Ben Skeggs 提交于
The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
The symlinks were annoying some people, and they're not used anywhere else in the kernel tree. The include directory structure has been changed so that symlinks aren't needed anymore. NVKM has been moved from core/ to nvkm/ to make it more obvious as to what the directory is for, and as some minor prep for when NVKM gets split out into its own module (virt) at a later date. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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- 02 12月, 2014 2 次提交
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由 Ben Skeggs 提交于
Probably missing something here, doesn't make a lot of sense to write or+link data into a register whose offset is calculated by the same or+link info.. This is the all I've witnessed the binary driver and vbios doing so far, so it'll do. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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- 10 8月, 2014 1 次提交
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由 Ben Skeggs 提交于
The full object interfaces are about to be exposed to userspace, so we need to check for any security-related issues and version the structs to make it easier to handle any changes we may need in the future. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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- 11 6月, 2014 5 次提交
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
We want to be able to power down the lanes for DPMS off. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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- 08 11月, 2013 1 次提交
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由 Ben Skeggs 提交于
Matches the nv94-nvc0 commit with the same title. Doesn't fix a reported issue, but NVIDIA use this ordering here too, so let's do it just in case. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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- 20 2月, 2013 1 次提交
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由 Ben Skeggs 提交于
We need to be able to do link training for PIOR-connected ANX9805 from the third supervisor handler (due to script ordering in the bios, can't have the "user" call train because some settings are overwritten from the modesetting bios scripts). This moves link training for SOR-connected DP encoders to the second supervisor interrupt, *before* we call the modesetting scripts (yes, different ordering from PIOR is necessary). This is useful since we should now be able to remove some hacks to workaround races between the supervisor and link training paths. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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- 29 11月, 2012 1 次提交
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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