- 08 7月, 2016 2 次提交
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由 Kedareswara rao Appana 提交于
In the existing vdma driver support for AXI DMA and CDMA got added so the driver is no longer VDMA specific. This patch renames the driver and DT binding doc to xilinx_dma and updates the Kconfig description for all the DMAS. Signed-off-by: NKedareswara rao Appana <appanad@xilinx.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Kedareswara rao Appana 提交于
This patch updates the device-tree binding doc for AXI DMA multi channel dma mode. Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NKedareswara rao Appana <appanad@xilinx.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 13 5月, 2016 1 次提交
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由 Kedareswara rao Appana 提交于
This patch updates the binding doc with clock description for AXI DMA's. Acked-by: NRob Herring <robh@kernel.org> Acked-by: NSören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NKedareswara rao Appana <appanad@xilinx.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 12 5月, 2016 2 次提交
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由 Kedareswara rao Appana 提交于
This patch updates the device-tree binding doc for adding support for AXI CDMA. Signed-off-by: NKedareswara rao Appana <appanad@xilinx.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Kedareswara rao Appana 提交于
This patch updates the device-tree binding doc for adding support for AXI DMA. Also this patch differentiates required properties b/w DMA and VDMA. Signed-off-by: NKedareswara rao Appana <appanad@xilinx.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 06 4月, 2016 1 次提交
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由 Kedareswara rao Appana 提交于
This VDMA is a soft ip, which can be programmed to support 32 bit addressing or greater than 32 bit addressing. When the VDMA ip is configured for 32 bit address space the buffer address is specified by a single register (0x5C for MM2S and 0xAC for S2MM channel). When the VDMA core is configured for an address space greater than 32 then each buffer address is specified by a combination of two registers. The first register specifies the LSB 32 bits of address, while the next register specifies the MSB 32 bits of address. For example, 5Ch will specify the LSB 32 bits while 60h will specify the MSB 32 bits of the first start address. So we need to program two registers at a time. This patch adds the 64 bit addressing support to the vdma driver. Signed-off-by: NAnurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: NKedareswara rao Appana <appanad@xilinx.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 06 12月, 2014 1 次提交
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由 Andreas Färber 提交于
The specification requires xlnx,data-width, but example and driver use xlnx,datawidth. Change the specification to match the implementation. Reviewed-by: NMichal Simek <michal.simek@xilinx.com> Fixes: eebeac03 ("dma: Add Xilinx Video DMA DT Binding Documentation") Signed-off-by: NAndreas Färber <afaerber@suse.de> Reviewed-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 01 12月, 2014 1 次提交
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由 Andreas Färber 提交于
The specification requires xlnx,data-width, but example and driver use xlnx,datawidth. Change the specification to match the implementation. Reviewed-by: NMichal Simek <michal.simek@xilinx.com> Fixes: eebeac03 ("dma: Add Xilinx Video DMA DT Binding Documentation") Signed-off-by: NAndreas Färber <afaerber@suse.de> Reviewed-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 30 4月, 2014 1 次提交
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由 Srikanth Thokala 提交于
Device-tree binding documentation of Xilinx Video DMA Engine Signed-off-by: NSrikanth Thokala <sthokal@xilinx.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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