1. 08 11月, 2017 3 次提交
  2. 04 11月, 2017 1 次提交
    • P
      Update MIPS email addresses · fb615d61
      Paul Burton 提交于
      MIPS will soon not be a part of Imagination Technologies, and as such
      many @imgtec.com email addresses will no longer be valid. This patch
      updates the addresses for those who:
      
       - Have 10 or more patches in mainline authored using an @imgtec.com
         email address, or any patches dated within the past year.
      
       - Are still with Imagination but leaving as part of the MIPS business
         unit, as determined from an internal email address list.
      
       - Haven't already updated their email address (ie. JamesH) or expressed
         a desire to be excluded (ie. Maciej).
      
       - Acked v2 or earlier of this patch, which leaves Deng-Cheng, Matt &
         myself.
      
      New addresses are of the form firstname.lastname@mips.com, and all
      verified against an internal email address list.  An entry is added to
      .mailmap for each person such that get_maintainer.pl will report the new
      addresses rather than @imgtec.com addresses which will soon be dead.
      
      Instances of the affected addresses throughout the tree are then
      mechanically replaced with the new @mips.com address.
      Signed-off-by: NPaul Burton <paul.burton@mips.com>
      Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
      Cc: Deng-Cheng Zhu <dengcheng.zhu@mips.com>
      Acked-by: NDengcheng Zhu <dengcheng.zhu@mips.com>
      Cc: Matt Redfearn <matt.redfearn@imgtec.com>
      Cc: Matt Redfearn <matt.redfearn@mips.com>
      Acked-by: NMatt Redfearn <matt.redfearn@mips.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: linux-kernel@vger.kernel.org
      Cc: linux-mips@linux-mips.org
      Cc: trivial@kernel.org
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      fb615d61
  3. 02 11月, 2017 7 次提交
    • M
      MIPS: Update email address for Marcin Nowakowski · ca208b5f
      Marcin Nowakowski 提交于
      MIPS is no longer part of Imagination Technologies and my @imgtec.com
      address will soon stop working. Update any files containing my address
      as well as the .mailmap to point to my new @mips.com address.
      Signed-off-by: NMarcin Nowakowski <marcin.nowakowski@mips.com>
      Patchwork: https://patchwork.linux-mips.org/patch/17579/Signed-off-by: NJames Hogan <jhogan@kernel.org>
      ca208b5f
    • G
      License cleanup: add SPDX license identifier to uapi header files with a license · e2be04c7
      Greg Kroah-Hartman 提交于
      Many user space API headers have licensing information, which is either
      incomplete, badly formatted or just a shorthand for referring to the
      license under which the file is supposed to be.  This makes it hard for
      compliance tools to determine the correct license.
      
      Update these files with an SPDX license identifier.  The identifier was
      chosen based on the license information in the file.
      
      GPL/LGPL licensed headers get the matching GPL/LGPL SPDX license
      identifier with the added 'WITH Linux-syscall-note' exception, which is
      the officially assigned exception identifier for the kernel syscall
      exception:
      
         NOTE! This copyright does *not* cover user programs that use kernel
         services by normal system calls - this is merely considered normal use
         of the kernel, and does *not* fall under the heading of "derived work".
      
      This exception makes it possible to include GPL headers into non GPL
      code, without confusing license compliance tools.
      
      Headers which have either explicit dual licensing or are just licensed
      under a non GPL license are updated with the corresponding SPDX
      identifier and the GPLv2 with syscall exception identifier.  The format
      is:
              ((GPL-2.0 WITH Linux-syscall-note) OR SPDX-ID-OF-OTHER-LICENSE)
      
      SPDX license identifiers are a legally binding shorthand, which can be
      used instead of the full boiler plate text.  The update does not remove
      existing license information as this has to be done on a case by case
      basis and the copyright holders might have to be consulted. This will
      happen in a separate step.
      
      This patch is based on work done by Thomas Gleixner and Kate Stewart and
      Philippe Ombredanne.  See the previous patch in this series for the
      methodology of how this patch was researched.
      Reviewed-by: NKate Stewart <kstewart@linuxfoundation.org>
      Reviewed-by: NPhilippe Ombredanne <pombredanne@nexb.com>
      Reviewed-by: NThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      e2be04c7
    • G
      License cleanup: add SPDX license identifier to uapi header files with no license · 6f52b16c
      Greg Kroah-Hartman 提交于
      Many user space API headers are missing licensing information, which
      makes it hard for compliance tools to determine the correct license.
      
      By default are files without license information under the default
      license of the kernel, which is GPLV2.  Marking them GPLV2 would exclude
      them from being included in non GPLV2 code, which is obviously not
      intended. The user space API headers fall under the syscall exception
      which is in the kernels COPYING file:
      
         NOTE! This copyright does *not* cover user programs that use kernel
         services by normal system calls - this is merely considered normal use
         of the kernel, and does *not* fall under the heading of "derived work".
      
      otherwise syscall usage would not be possible.
      
      Update the files which contain no license information with an SPDX
      license identifier.  The chosen identifier is 'GPL-2.0 WITH
      Linux-syscall-note' which is the officially assigned identifier for the
      Linux syscall exception.  SPDX license identifiers are a legally binding
      shorthand, which can be used instead of the full boiler plate text.
      
      This patch is based on work done by Thomas Gleixner and Kate Stewart and
      Philippe Ombredanne.  See the previous patch in this series for the
      methodology of how this patch was researched.
      Reviewed-by: NKate Stewart <kstewart@linuxfoundation.org>
      Reviewed-by: NPhilippe Ombredanne <pombredanne@nexb.com>
      Reviewed-by: NThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      6f52b16c
    • G
      License cleanup: add SPDX GPL-2.0 license identifier to files with no license · b2441318
      Greg Kroah-Hartman 提交于
      Many source files in the tree are missing licensing information, which
      makes it harder for compliance tools to determine the correct license.
      
      By default all files without license information are under the default
      license of the kernel, which is GPL version 2.
      
      Update the files which contain no license information with the 'GPL-2.0'
      SPDX license identifier.  The SPDX identifier is a legally binding
      shorthand, which can be used instead of the full boiler plate text.
      
      This patch is based on work done by Thomas Gleixner and Kate Stewart and
      Philippe Ombredanne.
      
      How this work was done:
      
      Patches were generated and checked against linux-4.14-rc6 for a subset of
      the use cases:
       - file had no licensing information it it.
       - file was a */uapi/* one with no licensing information in it,
       - file was a */uapi/* one with existing licensing information,
      
      Further patches will be generated in subsequent months to fix up cases
      where non-standard license headers were used, and references to license
      had to be inferred by heuristics based on keywords.
      
      The analysis to determine which SPDX License Identifier to be applied to
      a file was done in a spreadsheet of side by side results from of the
      output of two independent scanners (ScanCode & Windriver) producing SPDX
      tag:value files created by Philippe Ombredanne.  Philippe prepared the
      base worksheet, and did an initial spot review of a few 1000 files.
      
      The 4.13 kernel was the starting point of the analysis with 60,537 files
      assessed.  Kate Stewart did a file by file comparison of the scanner
      results in the spreadsheet to determine which SPDX license identifier(s)
      to be applied to the file. She confirmed any determination that was not
      immediately clear with lawyers working with the Linux Foundation.
      
      Criteria used to select files for SPDX license identifier tagging was:
       - Files considered eligible had to be source code files.
       - Make and config files were included as candidates if they contained >5
         lines of source
       - File already had some variant of a license header in it (even if <5
         lines).
      
      All documentation files were explicitly excluded.
      
      The following heuristics were used to determine which SPDX license
      identifiers to apply.
      
       - when both scanners couldn't find any license traces, file was
         considered to have no license information in it, and the top level
         COPYING file license applied.
      
         For non */uapi/* files that summary was:
      
         SPDX license identifier                            # files
         ---------------------------------------------------|-------
         GPL-2.0                                              11139
      
         and resulted in the first patch in this series.
      
         If that file was a */uapi/* path one, it was "GPL-2.0 WITH
         Linux-syscall-note" otherwise it was "GPL-2.0".  Results of that was:
      
         SPDX license identifier                            # files
         ---------------------------------------------------|-------
         GPL-2.0 WITH Linux-syscall-note                        930
      
         and resulted in the second patch in this series.
      
       - if a file had some form of licensing information in it, and was one
         of the */uapi/* ones, it was denoted with the Linux-syscall-note if
         any GPL family license was found in the file or had no licensing in
         it (per prior point).  Results summary:
      
         SPDX license identifier                            # files
         ---------------------------------------------------|------
         GPL-2.0 WITH Linux-syscall-note                       270
         GPL-2.0+ WITH Linux-syscall-note                      169
         ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause)    21
         ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)    17
         LGPL-2.1+ WITH Linux-syscall-note                      15
         GPL-1.0+ WITH Linux-syscall-note                       14
         ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause)    5
         LGPL-2.0+ WITH Linux-syscall-note                       4
         LGPL-2.1 WITH Linux-syscall-note                        3
         ((GPL-2.0 WITH Linux-syscall-note) OR MIT)              3
         ((GPL-2.0 WITH Linux-syscall-note) AND MIT)             1
      
         and that resulted in the third patch in this series.
      
       - when the two scanners agreed on the detected license(s), that became
         the concluded license(s).
      
       - when there was disagreement between the two scanners (one detected a
         license but the other didn't, or they both detected different
         licenses) a manual inspection of the file occurred.
      
       - In most cases a manual inspection of the information in the file
         resulted in a clear resolution of the license that should apply (and
         which scanner probably needed to revisit its heuristics).
      
       - When it was not immediately clear, the license identifier was
         confirmed with lawyers working with the Linux Foundation.
      
       - If there was any question as to the appropriate license identifier,
         the file was flagged for further research and to be revisited later
         in time.
      
      In total, over 70 hours of logged manual review was done on the
      spreadsheet to determine the SPDX license identifiers to apply to the
      source files by Kate, Philippe, Thomas and, in some cases, confirmation
      by lawyers working with the Linux Foundation.
      
      Kate also obtained a third independent scan of the 4.13 code base from
      FOSSology, and compared selected files where the other two scanners
      disagreed against that SPDX file, to see if there was new insights.  The
      Windriver scanner is based on an older version of FOSSology in part, so
      they are related.
      
      Thomas did random spot checks in about 500 files from the spreadsheets
      for the uapi headers and agreed with SPDX license identifier in the
      files he inspected. For the non-uapi files Thomas did random spot checks
      in about 15000 files.
      
      In initial set of patches against 4.14-rc6, 3 files were found to have
      copy/paste license identifier errors, and have been fixed to reflect the
      correct identifier.
      
      Additionally Philippe spent 10 hours this week doing a detailed manual
      inspection and review of the 12,461 patched files from the initial patch
      version early this week with:
       - a full scancode scan run, collecting the matched texts, detected
         license ids and scores
       - reviewing anything where there was a license detected (about 500+
         files) to ensure that the applied SPDX license was correct
       - reviewing anything where there was no detection but the patch license
         was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
         SPDX license was correct
      
      This produced a worksheet with 20 files needing minor correction.  This
      worksheet was then exported into 3 different .csv files for the
      different types of files to be modified.
      
      These .csv files were then reviewed by Greg.  Thomas wrote a script to
      parse the csv files and add the proper SPDX tag to the file, in the
      format that the file expected.  This script was further refined by Greg
      based on the output to detect more types of files automatically and to
      distinguish between header and source .c files (which need different
      comment types.)  Finally Greg ran the script using the .csv files to
      generate the patches.
      Reviewed-by: NKate Stewart <kstewart@linuxfoundation.org>
      Reviewed-by: NPhilippe Ombredanne <pombredanne@nexb.com>
      Reviewed-by: NThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      b2441318
    • J
      MIPS: smp-cmp: Fix vpe_id build error · 7e7bf0ec
      James Hogan 提交于
      The smp-cmp build has been (further) broken since commit 856fbcee
      ("MIPS: Store core & VP IDs in GlobalNumber-style variable") in
      v4.14-rc1 like so:
      
      arch/mips/kernel/smp-cmp.c: In function ‘cmp_init_secondary’:
      arch/mips/kernel/smp-cmp.c:53:4: error: ‘struct cpuinfo_mips’ has no member named ‘vpe_id’
         c->vpe_id = (read_c0_tcbind() >> TCBIND_CURVPE_SHIFT) &
          ^
      
      Fix by replacing vpe_id with cpu_set_vpe_id().
      
      Fixes: 856fbcee ("MIPS: Store core & VP IDs in GlobalNumber-style variable")
      Signed-off-by: NJames Hogan <jhogan@kernel.org>
      Reviewed-by: NPaul Burton <paul.burton@imgtec.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/17569/Signed-off-by: NJames Hogan <jhogan@kernel.org>
      7e7bf0ec
    • J
      MIPS: smp-cmp: Use right include for task_struct · f677b770
      Jason A. Donenfeld 提交于
      When task_struct was moved, this MIPS code was neglected. Evidently
      nobody is using it anymore. This fixes this build error:
      
      In file included from ./arch/mips/include/asm/thread_info.h:15:0,
                       from ./include/linux/thread_info.h:37,
                       from ./include/asm-generic/current.h:4,
                       from ./arch/mips/include/generated/asm/current.h:1,
                       from ./include/linux/sched.h:11,
                       from arch/mips/kernel/smp-cmp.c:22:
      arch/mips/kernel/smp-cmp.c: In function ‘cmp_boot_secondary’:
      ./arch/mips/include/asm/processor.h:384:41: error: implicit declaration
      of function ‘task_stack_page’ [-Werror=implicit-function-declaration]
       #define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + \
                                               ^
      arch/mips/kernel/smp-cmp.c:84:21: note: in expansion of macro ‘__KSTK_TOS’
        unsigned long sp = __KSTK_TOS(idle);
                           ^~~~~~~~~~
      
      Fixes: f3ac6067 ("sched/headers: Move task-stack related APIs from <linux/sched.h> to <linux/sched/task_stack.h>")
      Signed-off-by: NJason A. Donenfeld <Jason@zx2c4.com>
      Cc: <stable@vger.kernel.org> # 4.11+
      Patchwork: https://patchwork.linux-mips.org/patch/17522/Signed-off-by: NJames Hogan <jhogan@kernel.org>
      f677b770
    • M
      MIPS: CPS: Fix use of current_cpu_data in preemptible code · 8a46f71d
      Matt Redfearn 提交于
      Commit 1ec9dd80 ("MIPS: CPS: Detect CPUs in secondary clusters")
      added a check in cps_boot_secondary() that the secondary being booted is
      in the same cluster as the CPU running this code. This check is
      performed using current_cpu_data without disabling preemption. As such
      when CONFIG_PREEMPT=y, a BUG is triggered:
      
      [   57.991693] BUG: using smp_processor_id() in preemptible [00000000] code: hotplug/1749
      <snip>
      [   58.063077] Call Trace:
      [   58.065842] [<8040cdb4>] show_stack+0x84/0x114
      [   58.070830] [<80b11b38>] dump_stack+0xf8/0x140
      [   58.075796] [<8079b12c>] check_preemption_disabled+0xec/0x118
      [   58.082204] [<80415110>] cps_boot_secondary+0x84/0x44c
      [   58.087935] [<80413a14>] __cpu_up+0x34/0x98
      [   58.092624] [<80434240>] bringup_cpu+0x38/0x114
      [   58.097680] [<80434af0>] cpuhp_invoke_callback+0x168/0x8f0
      [   58.103801] [<804362d0>] _cpu_up+0x154/0x1c8
      [   58.108565] [<804363dc>] do_cpu_up+0x98/0xa8
      [   58.113333] [<808261f8>] device_online+0x84/0xc0
      [   58.118481] [<80826294>] online_store+0x60/0x98
      [   58.123562] [<8062261c>] kernfs_fop_write+0x158/0x1d4
      [   58.129196] [<805a2ae4>] __vfs_write+0x4c/0x168
      [   58.134247] [<805a2dc8>] vfs_write+0xe0/0x190
      [   58.139095] [<805a2fe0>] SyS_write+0x68/0xc4
      [   58.143854] [<80415d58>] syscall_common+0x34/0x58
      
      In reality we don't currently support running the kernel on CPUs not in
      cluster 0, so the answer to cpu_cluster(&current_cpu_data) will always
      be 0, even if this task being preempted and continues running on a
      different CPU. Regardless, the BUG should not be triggered, so fix this
      by switching to raw_current_cpu_data. When multicluster support lands
      upstream this check will need removing or changing anyway.
      
      Fixes: 1ec9dd80 ("MIPS: CPS: Detect CPUs in secondary clusters")
      Signed-off-by: NMatt Redfearn <matt.redfearn@mips.com>
      Reviewed-by: NPaul Burton <paul.burton@mips.com>
      CC: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/17563/Signed-off-by: NJames Hogan <jhogan@kernel.org>
      8a46f71d
  4. 01 11月, 2017 8 次提交
    • M
      MIPS: SMP: Fix deadlock & online race · 9e8c399a
      Matt Redfearn 提交于
      Commit 6f542ebe ("MIPS: Fix race on setting and getting
      cpu_online_mask") effectively reverted commit 8f46cca1 ("MIPS: SMP:
      Fix possibility of deadlock when bringing CPUs online") and thus has
      reinstated the possibility of deadlock.
      
      The commit was based on testing of kernel v4.4, where the CPU hotplug
      core code issued a BUG() if the starting CPU is not marked online when
      the boot CPU returns from __cpu_up. The commit fixes this race (in
      v4.4), but re-introduces the deadlock situation.
      
      As noted in the commit message, upstream differs in this area. Commit
      8df3e07e ("cpu/hotplug: Let upcoming cpu bring itself fully up")
      adds a completion event in the CPU hotplug core code, making this race
      impossible. However, people were unhappy with relying on the core code
      to do the right thing.
      
      To address the issues both commits were trying to fix, add a second
      completion event in the MIPS smp hotplug path. It removes the
      possibility of a race, since the MIPS smp hotplug code now synchronises
      both the boot and secondary CPUs before they return to the hotplug core
      code. It also addresses the deadlock by ensuring that the secondary CPU
      is not marked online before it's counters are synchronised.
      
      This fix should also be backported to fix the race condition introduced
      by the backport of commit 8f46cca1 ("MIPS: SMP: Fix possibility of
      deadlock when bringing CPUs online"), through really that race only
      existed before commit 8df3e07e ("cpu/hotplug: Let upcoming cpu
      bring itself fully up").
      Signed-off-by: NMatt Redfearn <matt.redfearn@imgtec.com>
      Fixes: 6f542ebe ("MIPS: Fix race on setting and getting cpu_online_mask")
      CC: Matija Glavinic Pecotic <matija.glavinic-pecotic.ext@nokia.com>
      Cc: <stable@vger.kernel.org> # v4.1+: 8f46cca1: "MIPS: SMP: Fix possibility of deadlock when bringing CPUs online"
      Cc: <stable@vger.kernel.org> # v4.1+: a00eeede: "MIPS: SMP: Use a completion event to signal CPU up"
      Cc: <stable@vger.kernel.org> # v4.1+: 6f542ebe: "MIPS: Fix race on setting and getting cpu_online_mask"
      Cc: <stable@vger.kernel.org> # v4.1+
      Patchwork: https://patchwork.linux-mips.org/patch/17376/Signed-off-by: NJames Hogan <jhogan@kernel.org>
      9e8c399a
    • W
      MIPS: bpf: Fix a typo in build_one_insn() · 6a2932a4
      Wei Yongjun 提交于
      Fix a typo in build_one_insn().
      
      Fixes: b6bd53f9 ("MIPS: Add missing file for eBPF JIT.")
      Signed-off-by: NWei Yongjun <weiyongjun1@huawei.com>
      Cc: <stable@vger.kernel.org> # 4.13+
      Patchwork: https://patchwork.linux-mips.org/patch/17491/Signed-off-by: NJames Hogan <jhogan@kernel.org>
      6a2932a4
    • G
      MIPS: microMIPS: Fix incorrect mask in insn_table_MM · 77238e76
      Gustavo A. R. Silva 提交于
      It seems that this is a typo error and the proper bit masking is
      "RT | RS" instead of "RS | RS".
      
      This issue was detected with the help of Coccinelle.
      
      Fixes: d6b3314b ("MIPS: uasm: Add lh uam instruction")
      Reported-by: NJulia Lawall <julia.lawall@lip6.fr>
      Signed-off-by: NGustavo A. R. Silva <garsilva@embeddedor.com>
      Reviewed-by: NJames Hogan <jhogan@kernel.org>
      Cc: <stable@vger.kernel.org> # 3.16+
      Patchwork: https://patchwork.linux-mips.org/patch/17551/Signed-off-by: NJames Hogan <jhogan@kernel.org>
      77238e76
    • P
      MIPS: Fix CM region target definitions · 6a6cba1d
      Paul Burton 提交于
      The default CM target field in the GCR_BASE register is encoded with 0
      meaning memory & 1 being reserved. However the definitions we use for
      those bits effectively get these two values backwards - likely because
      they were copied from the definitions for the CM regions where the
      target is encoded differently. This results in use setting up GCR_BASE
      with the reserved target value by default, rather than targeting memory
      as intended. Although we currently seem to get away with this it's not a
      great idea to rely upon.
      
      Fix this by changing our macros to match the documentated target values.
      
      The incorrect encoding became used as of commit 9f98f3dd ("MIPS: Add
      generic CM probe & access code") in the Linux v3.15 cycle, and was
      likely carried forwards from older but unused code introduced by
      commit 39b8d525 ("[MIPS] Add support for MIPS CMP platform.") in the
      v2.6.26 cycle.
      
      Fixes: 9f98f3dd ("MIPS: Add generic CM probe & access code")
      Signed-off-by: NPaul Burton <paul.burton@mips.com>
      Reported-by: NMatt Redfearn <matt.redfearn@mips.com>
      Reviewed-by: NJames Hogan <jhogan@kernel.org>
      Cc: Matt Redfearn <matt.redfearn@mips.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: <stable@vger.kernel.org> # v3.15+
      Patchwork: https://patchwork.linux-mips.org/patch/17562/Signed-off-by: NJames Hogan <jhogan@kernel.org>
      6a6cba1d
    • M
      MIPS: generic: Fix compilation error from include asm/mips-cpc.h · 7f005f11
      Matt Redfearn 提交于
      Commit e83f7e02 ("MIPS: CPS: Have asm/mips-cps.h include CM & CPC
      headers") adds a #error to arch/mips/include/asm/mips-cpc.h if it is
      included directly. While this commit replaced almost all direct includes
      of mips-cm.h and mips-cpc.h, 2 remain.
      
      With some defconfigs, mips-cps.h is indirectly included before
      mips-cpc.h, but in others this results in compilation errors:
      
      In file included from arch/mips/generic/init.c:23:0:
      ./arch/mips/include/asm/mips-cpc.h:12:3: error: #error Please include
      asm/mips-cps.h rather than asm/mips-cpc.h
       # error Please include asm/mips-cps.h rather than asm/mips-cpc.h
      
      In file included from arch/mips/kernel/smp.c:23:0:
      ./arch/mips/include/asm/mips-cpc.h:12:3: error: #error Please include
      asm/mips-cps.h rather than asm/mips-cpc.h
       # error Please include asm/mips-cps.h rather than asm/mips-cpc.h
      
      In both cases, fix this by including mips-cps.h instead.
      
      Fixes: e83f7e02 ("MIPS: CPS: Have asm/mips-cps.h include CM & CPC headers")
      Signed-off-by: NMatt Redfearn <matt.redfearn@mips.com>
      Patchwork: https://patchwork.linux-mips.org/patch/17492/Signed-off-by: NJames Hogan <jhogan@kernel.org>
      7f005f11
    • M
      MIPS: Fix exception entry when CONFIG_EVA enabled · c496f3c0
      Matt Redfearn 提交于
      Commit 9fef6868 ("MIPS: Make SAVE_SOME more standard") made several
      changes to the order in which registers are saved in the SAVE_SOME
      macro, used by exception handlers to save the processor state. In
      particular, it removed the
      move   k1, sp
      in the delay slot of the branch testing if the processor is already in
      kernel mode. This is replaced later in the macro by a
      move   k0, sp
      When CONFIG_EVA is disabled, this instruction actually appears in the
      delay slot of the branch. However, when CONFIG_EVA is enabled, instead
      the RPS workaround of
      MFC0	k0, CP0_ENTRYHI
      appears in the delay slot. This results in k0 not containing the stack
      pointer, but some unrelated value, which is then saved to the kernel
      stack. On exit from the exception, this bogus value is restored to the
      stack pointer, resulting in an OOPS.
      
      Fix this by moving the save of SP in k0 explicitly in the delay slot of
      the branch, outside of the CONFIG_EVA section, restoring the expected
      instruction ordering when CONFIG_EVA is active.
      
      Fixes: 9fef6868 ("MIPS: Make SAVE_SOME more standard")
      Signed-off-by: NMatt Redfearn <matt.redfearn@mips.com>
      Reported-by: NVladimir Kondratiev <vladimir.kondratiev@intel.com>
      Reviewed-by: NCorey Minyard <cminyard@mvista.com>
      Reviewed-by: NJames Hogan <jhogan@kernel.org>
      Patchwork: https://patchwork.linux-mips.org/patch/17471/Signed-off-by: NJames Hogan <jhogan@kernel.org>
      c496f3c0
    • J
      MIPS: generic: Fix NI 169445 its build · a1286968
      James Hogan 提交于
      Since commit 04a85e08 ("MIPS: generic: Move NI 169445 FIT image
      source to its own file"), a generic 32r2el_defconfig kernel fails to
      build with the following build error:
      
        ITB     arch/mips/boot/vmlinux.gz.itb
      Error: arch/mips/boot/vmlinux.gz.its:111.1-2 syntax error
      FATAL ERROR: Unable to parse input tree
      mkimage Can't read arch/mips/boot/vmlinux.gz.itb.tmp: Invalid argument
      
      Fix arch/mips/generic/board-ni169445.its.S to include the necessary "/"
      node path before the first open brace.
      
      The original issue in arch/mips/generic/vmlinux.its.S was fixed directly
      in the original commit 7aacf86b ("MIPS: NI 169445 board support")
      after https://patchwork.linux-mips.org/patch/16941/ was submitted, but
      the separate its.S file wasn't correctly fixed when resolving the
      conflict in commit 04a85e08 ("MIPS: generic: Move NI 169445 FIT
      image source to its own file").
      
      Fixes: 04a85e08 ("MIPS: generic: Move NI 169445 FIT image source to its own file")
      Signed-off-by: NJames Hogan <jhogan@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Burton <paul.burton@mips.com>
      Cc: Nathan Sullivan <nathan.sullivan@ni.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/17561/Signed-off-by: NJames Hogan <jhogan@kernel.org>
      a1286968
    • P
      Update MIPS email addresses · 48c834be
      Paul Burton 提交于
      MIPS will soon not be a part of Imagination Technologies, and as such
      many @imgtec.com email addresses will no longer be valid. This patch
      updates the addresses for those who:
      
       - Have 10 or more patches in mainline authored using an @imgtec.com
         email address, or any patches dated within the past year.
      
       - Are still with Imagination but leaving as part of the MIPS business
         unit, as determined from an internal email address list.
      
       - Haven't already updated their email address (ie. JamesH) or expressed
         a desire to be excluded (ie. Maciej).
      
       - Acked v2 or earlier of this patch, which leaves Deng-Cheng, Matt &
         myself.
      
      New addresses are of the form firstname.lastname@mips.com, and all
      verified against an internal email address list. An entry is added to
      .mailmap for each person such that get_maintainer.pl will report the new
      addresses rather than @imgtec.com addresses which will soon be dead.
      
      Instances of the affected addresses throughout the tree are then
      mechanically replaced with the new @mips.com address.
      Signed-off-by: NPaul Burton <paul.burton@mips.com>
      Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
      Cc: Deng-Cheng Zhu <dengcheng.zhu@mips.com>
      Acked-by: NDengcheng Zhu <dengcheng.zhu@mips.com>
      Cc: Matt Redfearn <matt.redfearn@imgtec.com>
      Cc: Matt Redfearn <matt.redfearn@mips.com>
      Acked-by: NMatt Redfearn <matt.redfearn@mips.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: linux-kernel@vger.kernel.org
      Cc: linux-mips@linux-mips.org
      Cc: trivial@kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/17540/Signed-off-by: NJames Hogan <jhogan@kernel.org>
      48c834be
  5. 09 10月, 2017 5 次提交
    • P
      MIPS: math-emu: Remove pr_err() calls from fpu_emu() · ca8eb05b
      Paul Burton 提交于
      The FPU emulator includes 2 calls to pr_err() which are triggered by
      invalid instruction encodings for MIPSr6 cmp.cond.fmt instructions.
      These cases are not kernel errors, merely invalid instructions which are
      already handled by delivering a SIGILL which will provide notification
      that something failed in cases where that makes sense.
      
      In cases where that SIGILL is somewhat expected & being handled, for
      example when crashme happens to generate one of the affected bad
      encodings, the message is printed with no useful context about what
      triggered it & spams the kernel log for no good reason.
      
      Remove the pr_err() calls to make crashme run silently & treat the bad
      encodings the same way we do others, with a SIGILL & no further kernel
      log output.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Fixes: f8c3c671 ("MIPS: math-emu: Add support for the CMP.condn.fmt R6 instruction")
      Cc: linux-mips@linux-mips.org
      Cc: stable <stable@vger.kernel.org> # v4.3+
      Patchwork: https://patchwork.linux-mips.org/patch/17253/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      ca8eb05b
    • P
      MIPS: Fix generic-board-config.sh for builds using O= · e1270575
      Paul Burton 提交于
      When configuring the kernel using one of the generic MIPS defconfig
      targets, the generic-board-config.sh script is used to check
      requirements listed in board config fragments against a reference config
      in order to determine which board config fragments to merge into the
      final config.
      
      When specifying O= to configure in a directory other than the kernel
      source directory, this generic-board-config.sh script is invoked in the
      directory that we are configuring in (ie. the directory that O equals),
      and the path to the reference config is relative to the current
      directory. The script then changes the current directory to the source
      tree, which unfortunately breaks later access to the reference file
      since its path is relative to a directory that is no longer the current
      working directory. This results in configuration failing with errors
      such as:
      
        $ make ARCH=mips O=tmp 32r2_defconfig
        make[1]: Entering directory '/home/pburton/src/linux/tmp'
        Using ../arch/mips/configs/generic_defconfig as base
        Merging ../arch/mips/configs/generic/32r2.config
        Merging ../arch/mips/configs/generic/eb.config
        grep: ./.config.32r2_defconfig: No such file or directory
        grep: ./.config.32r2_defconfig: No such file or directory
        The base file '.config' does not exist.  Exit.
        make[1]: *** [arch/mips/Makefile:505: 32r2_defconfig] Error 1
        make[1]: Leaving directory '/home/pburton/src/linux-ingenic/tmp'
        make: *** [Makefile:145: sub-make] Error 2
      
      Fix this by avoiding changing the working directory in
      generic-board-config.sh, instead using full paths to files under
      $(srctree)/ where necessary.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Fixes: 27e0d4b0 ("MIPS: generic: Allow filtering enabled boards by requirements")
      Cc: linux-mips@linux-mips.org
      Cc: kbuild test robot <fengguang.wu@intel.com>
      Cc: kbuild-all@01.org
      Patchwork: https://patchwork.linux-mips.org/patch/17231/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      e1270575
    • P
      MIPS: Fix cmpxchg on 32b signed ints for 64b kernel with !kernel_uses_llsc · 133d68e0
      Paul Burton 提交于
      Commit 8263db4d ("MIPS: cmpxchg: Implement __cmpxchg() as a
      function") refactored our implementation of __cmpxchg() to be a function
      rather than a macro, with the aim of making it easier to read & modify.
      Unfortunately the commit breaks use of cmpxchg() for signed 32 bit
      values when we have a 64 bit kernel with kernel_uses_llsc == false,
      because:
      
       - In cmpxchg_local() we cast the old value to the type the pointer
         points to, and then to an unsigned long. If the pointer points to a
         signed type smaller than 64 bits then the old value will be sign
         extended to 64 bits. That is, bits beyond the size of the pointed to
         type will be set to 1 if the old value is negative. In the case of a
         signed 32 bit integer with a negative value, bits 63:32 will all be
         set.
      
       - In __cmpxchg_asm() we load the value from memory, ie. dereference the
         pointer, and store the value as an unsigned integer (__ret) whose
         size matches the pointer. For a 32 bit cmpxchg() this means we store
         the value in a u32, because the pointer provided to __cmpxchg_asm()
         by __cmpxchg() is of type volatile u32 *.
      
       - __cmpxchg_asm() then checks whether the value in memory (__ret)
         matches the provided old value, by comparing the two values. This
         results in the u32 being promoted to a 64 bit unsigned long to match
         the old argument - however because both types are unsigned the value
         is zero extended, which does not match the sign extension performed
         on the old value in cmpxchg_local() earlier.
      
      This mismatch means that unfortunate cmpxchg() calls can incorrectly
      fail for 64 bit kernels with kernel_uses_llsc == false. This is the case
      on at least non-SMP Cavium Octeon kernels, which hardcode
      kernel_uses_llsc in their cpu-feature-overrides.h header. Using a
      v4.13-rc7 kernel configured using cavium_octeon_defconfig with SMP
      manually disabled, this presents itself as oddity when we reach
      userland - for example:
      
        can't run '/bin/mount': Text file busy
        can't run '/bin/mkdir': Text file busy
        can't run '/bin/mkdir': Text file busy
        can't run '/bin/mount': Text file busy
        can't run '/bin/hostname': Text file busy
        can't run '/etc/init.d/rcS': Text file busy
        can't run '/sbin/getty': Text file busy
        can't run '/sbin/getty': Text file busy
      
      It appears that some part of the init process, which is in this case
      buildroot's busybox init, is running successfully. It never manages to
      reach the login prompt though, and complains about /sbin/getty being
      busy repeatedly and indefinitely.
      
      Fix this by casting the old value provided to __cmpxchg_asm() to an
      appropriately sized unsigned integer, such that we consistently
      zero-extend avoiding the mismatch. The __cmpxchg_small() case for 8 & 16
      bit values is unaffected because __cmpxchg_small() already masks
      provided values appropriately.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Fixes: 8263db4d ("MIPS: cmpxchg: Implement __cmpxchg() as a function")
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/17226/
      Cc: linux-mips@linux-mips.org
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      133d68e0
    • K
      MIPS: loongson1: set default number of rx and tx queues for stmmac · 1b6ad6df
      Kelvin Cheung 提交于
      Set the default number of RX and TX queues due to
      the recent changes of stmmac driver.
      Otherwise the ethernet will crash once it starts.
      Signed-off-by: NKelvin Cheung <keguang.zhang@gmail.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/17452/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      1b6ad6df
    • M
      MIPS: bpf: Fix uninitialised target compiler error · 94c3390a
      Matt Redfearn 提交于
      Compiling ebpf_jit.c with gcc 4.9 results in a (likely spurious)
      compiler warning, as gcc has detected that the variable "target" may be
      used uninitialised. Since -Werror is active, this is treated as an error
      and causes a kernel build failure whenever CONFIG_MIPS_EBPF_JIT is
      enabled.
      
      arch/mips/net/ebpf_jit.c: In function 'build_one_insn':
      arch/mips/net/ebpf_jit.c:1118:80: error: 'target' may be used
      uninitialized in this function [-Werror=maybe-uninitialized]
          emit_instr(ctx, j, target);
                                                                                      ^
      cc1: all warnings being treated as errors
      
      Fix this by initialising "target" to 0. If it really is used
      uninitialised this would result in a jump to 0 and a detectable run time
      failure.
      Signed-off-by: NMatt Redfearn <matt.redfearn@imgtec.com>
      Fixes: b6bd53f9 ("MIPS: Add missing file for eBPF JIT.")
      Cc: James Hogan <james.hogan@imgtec.com>
      Cc: David Daney <david.daney@cavium.com>
      Cc: David S. Miller <davem@davemloft.net>
      Cc: Colin Ian King <colin.king@canonical.com>
      Cc: Daniel Borkmann <daniel@iogearbox.net>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Cc: <stable@vger.kernel.org> # v4.13+
      Patchwork: https://patchwork.linux-mips.org/patch/17375/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      94c3390a
  6. 21 9月, 2017 3 次提交
    • M
      MIPS: PCI: fix pcibios_map_irq section mismatch · 8eba3651
      Manuel Lauss 提交于
      Drop  the __init from pcibios_map_irq() to make this section mis-
      match go away:
      
      WARNING: vmlinux.o(.text+0x56acd4): Section mismatch in reference from the function pcibios_scanbus() to the function .init.text:pcibios_map_irq()
      The function pcibios_scanbus() references
      the function __init pcibios_map_irq().
      This is often because pcibios_scanbus lacks a __init
      annotation or the annotation of pcibios_map_irq is wrong.
      
      Run-Tested only on Alchemy.
      Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/17267/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      8eba3651
    • J
      MIPS: Fix input modify in __write_64bit_c0_split() · c22c8043
      James Hogan 提交于
      The inline asm in __write_64bit_c0_split() modifies the 64-bit input
      operand by shifting the high register left by 32, and constructing the
      full 64-bit value in the low register (even on a 32-bit kernel), so if
      that value is used again it could cause breakage as GCC would assume the
      registers haven't changed when they have.
      
      To quote the GCC extended asm documentation:
      > Warning: Do not modify the contents of input-only operands (except for
      > inputs tied to outputs). The compiler assumes that on exit from the
      > asm statement these operands contain the same values as they had
      > before executing the statement.
      
      Avoid modifying the input by using a temporary variable as an output
      which is modified instead of the input and not otherwise used. The asm
      is always __volatile__ so GCC shouldn't optimise it out. The low
      register of the temporary output is written before the high register of
      the input is read, so we have two constraint alternatives, one where
      both use the same registers (for when the input value isn't subsequently
      used), and one with an early clobber on the output in case the low
      output uses the same register as the high input. This allows the
      resulting assembly to remain mostly unchanged.
      
      A diff of a MIPS32r6 kernel reveals only three differences, two in
      relation to write_c0_r10k_diag() in cpu_probe() (register allocation
      rearranged slightly but otherwise identical), and one in relation to
      write_c0_cvmmemctl2() in kvm_vz_local_flush_guesttlb_all(), but the
      octeon CPU is only supported on 64-bit kernels where
      __write_64bit_c0_split() isn't used so that shouldn't matter in
      practice. So there currently doesn't appear to be anything broken by
      this bug.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/17315/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      c22c8043
    • A
      MIPS: MSP71xx: Include asm/setup.h · 9bbe7dc0
      Arnd Bergmann 提交于
      msp71xx_defconfig can not be built at the in v4.14-rc1
      
      arch/mips/pmcs-msp71xx/msp_smp.c:72:2: error: implicit declaration of function 'set_vi_handler' [-Werror=implicit-function-declaration]
      
      I don't know what caused the regression, but including the right
      header is the obvious fix.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/17309/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      9bbe7dc0
  7. 20 9月, 2017 2 次提交
    • P
      MIPS: Fix perf event init · fd0b19ed
      Paul Burton 提交于
      Commit c311c797 ("cpumask: make "nr_cpumask_bits" unsigned")
      modified mipspmu_event_init() to cast the struct perf_event cpu field to
      an unsigned integer before it is compared with nr_cpumask_bits (and
      *ahem* did so without copying the linux-mips mailing list or any MIPS
      developers...). This is broken because the cpu field may be -1 for
      events which follow a process rather than being affine to a particular
      CPU. When this is the case the cast to an unsigned int results in a
      value equal to ULONG_MAX, which is always greater than nr_cpumask_bits
      so we always fail mipspmu_event_init() and return -ENODEV.
      
      The check against nr_cpumask_bits seems nonsensical anyway, so this
      patch simply removes it. The cpu field is going to either be -1 or a
      valid CPU number. Comparing it with nr_cpumask_bits is effectively
      checking that it's a valid cpu number, but it seems safe to rely on the
      core perf events code to ensure that's the case.
      
      The end result is that this fixes use of perf on MIPS when not
      constraining events to a particular CPU, and fixes the "perf list hw"
      command which fails to list any events without this.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Fixes: c311c797 ("cpumask: make "nr_cpumask_bits" unsigned")
      Cc: Alexey Dobriyan <adobriyan@gmail.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: linux-mips@linux-mips.org
      Cc: stable <stable@vger.kernel.org> # v4.12+
      Patchwork: https://patchwork.linux-mips.org/patch/17323/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      fd0b19ed
    • L
      MIPS: PCI: Move map_irq() hooks out of initdata · 19a8d6b7
      Lorenzo Pieralisi 提交于
      04c81c72 ("MIPS: PCI: Replace pci_fixup_irqs() call with host bridge
      IRQ mapping hooks") moved the PCI IRQ fixup to the new host bridge
      map/swizzle_irq() hooks mechanism. Those hooks can also be called after
      boot, when all the __init/__initdata/__initconst sections have been freed.
      Therefore, functions called by them (and the data they refer to) must not
      be marked as __init/__initdata/__initconst lest compilation trigger section
      mismatch warnings.
      
      Fix all the board files map_irq() hooks by simply removing the respective
      __init/__initdata/__initconst section markers and by adding another
      persistent hook IRQ map for the txx9 board files.
      
      Fixes: 04c81c72 ("MIPS: PCI: Replace pci_fixup_irqs() call with host bridge IRQ mapping hooks")
      Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Reviewed-by: NArnd Bergmann <arnd@arndb.de>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Steve French <smfrench@gmail.com>
      19a8d6b7
  8. 15 9月, 2017 1 次提交
  9. 09 9月, 2017 1 次提交
    • M
      vga: optimise console scrolling · ac036f95
      Matthew Wilcox 提交于
      Where possible, call memset16(), memmove() or memcpy() instead of using
      open-coded loops.  I don't like the calling convention that uses a byte
      count instead of a count of u16s, but it's a little late to change that.
      Reduces code size of fbcon.o by almost 400 bytes on my laptop build.
      
      [akpm@linux-foundation.org: fix build]
      Link: http://lkml.kernel.org/r/20170720184539.31609-9-willy@infradead.orgSigned-off-by: NMatthew Wilcox <mawilcox@microsoft.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: David Miller <davem@davemloft.net>
      Cc: Sam Ravnborg <sam@ravnborg.org>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: "James E.J. Bottomley" <jejb@linux.vnet.ibm.com>
      Cc: "Martin K. Petersen" <martin.petersen@oracle.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
      Cc: Matt Turner <mattst88@gmail.com>
      Cc: Michael Ellerman <mpe@ellerman.id.au>
      Cc: Minchan Kim <minchan@kernel.org>
      Cc: Richard Henderson <rth@twiddle.net>
      Cc: Russell King <rmk+kernel@armlinux.org.uk>
      Cc: Sergey Senozhatsky <sergey.senozhatsky@gmail.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      ac036f95
  10. 07 9月, 2017 2 次提交
    • R
      mm,fork: introduce MADV_WIPEONFORK · d2cd9ede
      Rik van Riel 提交于
      Introduce MADV_WIPEONFORK semantics, which result in a VMA being empty
      in the child process after fork.  This differs from MADV_DONTFORK in one
      important way.
      
      If a child process accesses memory that was MADV_WIPEONFORK, it will get
      zeroes.  The address ranges are still valid, they are just empty.
      
      If a child process accesses memory that was MADV_DONTFORK, it will get a
      segmentation fault, since those address ranges are no longer valid in
      the child after fork.
      
      Since MADV_DONTFORK also seems to be used to allow very large programs
      to fork in systems with strict memory overcommit restrictions, changing
      the semantics of MADV_DONTFORK might break existing programs.
      
      MADV_WIPEONFORK only works on private, anonymous VMAs.
      
      The use case is libraries that store or cache information, and want to
      know that they need to regenerate it in the child process after fork.
      
      Examples of this would be:
       - systemd/pulseaudio API checks (fail after fork) (replacing a getpid
         check, which is too slow without a PID cache)
       - PKCS#11 API reinitialization check (mandated by specification)
       - glibc's upcoming PRNG (reseed after fork)
       - OpenSSL PRNG (reseed after fork)
      
      The security benefits of a forking server having a re-inialized PRNG in
      every child process are pretty obvious.  However, due to libraries
      having all kinds of internal state, and programs getting compiled with
      many different versions of each library, it is unreasonable to expect
      calling programs to re-initialize everything manually after fork.
      
      A further complication is the proliferation of clone flags, programs
      bypassing glibc's functions to call clone directly, and programs calling
      unshare, causing the glibc pthread_atfork hook to not get called.
      
      It would be better to have the kernel take care of this automatically.
      
      The patch also adds MADV_KEEPONFORK, to undo the effects of a prior
      MADV_WIPEONFORK.
      
      This is similar to the OpenBSD minherit syscall with MAP_INHERIT_ZERO:
      
          https://man.openbsd.org/minherit.2
      
      [akpm@linux-foundation.org: numerically order arch/parisc/include/uapi/asm/mman.h #defines]
      Link: http://lkml.kernel.org/r/20170811212829.29186-3-riel@redhat.comSigned-off-by: NRik van Riel <riel@redhat.com>
      Reported-by: NFlorian Weimer <fweimer@redhat.com>
      Reported-by: NColm MacCártaigh <colm@allcosts.net>
      Reviewed-by: NMike Kravetz <mike.kravetz@oracle.com>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: "Kirill A. Shutemov" <kirill@shutemov.name>
      Cc: Andy Lutomirski <luto@amacapital.net>
      Cc: Dave Hansen <dave.hansen@intel.com>
      Cc: Ingo Molnar <mingo@kernel.org>
      Cc: Helge Deller <deller@gmx.de>
      Cc: Kees Cook <keescook@chromium.org>
      Cc: Matthew Wilcox <willy@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Will Drewry <wad@chromium.org>
      Cc: <linux-api@vger.kernel.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      d2cd9ede
    • M
      mm: arch: consolidate mmap hugetlb size encodings · aafd4562
      Mike Kravetz 提交于
      A non-default huge page size can be encoded in the flags argument of the
      mmap system call.  The definitions for these encodings are in arch
      specific header files.  However, all architectures use the same values.
      
      Consolidate all the definitions in the primary user header file
      (uapi/linux/mman.h).  Include definitions for all known huge page sizes.
      Use the generic encoding definitions in hugetlb_encode.h as the basis
      for these definitions.
      
      Link: http://lkml.kernel.org/r/1501527386-10736-3-git-send-email-mike.kravetz@oracle.comSigned-off-by: NMike Kravetz <mike.kravetz@oracle.com>
      Acked-by: NMichal Hocko <mhocko@suse.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Andrea Arcangeli <aarcange@redhat.com>
      Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
      Cc: Anshuman Khandual <khandual@linux.vnet.ibm.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Davidlohr Bueso <dbueso@suse.de>
      Cc: Matthew Wilcox <willy@infradead.org>
      Cc: Michael Kerrisk <mtk.manpages@gmail.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      aafd4562
  11. 06 9月, 2017 7 次提交
    • M
      MIPS: Refactor handling of stack pointer in get_frame_info · 56dfb700
      Matt Redfearn 提交于
      Commit 34c2f668 ("MIPS: microMIPS: Add unaligned access support.")
      added handling of microMIPS instructions to manipulate the stack
      pointer. The code that was added violates code style rules with long
      lines caused by lots of nested conditionals.
      
      The added code interprets (inline) any known stack pointer manipulation
      instruction to find the stack frame size. Handling the microMIPS cases
      added quite a bit of complication to this function.
      
      Refactor is_sp_move_ins to perform the interpretation of the immediate
      as the instruction manipulating the stack pointer is found. This reduces
      the amount of indentation required in get_frame_info, and more closely
      matches the operation of is_ra_save_ins.
      Suggested-by: NMaciej W. Rozycki <macro@imgtec.com>
      Signed-off-by: NMatt Redfearn <matt.redfearn@imgtec.com>
      Cc: Marcin Nowakowski <marcin.nowakowski@imgtec.com>
      Cc: Ingo Molnar <mingo@kernel.org>
      Cc: Paul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/16958/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      56dfb700
    • M
      MIPS: Stacktrace: Fix microMIPS stack unwinding on big endian systems · 41885b02
      Matt Redfearn 提交于
      The stack unwinding code uses the mips_instuction union to decode the
      instructions it finds. That union uses the __BITFIELD_FIELD macro to
      reorder depending on endianness. The stack unwinding code always places
      16bit instructions in halfword 1 of the union. This makes the union
      accesses correct for little endian systems. Similarly, 32bit
      instructions are reordered such that they are correct for little endian
      systems. This handling leaves unwinding the stack on big endian systems
      broken, as the mips_instruction union will then look for the fields in
      the wrong halfword.
      
      To fix this, use a logical shift to place the 16bit instruction into the
      correct position in the word field of the union. Use the same shifting
      to order the 2 halfwords of 32bit instuctions. Then replace accesses to
      the halfword with accesses to the shifted word.
      In the case of the ADDIUS5 instruction, switch to using the
      mm16_r5_format union member to avoid the need for a 16bit shift.
      
      Fixes: 34c2f668 ("MIPS: microMIPS: Add unaligned access support.")
      Signed-off-by: NMatt Redfearn <matt.redfearn@imgtec.com>
      Reviewed-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Marcin Nowakowski <marcin.nowakowski@imgtec.com>
      Cc: Ingo Molnar <mingo@kernel.org>
      Cc: Paul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/16956/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      41885b02
    • M
      MIPS: microMIPS: Fix decoding of swsp16 instruction · cea8cd49
      Matt Redfearn 提交于
      When the immediate encoded in the instruction is accessed, it is sign
      extended due to being a signed value being assigned to a signed integer.
      The ISA specifies that this operation is an unsigned operation.
      The sign extension leads us to incorrectly decode:
      
      801e9c8e:       cbf1            sw      ra,68(sp)
      
      As having an immediate of 1073741809.
      
      Since the instruction format does not specify signed/unsigned, and this
      is currently the only location to use this instuction format, change it
      to an unsigned immediate.
      
      Fixes: bb9bc468 ("MIPS: Calculate microMIPS ra properly when unwinding the stack")
      Suggested-by: NPaul Burton <paul.burton@imgtec.com>
      Signed-off-by: NMatt Redfearn <matt.redfearn@imgtec.com>
      Reviewed-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Marcin Nowakowski <marcin.nowakowski@imgtec.com>
      Cc: Miodrag Dinic <miodrag.dinic@imgtec.com>
      Cc: Ingo Molnar <mingo@kernel.org>
      Cc: David Daney <david.daney@cavium.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/16957/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      cea8cd49
    • M
      MIPS: microMIPS: Fix decoding of addiusp instruction · a0ae2b08
      Matt Redfearn 提交于
      Commit 34c2f668 ("MIPS: microMIPS: Add unaligned access support.")
      added handling of microMIPS instructions to manipulate the stack
      pointer. Unfortunately the decoding of the addiusp instruction was
      incorrect, and performed a left shift by 2 bits to the raw immediate,
      rather than decoding the immediate and then performing the shift, as
      documented in the ISA.
      
      This led to incomplete stack traces, due to incorrect frame sizes being
      calculated. For example the instruction:
      801faee0 <do_sys_poll>:
      801faee0:       4e25            addiu   sp,sp,-952
      
      As decoded by objdump, would be interpreted by the existing code as
      having manipulated the stack pointer by +1096.
      
      Fix this by changing the order of decoding the immediate and applying
      the left shift. Also change to accessing the instuction through the
      union to avoid the endianness problem of accesing halfword[0], which
      will fail on big endian systems.
      
      Cope with the special behaviour of immediates 0x0, 0x1, 0x1fe and 0x1ff
      by XORing with 0x100 again if mod(immediate) < 4. This logic was tested
      with the following test code:
      
      int main(int argc, char **argv)
      {
      	unsigned int enc;
      	int imm;
      
      	for (enc = 0; enc < 512; ++enc) {
      		int tmp = enc << 2;
      		imm = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
      		unsigned short tmp = enc;
      		tmp = (tmp ^ 0x100) - 0x100;
      		if ((unsigned short)(tmp + 2) < 4)
      			tmp ^= 0x100;
      		imm = -(signed short)(tmp << 2);
      		printf("%#x\t%d\t->\t(%#x\t%d)\t%#x\t%d\n",
      		       enc, enc,
      		       (short)tmp, (short)tmp,
      		       imm, imm);
      	}
      	return EXIT_SUCCESS;
      }
      
      Which generates the table:
      
      input encoding	->	tmp (matching manual)	frame size
      -----------------------------------------------------------------------
      0	0	->	(0x100		256)	0xfffffc00	-1024
      0x1	1	->	(0x101		257)	0xfffffbfc	-1028
      0x2	2	->	(0x2		2)	0xfffffff8	-8
      0x3	3	->	(0x3		3)	0xfffffff4	-12
      ...
      0xfe	254	->	(0xfe		254)	0xfffffc08	-1016
      0xff	255	->	(0xff		255)	0xfffffc04	-1020
      0x100	256	->	(0xffffff00	-256)	0x400		1024
      0x101	257	->	(0xffffff01	-255)	0x3fc		1020
      ...
      0x1fc	508	->	(0xfffffffc	-4)	0x10		16
      0x1fd	509	->	(0xfffffffd	-3)	0xc		12
      0x1fe	510	->	(0xfffffefe	-258)	0x408		1032
      0x1ff	511	->	(0xfffffeff	-257)	0x404		1028
      
      Thanks to James Hogan for the test code & verifying the logic.
      
      Fixes: 34c2f668 ("MIPS: microMIPS: Add unaligned access support.")
      Suggested-by: NJames Hogan <james.hogan@imgtec.com>
      Signed-off-by: NMatt Redfearn <matt.redfearn@imgtec.com>
      Cc: Marcin Nowakowski <marcin.nowakowski@imgtec.com>
      Cc: Ingo Molnar <mingo@kernel.org>
      Cc: Paul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/16955/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      a0ae2b08
    • M
      MIPS: microMIPS: Fix detection of addiusp instruction · b332fec0
      Matt Redfearn 提交于
      The addiusp instruction uses the pool16d opcode, with bit 0 of the
      immediate set. The test for the addiusp opcode erroneously did a logical
      and of the immediate with mm_addiusp_func, which has value 1, so this
      test always passes when the immediate is non-zero.
      
      Fix the test by replacing the logical and with a bitwise and.
      
      Fixes: 34c2f668 ("MIPS: microMIPS: Add unaligned access support.")
      Signed-off-by: NMatt Redfearn <matt.redfearn@imgtec.com>
      Cc: Marcin Nowakowski <marcin.nowakowski@imgtec.com>
      Cc: Ingo Molnar <mingo@kernel.org>
      Cc: Paul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/16954/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      b332fec0
    • M
      MIPS: Handle non word sized instructions when examining frame · 11887ed1
      Matt Redfearn 提交于
      Commit 34c2f668 ("MIPS: microMIPS: Add unaligned access support.")
      added fairly broken support for handling 16bit microMIPS instructions in
      get_frame_info(). It adjusts the instruction pointer by 16bits in the
      case of a 16bit sp move instruction, but not any other 16bit
      instruction.
      
      Commit b6c7a324 ("MIPS: Fix get_frame_info() handling of microMIPS
      function size") goes some way to fixing get_frame_info() to iterate over
      microMIPS instuctions, but the instruction pointer is still manipulated
      using a postincrement, and is of union mips_instruction type. Since the
      union is sized to the largest member (a word), but microMIPS
      instructions are a mix of halfword and word sizes, the function does not
      always iterate correctly, ending up misaligned with the instruction
      stream and interpreting it incorrectly.
      
      Since the instruction modifying the stack pointer is usually the first
      in the function, that one is usually handled correctly. But the
      instruction which saves the return address to the sp is some variable
      number of instructions into the frame and is frequently missed due to
      not being on a word boundary, leading to incomplete walking of the
      stack.
      
      Fix this by incrementing the instruction pointer based on the size of
      the previously decoded instruction (& remove the hack introduced by
      commit 34c2f668 ("MIPS: microMIPS: Add unaligned access support.")
      which adjusts the instruction pointer in the case of a 16bit sp move
      instruction, but not any other).
      
      Fixes: 34c2f668 ("MIPS: microMIPS: Add unaligned access support.")
      Signed-off-by: NMatt Redfearn <matt.redfearn@imgtec.com>
      Cc: Marcin Nowakowski <marcin.nowakowski@imgtec.com>
      Cc: James Hogan <james.hogan@imgtec.com>
      Cc: Ingo Molnar <mingo@kernel.org>
      Cc: Paul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/16953/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      11887ed1
    • J
      MIPS: ralink: allow NULL clock for clk_get_rate · a18097b7
      Jonas Gorski 提交于
      Make the behaviour of clk_get_rate consistent with common clk's
      clk_get_rate by accepting NULL clocks as parameter. Some device
      drivers rely on this, and will cause an OOPS otherwise.
      
      Fixes: 3f0a06b0 ("MIPS: ralink: adds clkdev code")
      Reported-by: NMathias Kresin <dev@kresin.me>
      Signed-off-by: NJonas Gorski <jonas.gorski@gmail.com>
      Cc: John Crispin <john@phrozen.org>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/16778/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      a18097b7