Signed-off-by: NTony Cheng <tony.cheng@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NHersen Wu <hersenxs.wu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NYongqiang Sun <yongqiang.sun@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

In some use-cases, e.g. multiple 4K displays,
exisitng wait time for reg update of 30msec timed out
during mode setiing that sometimes resulted in system bad state
as we continue without waiting for registry update complete.
Increasing timeout to 35msec fixes that problem.
Signed-off-by: NRoman Li <Roman.Li@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NCharlene Liu <charlene.liu@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NKrunoslav Kovac <Krunoslav.Kovac@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Register ISR hnadler on the new interrupt.
Signed-off-by: NAndrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NAndrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

VBLANK interrupt is driven bu line buffer vcounter which is
ahead of CRTC vcounter. Use an interrupt that fires at the actual
CRTC vblank start boundry.
Signed-off-by: NAndrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NAndrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NYongqiang Sun <yongqiang.sun@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Leave hardcoded if no ContainerId provided by DM.
Signed-off-by: NDuke Du <Duke.Du@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NCharlene Liu <charlene.liu@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NCharlene Liu <charlene.liu@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com>
Reviewed-by: NAnthony Koo <Anthony.Koo@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NCharlene Liu <charlene.liu@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

1. Locking all pipes before doing any changes
2. Applying surface for both top and bottom pipes
Signed-off-by: NLeon Elazar <leon.elazar@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NAndrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: NJordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This will return back MAX cursor size for given ASIC.
Signed-off-by: NAndrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: NJordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NAndrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: NJordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NAndrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NJordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

ret value in amdgpu_dm_atomic_check was not rest to EINVAL
after drm_atomic_add_affected_planes and by this making
any subsequent validation failure pass when returning
to atomic_check.

v2: Add WARN_ON print for dc_commit_streams in
amdgpu_dm_atomic_commit_tail since this should never
fail.
Signed-off-by: NAndrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NAndrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NTony Cheng <tony.cheng@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

- also some clean up
Signed-off-by: NTony Cheng <tony.cheng@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NYongqiang Sun <yongqiang.sun@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NTony Cheng <tony.cheng@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NAnthony Koo <Anthony.Koo@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

1. Adding the ability to update the stream parameters during FULL_UPDATE type
Signed-off-by: NLeon Elazar <leon.elazar@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Problem]
VSR greyed out

[Root cause]
When converting fractions, we were using the integer function, which let to
a large display clock and the view was not supported

[Solution]
Change the integer to fraction functions
Signed-off-by: NLogatharshan Thothiralingam <logatharshan.thothiralingam@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NLeon Elazar <leon.elazar@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Add the DC display module to drive the DCE12 IP on vega10.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NJordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NJordan Lazare <Jordan.Lazare@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NCharlene Liu <charlene.liu@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NKrunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This wires DCE12 support into DC and enables it.
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Viewport would be incorrectly adjusted when surface was used
for multiple displays
Signed-off-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NJordan Lazare <Jordan.Lazare@amd.com>
Acked-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>