- 26 7月, 2011 7 次提交
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由 Russell King - ARM Linux 提交于
Clean up debugging when setting up the LLI list. This reduces the amount of output while preserving the information, and makes it easier to read. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Russell King - ARM Linux 提交于
Avoid re-selecting the LLI bus each time we create an LLI. Move it out of the LLI setup loops. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Russell King - ARM Linux 提交于
PL08X_WQ_PERIODMIN and PL08X_MAX_ALLOCS are not used, remove them. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Dong Aisheng 提交于
We met some channels in abnormal state after disable. Reset it to get a clean state. Signed-off-by: NDong Aisheng <b29396@freescale.com> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Axel Lin 提交于
Call pci_set_drvdata() once in intel_mid_dma_probe() is enough. Remove redundant pci_set_drvdata() calls in dma_suspend() and dma_resume(). Signed-off-by: NAxel Lin <axel.lin@gmail.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Axel Lin 提交于
Signed-off-by: NAxel Lin <axel.lin@gmail.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Rob Herring 提交于
The pl330 needs platform data for describing peripheral connections, but some platforms may only support memory to memory dma channels. In this case, we can probe for how many channels there are and don't need the platform data. As memcpy requests don't need channel private data to hold peripheral info, allow private data to be NULL in this case. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Jassi Brar <jassisinghbrar@gmail.com> Cc: Vinod Koul <vkoul@infradead.org> Cc: Dan Williams <dan.j.williams@intel.com> Acked-by: NJassi Brar <jassisinghbrar@gmail.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 25 7月, 2011 2 次提交
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由 Axel Lin 提交于
Signed-off-by: NAxel Lin <axel.lin@gmail.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Tomoya MORINAGA 提交于
Currently, Mode-Control register is accessed by read-modify-write. According to DMA hardware specifications datasheet, prohibits this method. Because this register resets to 0 by DMA HW after DMA transfer completes. Thus, current read-modify-write processing can cause unexpected behavior. The datasheet says in case of writing Mode-Control register, set the value for only target channel, the others must set '11b'. e.g. Set DMA0=01b DMA11=10b CTL0=33333331h CTL2=00002333h NOTE: CTL0 includes DMA0~7 Mode-Control register. CTL2 includes DMA8~11 Mode-Control register. This patch modifies the issue. Signed-off-by: NTomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 14 7月, 2011 10 次提交
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由 Shawn Guo 提交于
In general, the mxs-dma users get separate irq for each channel, but gpmi is special one which has only one irq shared by all gpmi channels. It causes mxs_dma channel allocation function fail for all other gpmi channels except the first one calling into the function. The patch gets request_irq call skipped for NO_IRQ case, and leaves this gpmi specific quirk to gpmi driver to sort out. It will fix above problem if gpmi driver sets chan_irq as gpmi irq for only one channel and NO_IRQ for all the rest channels. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Cc: Vinod Koul <vinod.koul@intel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Linus Walleij 提交于
While testing Per Forlins MMC speed improvements I noticed a semantic bug in the COH901318 driver: it will write to channel registers in the prep_slave_sg() function, instead of deferring it to later, breaking the assumption from the drivers to be able to queue up new jobs while another job is running. Fix this by storing up the initial register writes in the job descriptors and write them to hardware when we process the descriptor instead. Now the stress tests work. Acked-by: NPer Forlin <per.forlin@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Rabin Vincent 提交于
Currently the runtime config implementation forces the memory side parameters to be the same as the peripheral side. Allow these to be different, and check for misconfiguration. Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com> Reviewed-by: NUlf HANSSON <ulf.hansson@stericsson.com> Tested-by: NStefan Nilsson <stefan.xk.nilsson@stericsson.com> Reviewed-by: NPer Forlin <per.forlin@stericsson.com> Reviewed-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Robert Marklund <robert.marklund@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Linus Walleij 提交于
The DMA40 is not a PrimeCell from ARM, but it still use the same ID registers. So let's utilize the existing macros in the PrimeCell header to identify manufacturer and revision of the IP block instead of reinventing the wheel. Cc: Robert Marklund <robert.marklund@stericsson.com> Cc: Per Forlin <per.forlin@linaro.org> Cc: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Robert Marklund 提交于
This function may be initiated from IRQ context, so the allocation must allocate NOWAIT memory. Signed-off-by: NRobert Marklund <robert.marklund@stericsson.com> Reviewed-by: NRabin Vincent <rabin.vincent@stericsson.com> Reviewed-by: NPhilippe Langlais <philippe.langlais@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 om prakash 提交于
Missing documentation creates kernel-doc warnings, so add the documenation. Signed-off-by: NOm Prakash <omprakash.pal@stericsson.com> Reviewed-by: NRabin Vincent <rabin.vincent@stericsson.com> Reviewed-by: NJonas Aberg <jonas.aberg@stericsson.com> Reviewed-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Per Forlin 提交于
ste_dma40 now implements issue_pending according to documentation. Submit adds descriptos to a pending queue with are flushed down to the DMAC at issue_pending. Signed-off-by: NPer Forlin <per.forlin@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Per Forlin 提交于
tx_submit will add descriptors to the pending queue. Issue pending will then move the pending descriptors to the transfer queue. Signed-off-by: NPer Forlin <per.forlin@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Alexander Stein 提交于
Fix for the following INFO message ================================= [ INFO: inconsistent lock state ] 2.6.39+ #89 --------------------------------- inconsistent {HARDIRQ-ON-W} -> {IN-HARDIRQ-W} usage. rs232/822 [HC1[1]:SC0[0]:HE0:SE1] takes: (&(&pd_chan->lock)->rlock){?.....}, at: [<c123b9a1>] pdc_desc_get+0x16/0xab {HARDIRQ-ON-W} state was registered at: [<c104fe28>] mark_irqflags+0xbd/0x11a [<c1050386>] __lock_acquire+0x501/0x6bb [<c1050945>] lock_acquire+0x63/0x7b [<c131c51d>] _raw_spin_lock_bh+0x43/0x51 [<c123bee4>] pd_alloc_chan_resources+0x92/0x11e [<c123ad62>] dma_chan_get+0x9b/0x107 [<c123b2d1>] __dma_request_channel+0x61/0xdc [<c11ba24b>] pch_request_dma+0x61/0x19e [<c11bb3b8>] pch_uart_startup+0x16a/0x1a2 [<c11b8446>] uart_startup+0x87/0x147 [<c11b9183>] uart_open+0x117/0x13e [<c11a5c7d>] tty_open+0x23c/0x34c [<c1097705>] chrdev_open+0x140/0x15f [<c10930a6>] __dentry_open.clone.14+0x14a/0x22b [<c1093dfb>] nameidata_to_filp+0x36/0x40 [<c109f28b>] do_last+0x513/0x635 [<c109f4af>] path_openat+0x9c/0x2aa [<c109f6e4>] do_filp_open+0x27/0x69 [<c1093f02>] do_sys_open+0xfd/0x184 [<c1093fad>] sys_open+0x24/0x2a [<c131d58c>] sysenter_do_call+0x12/0x32 irq event stamp: 2522 hardirqs last enabled at (2521): [<c131ca3b>] _raw_spin_unlock_irqrestore+0x36/0x52 hardirqs last disabled at (2522): [<c131db27>] common_interrupt+0x27/0x34 softirqs last enabled at (2354): [<c102fa11>] __do_softirq+0x10a/0x11a softirqs last disabled at (2299): [<c10041a4>] do_softirq+0x57/0xa4 other info that might help us debug this: 2 locks held by rs232/822: #0: (&tty->atomic_write_lock){+.+.+.}, at: [<c11a4b7a>] tty_write_lock+0x14/0x3c #1: (&port_lock_key){-.....}, at: [<c11bad72>] pch_uart_interrupt+0x17/0x1e9 stack backtrace: Pid: 822, comm: rs232 Not tainted 2.6.39+ #89 Call Trace: [<c1319f90>] ? printk+0x19/0x1b [<c104f893>] print_usage_bug+0x184/0x18f [<c104e5b1>] ? print_irq_inversion_bug+0x10e/0x10e [<c104f943>] mark_lock_irq+0xa5/0x1f6 [<c104fc9c>] mark_lock+0x208/0x2d7 [<c104fdc0>] mark_irqflags+0x55/0x11a [<c1050386>] __lock_acquire+0x501/0x6bb [<c10042ee>] ? dump_trace+0x92/0xb6 [<c1050945>] lock_acquire+0x63/0x7b [<c123b9a1>] ? pdc_desc_get+0x16/0xab [<c131c2d0>] _raw_spin_lock+0x3e/0x4c [<c123b9a1>] ? pdc_desc_get+0x16/0xab [<c123b9a1>] pdc_desc_get+0x16/0xab [<c10504d8>] ? __lock_acquire+0x653/0x6bb [<c123bb2c>] pd_prep_slave_sg+0x7c/0x1cb [<c1006c3f>] ? nommu_map_sg+0x6e/0x81 [<c11bace6>] dma_handle_tx+0x2cf/0x344 [<c11bad72>] ? pch_uart_interrupt+0x17/0x1e9 [<c11baebb>] pch_uart_interrupt+0x160/0x1e9 [<c10642fb>] handle_irq_event_percpu+0x25/0x127 [<c1064429>] handle_irq_event+0x2c/0x43 [<c1065e0d>] ? handle_fasteoi_irq+0x84/0x84 [<c1065eb9>] handle_edge_irq+0xac/0xce <IRQ> [<c1003ecb>] ? do_IRQ+0x38/0x9d [<c131db2e>] ? common_interrupt+0x2e/0x34 [<c105007b>] ? __lock_acquire+0x1f6/0x6bb [<c131ca3d>] ? _raw_spin_unlock_irqrestore+0x38/0x52 [<c11b798b>] ? uart_start+0x2d/0x32 [<c11b7998>] ? uart_flush_chars+0x8/0xa [<c11a7962>] ? n_tty_write+0x12c/0x1c6 [<c1027a73>] ? try_to_wake_up+0x251/0x251 [<c11a4d0b>] ? tty_write+0x169/0x1dc [<c11a7836>] ? n_tty_ioctl+0xb7/0xb7 [<c1094841>] ? vfs_write+0x91/0x10d [<c11a4ba2>] ? tty_write_lock+0x3c/0x3c [<c1094a69>] ? sys_write+0x3e/0x63 [<c131d58c>] ? sysenter_do_call+0x12/0x32 Signed-off-by: NAlexander Stein <alexander.stein@systec-electronic.com> Tested-by: NTomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 H Hartley Sweeten 提交于
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Cc: Dan Williams <dan.j.williams@intel.com> (supporter:ASYNCHRONOUS TRAN...) Cc: Vinod Koul <vinod.koul@intel.com> (supporter:DMA GENERIC OFFLO...) Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 24 6月, 2011 1 次提交
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由 Guennadi Liakhovetski 提交于
There exist systems with multiple DMA controllers with different capabilities. For example, on some sh-mobile / rmobile systems there are DMA controllers, whose channels can be configured to be used with SD- and MMC-host controllers, serial ports etc. Besides there are also DMA controllers, that can only be used for one special function, e.g., for USB. In such cases the DMA client filter function can just choose to specify to the DMA driver, which channel it needs. Then the .device_alloc_chan_resources() method of the DMA driver will check, whether it can provide that dunction. If not, it will fail and the loop in __dma_request_channel() will continue to the next DMA device, until it finds a suitable one. This works fine with just one minor glitch: the kernel logs error messages like dmaengine: failed to get <channel name>: (-<error code>) after each such non-critical failure. This patch lowers priority of this message to the debug level. Reported-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Tested-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 16 6月, 2011 1 次提交
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由 H Hartley Sweeten 提交于
The symbol 'ep93xx_dma_prep_dma_memcpy' is only used in this driver and should be marked static. Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Cc: Mika Westerberg <mika.westerberg@iki.fi> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Vinod Koul <vinod.koul@intel.com> Acked-by: NMika Westerberg <mika.westerberg@iki.fi> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 10 6月, 2011 1 次提交
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由 Vinod Koul 提交于
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- 09 6月, 2011 7 次提交
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由 Mika Westerberg 提交于
This patch adds DMA support for the EP93xx SPI driver. By default the DMA is not enabled but it can be enabled by setting ep93xx_spi_info.use_dma to true in board configuration file. Note that the SPI driver still uses PIO for small transfers (<= 8 bytes) for performance reasons. Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Mika Westerberg 提交于
Since we have converted all existing users of the old DMA API to use the DMA engine API the old code can be dropped. Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi> Acked-by: NRyan Mallon <rmallon@gmail.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Mika Westerberg 提交于
Now that we have the EP93xx DMA engine driver in place, we convert the ASoC drivers (I2S, AC97 and PCM) to take advantage of this new API. There are no functional changes. Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NLiam Girdwood <lrg@ti.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Mika Westerberg 提交于
Add platform support code for the new EP93xx dmaengine driver. Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi> Signed-off-by: NRyan Mallon <rmallon@gmail.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Mika Westerberg 提交于
The ep93xx DMA controller has 10 independent memory to peripheral (M2P) channels, and 2 dedicated memory to memory (M2M) channels. M2M channels can also be used by SPI and IDE to perform DMA transfers to/from their memory mapped FIFOs. This driver supports both M2P and M2M channels with DMA_SLAVE, DMA_CYCLIC and DMA_MEMCPY (M2M only) capabilities. Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi> Signed-off-by: NRyan Mallon <rmallon@gmail.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Grant Likely 提交于
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由 Geert Uytterhoeven 提交于
One new offender detected by the recently increased type checking in platform_get_drvdata(): drivers/rtc/rtc-m41t93.c: In function ‘m41t93_remove’: drivers/rtc/rtc-m41t93.c:192: warning: passing argument 1 of ‘platform_get_drvdata’ from incompatible pointer type Use spi_get_drvdata() instead of platform_get_drvdata(), cfr. commit 42fea15d ("spi/rtc-{ds1390,ds3234,m41t94}: Use spi_get_drvdata() for SPI devices") Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 06 6月, 2011 11 次提交
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由 Linus Torvalds 提交于
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由 Hugh Dickins 提交于
Al Viro observes that in the hugetlb case, handle_mm_fault() may return a value of the kind ENOSPC when its caller is expecting a value of the kind VM_FAULT_SIGBUS: fix alloc_huge_page()'s failure returns. Signed-off-by: NHugh Dickins <hughd@google.com> Acked-by: NAl Viro <viro@zeniv.linux.org.uk> Cc: stable@kernel.org Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6由 Linus Torvalds 提交于
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6: ALSA: usb - turn off de-emphasis in s/pdif for cm6206 ALSA: asihpi: Use angle brackets for system includes ALSA: fm801: add error handling if auto-detect fails ALSA: hda - Check pin support EAPD in ad198x_power_eapd_write ALSA: hda - Fix HP and Front pins of ad1988/ad1989 in ad198x_power_eapd() ALSA: 6fire: Don't leak firmware in error path ASoC: Fix wm_hubs input PGA ZC bits ASoC: Fix dapm_is_shared_kcontrol so everything isn't shared
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git://git.kernel.org/pub/scm/linux/kernel/git/groeck/staging由 Linus Torvalds 提交于
* 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/staging: hwmon: (max6642): Better chip detection schema hwmon: (coretemp) Further relax temperature range checks hwmon: (coretemp) Fix TjMax detection for older CPUs hwmon: (coretemp) Relax target temperature range check hwmon: (max6642) Rename temp_fault sysfs attribute to temp2_fault
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由 H Hartley Sweeten 提交于
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Vinod Koul <vinod.koul@intel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 H Hartley Sweeten 提交于
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Anatolij Gustschin <agust@denx.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Takashi Iwai 提交于
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由 Mika Westerberg 提交于
This patch adds DMA support for the EP93xx SPI driver. By default the DMA is not enabled but it can be enabled by setting ep93xx_spi_info.use_dma to true in board configuration file. Note that the SPI driver still uses PIO for small transfers (<= 8 bytes) for performance reasons. Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Mika Westerberg 提交于
Since we have converted all existing users of the old DMA API to use the DMA engine API the old code can be dropped. Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi> Acked-by: NRyan Mallon <rmallon@gmail.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Mika Westerberg 提交于
Now that we have the EP93xx DMA engine driver in place, we convert the ASoC drivers (I2S, AC97 and PCM) to take advantage of this new API. There are no functional changes. Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NLiam Girdwood <lrg@ti.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Mika Westerberg 提交于
Add platform support code for the new EP93xx dmaengine driver. Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi> Signed-off-by: NRyan Mallon <rmallon@gmail.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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