Unfortunately we used the enabled flag in struct drm_crtc instead of the
enabled flag in struct atmel_hlcdc_crtc. This obviously leads to
discrepancies on crtc enable state.

This patch fixes the issue by using the struct atmel_hlcdc_crtc enabled
flag in PM support.
Signed-off-by: NSylvain Rochet <sylvain.rochet@finsecur.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Use cases like rotation require these hooks to have some context so they
know how to prepare and cleanup the frame buffer correctly.

For i915 specifically, object backing pages need to be mapped differently
for different rotation modes and the driver needs to know which mapping to
instantiate and which to tear down when transitioning between them.

v2: Made passed in states const. (Daniel Vetter)

[airlied: add mdp5 and atmel fixups]
Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: dri-devel@lists.freedesktop.org
Reviewed-by: NRob Clark <robdclark@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Remove this configuration bit in crtc driver as the rising edge clock is widely
used.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Remove a useless pm_runtime_put_sync leading to unbalanced
usage_count.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Reported-by: NSylvain Rochet <sylvain.rochet@finsecur.com>

The A2Q (Add To Queue) and UPDATE bits are left in their previous state
when resetting the layer.
This lead to weird behavior when enabling the plane again: the framebuffer
previously queued is dequeued and we end up with access to an old memory
region.

Reset those bits when resetting the channel.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Some LCD panels have back-powering issue when un-powered, allows users
to use an alternate pinctrl "sleep" in order to clamp outputs to a
wanted state at suspend.
Signed-off-by: NSylvain Rochet <sylvain.rochet@finsecur.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

On suspend: switch off CRTC if not already suspended with runtime PM

On resume: switch on CRTC if we were not already suspended from runtime
PM while suspending.
Signed-off-by: NSylvain Rochet <sylvain.rochet@finsecur.com>
Reviewed-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

The HLCDC IP provides a way to discard a specific area on the primary
plane (in case at least one of the overlay is activated and alpha
blending is disabled).
Doing this will reduce the amount of data to transfer from the main
memory to the Display Controller, and thus alleviate the load on the
memory bus (since this link is quite limited on such hardware,
this kind of optimization is really important).
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch>

Convert the HLCDC driver to atomic mode-setting.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: NSylvain Rochet <sylvain.rochet@finsecur.com>
Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch>

The atmel-hlcdc driver selects DRM_GEM_CMA_HELPER which makes use of
symbols only available when HAVE_DMA_ATTRS is selected.
Add a dependency on the ARM architecture which select this option.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NDave Airlie <airlied@gmail.com>

The Atmel HLCDC (HLCD Controller) IP available on some Atmel SoCs (i.e.
at91sam9n12, at91sam9x5 family or sama5d3 family) provides a display
controller device.

This display controller supports at least one primary plane and might
provide several overlays and an hardware cursor depending on the IP
version.

At the moment, this driver only implements an RGB connector to interface
with LCD panels, but support for other kind of external devices might be
added later.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Reviewed-by: NRob Clark <robdclark@gmail.com>
Tested-by: NAnthony Harivel <anthony.harivel@emtrion.de>
Tested-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>