- 22 9月, 2011 2 次提交
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由 Guenter Roeck 提交于
With commit c814a4c7, the meaning of tempX_max was changed. It no longer returns the value of bits 8:15 of MSR_IA32_TEMPERATURE_TARGET, but instead returns the value of CPU threshold register T1. tempX_max_hyst was added to reflect the value of temperature threshold register T0. As it turns out, T0 and T1 are used on some systems, presumably by the BIOS. Also, T0 and T1 don't have a well defined meaning. The thresholds may be used as upper or lower limits, and it is not guaranteed that T0 <= T1. Thus, the new attribute mapping does not reflect the actual usage of the threshold registers. Also, register contents are changed during runtime by an entity other than the hwmon driver, meaning the values cached by the driver do not reflect actual register contents. Revert most of c814a4c7 to address the problem. Support for T0 and T1 will be added back in with a separate commit, using new attribute names. Signed-off-by: NGuenter Roeck <guenter.roeck@ericsson.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: Durgadoss R <durgadoss.r@intel.com> Acked-by: NJean Delvare <khali@linux-fr.org>
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由 Jean Delvare 提交于
On old CPUs (and even some recent Atom CPUs) TjMax can't be read from the CPU registers, so it is guessed by the driver using a complex heuristic which isn't reliable. So let users who know their CPU's TjMax pass it as a module parameter. Signed-off-by: NJean Delvare <khali@linux-fr.org> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: "R, Durgadoss" <durgadoss.r@intel.com> Cc: Guenter Roeck <guenter.roeck@ericsson.com> Cc: Alexander Stein <alexander.stein@systec-electronic.com> Acked-by: NFenghua Yu <fenghua.yu@intel.com> Signed-off-by: NGuenter Roeck <guenter.roeck@ericsson.com>
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- 28 7月, 2011 1 次提交
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由 Durgadoss R 提交于
This patch adds the core and pkg support to coretemp. These thresholds can be configured via the sysfs interfaces tempX_max and tempX_max_hyst. An interrupt is generated when CPU temperature reaches or crosses above tempX_max OR drops below tempX_max_hyst. This patch is based on the documentation in IA Manual vol 3A, that can be downloaded from here: http://download.intel.com/design/processor/manuals/253668.pdfSigned-off-by: NDurgadoss R <durgadoss.r@intel.com> Signed-off-by: NGuenter Roeck <guenter.roeck@ericsson.com>
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- 20 5月, 2011 1 次提交
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由 Durgadoss R 提交于
This patch merges the pkgtemp with coretemp driver. The sysfs interfaces for all cores in the same pkg are shown under one directory, in hwmon. It also supports CONFIG_HOTPLUG_CPU. So, the sysfs interfaces are created when each core comes online and are removed when it goes offline. Signed-off-by: NDurgadoss R <durgadoss.r@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> [guenter.roeck@ericsson.com: Fixed section reference errors] Signed-off-by: NGuenter Roeck <guenter.roeck@ericsson.com>
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- 10 8月, 2010 1 次提交
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由 Chen Gong 提交于
Update coretemp supported CPU TjMax lists and some cleanup work. Signed-off-by: NChen Gong <gong.chen@linux.intel.com> Cc: Rudolf Marek <r.marek@assembler.cz> Cc: Huaxu Wan <huaxu.wan@intel.com> Cc: Jean Delvare <khali@linux-fr.org> Cc: Guenter Roeck <guenter.roeck@ericsson.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 24 9月, 2009 3 次提交
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由 Huaxu Wan 提交于
Add Lynnfield processor support. Lynnfield is a quad-core Nehalem based microprocessor for Desktop market, which is introduced in September 2009. Signed-off-by: NHuaxu Wan <huaxu.wan@linux.intel.com> Signed-off-by: NKent Liu <kent.liu@linux.intel.com> Acked-by: NRudolf Marek <r.marek@assembler.cz> Signed-off-by: NJean Delvare <khali@linux-fr.org>
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由 Rudolf Marek 提交于
Following patch adds support for mobile Penryn CPUs. Intel documents this poorly. I asked the Coretemp author for some help. This is totally untested and may not work. Please test! Signed-off-by: NRudolf Marek <r.marek@assembler.cz> Cc: Huaxu Wan <huaxu.wan@linux.intel.com> Cc: Kent Liu <kent.liu@linux.intel.com> Signed-off-by: NJean Delvare <khali@linux-fr.org>
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由 Rudolf Marek 提交于
Fix Atom CPUs support. Intel documents TjMax at 90 degrees C but some Atoms may have 125 degrees C (this is undocumented speculation). Signed-off-by: NRudolf Marek <r.marek@assembler.cz> Cc: Huaxu Wan <huaxu.wan@linux.intel.com> Cc: Kent Liu <kent.liu@linux.intel.com> Signed-off-by: NJean Delvare <khali@linux-fr.org>
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- 18 2月, 2008 1 次提交
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由 Rudolf Marek 提交于
This patch adds support for family 0x17, which has Penryn Core. It should also cover the 8 cores Xeons. Can someone test please? I think it should work. Signed-off-by: NRudolf Marek <r.marek@assembler.cz> Acked-by: NJean Delvare <khali@linux-fr.org> Signed-off-by: NMark M. Hoffman <mhoffman@lightlink.com>
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- 17 2月, 2008 1 次提交
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由 Rudolf Marek 提交于
Following patch will add reporting of maximum temperature, at which all fans should spin full speed. It may be non-physical temperature on Desktop/Server CPUs. Signed-off-by: NRudolf Marek <r.marek@assembler.cz> Acked-by: NJean Delvare <khali@linux-fr.org> Signed-off-by: NMark M. Hoffman <mhoffman@lightlink.com>
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- 10 10月, 2007 1 次提交
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由 Rudolf Marek 提交于
This patch adds support for the Celeron 4xx based on Core 2 core. Signed-off-by: NRudolf Marek <r.marek@assembler.cz> Signed-off-by: NMark M. Hoffman <mhoffman@lightlink.com>
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- 08 5月, 2007 1 次提交
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由 Rudolf Marek 提交于
Documentation for the coretemp driver. Signed-off-by: NRudolf Marek <r.marek@assembler.cz> Signed-off-by: NJean Delvare <khali@linux-fr.org>
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