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  1. 13 10月, 2007 2 次提交
  3. 12 10月, 2007 1 次提交
  5. 21 7月, 2007 2 次提交
    • E
      [ARM] 4489/1: pxa: split pxa_cpu_suspend to processor specific ones · b750a093
      由 Eric Miao 提交于 
      1. split pxa_cpu_suspend to pxa25x_cpu_suspend and pxa27x_cpu_suspend
   and make pxa25x_cpu_pm_enter() and pxa27x_cpu_pm_enter() to invoke
   the corresponding _suspend functions, thus remove all those ugly
   #ifdef .. #endif out of sleep.S

2. move the declarations of those suspend functions to pm.h

note: this is not a clean enough solution until all the pxa25x and
pxa27x specific part is further removed out of sleep.S, sleep.S is
supposed to contain generic code only
Signed-off-by: Neric miao <eric.y.miao@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      b750a093
    • E
      [ARM] 4488/1: pxa: move pxa25x/pxa27x specific code out of pm.c · 711be5cc
      由 Eric Miao 提交于 
      1. introduce a structure pxa_cpu_pm_fns for pxa25x/pxa27x specific
   operations as follows:

	struct pxa_cpu_pm_fns {
		int	save_size;
		void	(*save)(unsigned long *);
		void	(*restore)(unsigned long *);
		int	(*valid)(suspend_state_t state);
		void	(*enter)(suspend_state_t state);
	}

2. processor specific registers saving and restoring are performed
   by calling the corresponding (*save) and (*restore)

3. pxa_cpu_pm_fns->save_size should be initialized to the required
   size for processor specific registers saving, the allocated
   memory address will be passed to (*save) and (*restore)

   memory allocation happens early in pxa_pm_init(), and save_size
   should be assigned prior to this (which is usually true, since
   pxa_pm_init() happens in device_initcall()

4. there're some redundancies for those SLEEP_SAVE_XXX and related
   macros, will be fixed later, one way possible is for the system
   devices to handle the specific registers saving and restoring
Signed-off-by: Neric miao <eric.y.miao@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      711be5cc
  7. 13 7月, 2007 1 次提交
  9. 12 7月, 2007 7 次提交
  11. 03 6月, 2007 1 次提交
  13. 01 5月, 2007 1 次提交
  15. 22 4月, 2007 2 次提交
    • E
      [ARM] 4304/1: removes the unnecessary bit number from CKENnn_XXXX · 7053acbd
      由 Eric Miao 提交于 
      This patch removes the unnecessary bit number from CKENnn_XXXX
definitions for PXA, so that

	CKEN0_PWM0 --> CKEN_PWM0
	CKEN1_PWM1 --> CKEN_PWM1
	...
	CKEN24_CAMERA --> CKEN_CAMERA

The reasons for the change of these defitions are:

1. they do not scale - they are currently valid for pxa2xx, but
definitely not valid for pxa3xx, e.g., pxa3xx has bit 3 for camera
instead of bit 24

2. they are unnecessary - the peripheral name within the definition
has already announced its usage, we don't need those bit numbers
to know which peripheral we are going to enable/disable clock for

3. they are inconvenient - think about this: a driver programmer
for pxa has to remember which bit in the CKEN register to turn
on/off

Another change in the patch is to make the definitions equal to its
clock bit index, so that

   #define CKEN_CAMERA  (24)

instead of

   #define CKEN_CAMERA  (1 << 24)

this change, however, will add a run-time bit shift operation in
pxa_set_cken(), but the benefit of this change is that it scales
when bit index exceeds 32, e.g., pxa3xx has two registers CKENA
and CKENB, totally 64 bit for this, suppose CAMERA clock enabling
bit is CKENB:10, one can simply define CKEN_CAMERA to be (32 + 10)
and so that pxa_set_cken() need minimum change to adapt to that.
Signed-off-by: Neric miao <eric.y.miao@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      7053acbd
    • M
      [ARM] 4246/1: i2c-pxa: add adapter class to platform specific data · a79220b7
      由 Matej Kenda 提交于 
      Reposted patch for kernel 2.6.21-rc2.

The driver i2c-pxa doesn't set the class member in i2c_adapter, which
is used to register the I2C adapter. The hwmon (sensors) drivers (e.g.
adm1021) that are connected to a i2c-pxa adapter don't attach because
they expect that the adapter supports class I2C_CLASS_HWMON.

This patch adds functionality to allow platforms to set the class and
pass it as platform_data to the i2c-pxa driver. Sample usage in
platform code:

static struct i2c_pxa_platform_data my_i2c_platform_data = {
	.class = I2C_CLASS_HWMON
};

static void __init my_platform_init(void)
{
	(void) platform_add_devices(devices, ARRAY_SIZE(devices));

	pxa_set_i2c_info(&my_i2c_platform_data);
}
Signed-off-by: NMatej Kenda <matej.kenda@hermes-softlab.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      a79220b7
  17. 25 3月, 2007 1 次提交
    • G
      [ARM] 4278/1: configure pxa27x I2C SCL as "input" · 53698d25
      由 Guennadi Liakhovetski 提交于 
      It has been reported by Julian Deng that configuring the pxa27x i2c SCL line as output generates a short negative pulse on it during the call to pxa_gpio_mode(GPIO117_I2CSCL_MD); as it first switches it to output and then configures it for the alternate function. The SCL line is in fact bidirectional and can also be configured as 117 | GPIO_ALT_FN_1_IN, in which case the pulse is not generated. This is exactly what this patch does.

Author: Julian Deng <dengtj@sitek.cn>
Signed-off-by: NG. Liakhovetski <gl@dsa-ac.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      53698d25
  19. 17 3月, 2007 1 次提交
  21. 16 3月, 2007 1 次提交
  23. 21 2月, 2007 1 次提交
  25. 17 2月, 2007 2 次提交
    • D
      [ARM] 4185/2: entry: introduce get_irqnr_preamble and arch_ret_to_user · f80dff9d
      由 Dan Williams 提交于 
      get_irqnr_preamble allows machines to take some action before entering the
get_irqnr_and_base loop.  On iop we enable cp6 access.

arch_ret_to_user is added to the userspace return path to allow individual
architectures to take actions, like disabling coprocessor access, before
the final return to userspace.

Per Nicolas Pitre's note, there is no need to cp_wait on the return to user
as the latency to return is sufficient.
Signed-off-by: NDan Williams <dan.j.williams@intel.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      f80dff9d
    • N
      [ARM] 4090/2: avoid clash between PXA and SA1111 defines · bc43fd40
      由 Nicolas Pitre 提交于 
      The Lubbock platform uses both a PXA25x and a SA1111 at the same time.
Both chips have the same "Serial Audio Controller" registers although
the SA1111 one is never expected to be used in preference to the PXA25x
one. So let's disable the SA1111 defines whenever compilation is for a
PXA architecture and make the PXA defines always defined.

This removes a bunch of "already defined" warnings as well since the
current hack to prevent them depended on include ordering which wasn't
always right.

While at it, clean up the SA1111 defines allowing to get rid of the
__CCREG() macro.
Signed-off-by: NNicolas Pitre <nico@cam.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      bc43fd40
  27. 13 2月, 2007 1 次提交
  29. 08 2月, 2007 2 次提交
  31. 03 1月, 2007 2 次提交
  33. 11 12月, 2006 1 次提交
    • S
      [PATCH] spi: stabilize PIO mode transfers on PXA2xx systems · 8d94cc50
      由 Stephen Street 提交于 
      Stabilize PIO mode transfers against a range of word sizes and FIFO
thresholds and fixes word size setup/override issues.

1) 16 and 32 bit DMA/PIO transfers broken due to timing differences.
2) Potential for bad transfer counts due to transfer size assumptions.
3) Setup function broken is multiple ways.
4) Per transfer bit_per_word changes break DMA setup in pump_tranfers.
5) False positive timeout are not errors.
6) Changes in pxa2xx_spi_chip not effective in calls to setup.
7) Timeout scaling wrong for PXA255 NSSP.
8) Driver leaks memory while busy during unloading.

Known issues:

SPI_CS_HIGH and SPI_LSB_FIRST settings in struct spi_device are not handled.

Testing:

This patch has been test against the "random length, random bits/word,
random data (verified on loopback) and stepped baud rate by octaves
(3.6MHz to 115kHz)" test.  It is robust in PIO mode, using any
combination of tx and rx thresholds, and also in DMA mode (which
internally computes the thresholds).

Much thanks to Ned Forrester for exhaustive reviews, fixes and testing.
The driver is substantially better for his efforts.
Signed-off-by: NStephen Street <stephen@streetfiresound.com>
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      8d94cc50
  35. 01 12月, 2006 1 次提交
    • R
      [ARM] Clean up discontigmem support · b7dc96d7
      由 Russell King 提交于 
      Most architectures have fairly simple discontiguous memory - a
simple set of successive regions each containing some memory.
These can be described simply as a log2 of their maximum size,
along with the base address of the first region and the number
of regions.

The base address is already described by PHYS_PFN_OFFSET, and
the number of regions via the MAX_NUMNODES and the number of
online nodes.

If we then supply the log2 of their maximum size, all the other
discontigmem macros can move into generic code.

There is one exception: lh7a40x seems to have a more complicated
setup; this is left alone.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      b7dc96d7
  37. 30 11月, 2006 3 次提交
  39. 04 11月, 2006 1 次提交
  41. 25 10月, 2006 1 次提交
  43. 14 10月, 2006 1 次提交
  45. 09 10月, 2006 1 次提交
    • D
      IRQ: Use the new typedef for interrupt handler function pointers · 40220c1a
      由 David Howells 提交于 
      Use the new typedef for interrupt handler function pointers rather than
actually spelling out the full thing each time.  This was scripted with the
following small shell script:

#!/bin/sh
egrep -nHrl -e 'irqreturn_t[ 	]*[(][*]' $* |
while read i
do
    echo $i
    perl -pi -e 's/irqreturn_t\s*[(]\s*[*]\s*([_a-zA-Z0-9]*)\s*[)]\s*[(]\s*int\s*,\s*void\s*[*]\s*[)]/irq_handler_t \1/g' $i || exit $?
done
Signed-Off-By: NDavid Howells <dhowells@redhat.com>
      40220c1a
  47. 07 10月, 2006 1 次提交
  49. 02 10月, 2006 1 次提交
  51. 28 9月, 2006 1 次提交
    • D
      USB: pxa2xx_udc understands GPIO based VBUS sensing · b2bbb20b
      由 David Brownell 提交于 
      This updates the PXA 25x UDC board-independent infrastructure for VBUS sensing
and the D+ pullup.  The original code evolved from rather bizarre support on
Intel's "Lubbock" reference hardware, so that on more sensible hardware it
doesn't work as well as it could/should.

The change is just to teach the UDC driver how to use built-in PXA GPIO pins
directly.  This reduces the amount of board-specfic object code needed, and
enables the use of a VBUS sensing IRQ on boards (like Gumstix) that have one.
With VBUS sensing, the UDC is unclocked until a host is actually connected.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      b2bbb20b