1. 26 6月, 2009 12 次提交
    • B
      powerpc/rtas: Turn rtas lock into a raw spinlock · f97bb36f
      Benjamin Herrenschmidt 提交于
      RTAS currently uses a normal spinlock. However it can be called from
      contexts where this is not necessarily a good idea. For example, it
      can be called while syncing timebases, with the core timebase being
      frozen. Unfortunately, that will deadlock in case of lock contention
      when spinlock debugging is enabled as the spin lock debugging code
      will try to use __delay() which ... relies on the timebase being
      enabled.
      
      Also RTAS can be used in some low level IRQ handling code path so it
      may as well be a raw spinlock for -rt sake.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      f97bb36f
    • B
      powerpc: Add irqtrace support for 32-bit powerpc · 5d38902c
      Benjamin Herrenschmidt 提交于
      Based on initial work from: Dale Farnsworth <dale@farnsworth.org>
      
      Add the low level irq tracing hooks for 32-bit powerpc needed
      to enable full lockdep functionality.
      
      The approach taken to deal with the code in entry_32.S is that
      we don't trace all the transitions of MSR:EE when we just turn
      it off to peek at TI_FLAGS without races. Only when we are
      calling into C code or returning from exceptions with a state
      that have changed from what lockdep thinks.
      
      There's a little bugger though: If we take an exception that
      keeps interrupts enabled (such as an alignment exception) while
      interrupts are enabled, we will call trace_hardirqs_on() on the
      way back spurriously. Not a big deal, but to get rid of it would
      require remembering in pt_regs that the exception was one of the
      type that kept interrupts enabled which we don't know at this
      stage. (Well, we could test all cases for regs->trap but that
      sucks too much).
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Tested-by: NKumar Gala <galak@kernel.crashing.org>
      5d38902c
    • B
      powerpc: Map more memory early on 601 processors · 4a5cbf17
      Benjamin Herrenschmidt 提交于
      The 32-bit kernel relies on some memory being mapped covering
      the kernel text,data and bss at least, early during boot before
      the full MMU setup is done. On 32-bit "classic" processors, this
      is done using BAT registers.
      
      On 601, the size of BATs is limited to 8M and we use 2 of them
      for that initial mapping. This can become quite tight when enabling
      features like lockdep, so let's use a 3rd one to bump that mapping
      from 16M to 24M. We keep the 4th BAT free as it can be useful for
      debugging early boot code to map things like serial ports.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      4a5cbf17
    • B
      powerpc/mm: Make k(un)map_atomic out of line · 850f6ac3
      Benjamin Herrenschmidt 提交于
      Those functions are way too big to be inline, besides, kmap_atomic()
      wants to call debug_kmap_atomic() which isn't exported for modules
      and causes module link failures.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      850f6ac3
    • K
      powerpc: Fix mpic alloc warning · 85355bb2
      Kumar Gala 提交于
      Since we can use kmalloc earlier we are getting the following since the
      mpic_alloc() code calls alloc_bootmem().  Move to using kzalloc() to
      remove the warning.
      
      ------------[ cut here ]------------
      Badness at c0583248 [verbose debug info unavailable]
      NIP: c0583248 LR: c0583210 CTR: 00000004
      REGS: c0741de0 TRAP: 0700   Not tainted  (2.6.30-06736-g12a31df)
      MSR: 00021000 <ME,CE>  CR: 22024024  XER: 00000000
      TASK = c070d3b8[0] 'swapper' THREAD: c0740000 CPU: 0
      <6>GPR00: 00000001 c0741e90 c070d3b8 00000001 00000210 00000020 3fffffff 00000000
      <6>GPR08: 00000000 c0c85700 c04f8c40 0000002d 22044022 1004a388 7ffd9400 00000000
      <6>GPR16: 00000000 7ffcd100 7ffcd100 7ffcd100 c04f8c40 00000000 c059f62c c075a0c0
      <6>GPR24: c059f648 00000000 0000000f 00000210 00000020 00000000 3fffffff 00000210
      NIP [c0583248] alloc_arch_preferred_bootmem+0x50/0x80
      LR [c0583210] alloc_arch_preferred_bootmem+0x18/0x80
      Call Trace:
      [c0741e90] [c07343b0] devtree_lock+0x0/0x24 (unreliable)
      [c0741ea0] [c0583b14] ___alloc_bootmem_nopanic+0x54/0x108
      [c0741ee0] [c0583e18] ___alloc_bootmem+0x18/0x50
      [c0741ef0] [c057b9cc] mpic_alloc+0x48/0x710
      [c0741f40] [c057ecf4] mpc85xx_ds_pic_init+0x190/0x1b8
      [c0741f90] [c057633c] init_IRQ+0x24/0x34
      [c0741fa0] [c05738b8] start_kernel+0x260/0x3dc
      [c0741ff0] [c00003c8] skpinv+0x2e0/0x31c
      Instruction dump:
      409e001c 7c030378 80010014 83e1000c 38210010 7c0803a6 4e800020 3d20c0c8
      39295700 80090004 7c000034 5400d97e <0f000000> 2f800000 409e001c 38800000
      
      BenH: Changed to use GFP_KERNEL, the allocator will do the right thing
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      85355bb2
    • K
      powerpc: Fix output from show_regs · a2367194
      Kumar Gala 提交于
      For some reason we've had an explicit KERN_INFO for GPR dumps.  With
      recent changes we get output like:
      
      <6>GPR00: 00000000 ef855eb0 ef858000 00000001 000000d0 f1000000 ffbc8000 ffffffff
      
      The KERN_INFO is causing the <6>.  Don't see any reason to keep it
      around.
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      a2367194
    • B
      powerpc/pmac: Fix issues with PowerMac "PowerSurge" SMP · 7ccbe504
      Benjamin Herrenschmidt 提交于
      The old PowerSurge SMP (ie, dual or quad 604 machines) code has
      numerous issues in modern world.
      
      One is cpu_possible_map is set too late (the device-tree is bogus)
      so we fail to allocate the interrupt stacks and crash. Another
      problem is the fact the timebase is frozen by the bringup of the
      second CPU so the delays in the generic code will hang, we need
      to move some of the calling procedure to inside the powermac code.
      
      This makes it boot again for me
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      7ccbe504
    • G
      powerpc/amigaone: Limit ISA I/O range to 4k in the device tree · 6bb2ae53
      Gerhard Pircher 提交于
      The kernel reserves the I/O address space from 0x0 to 0xfff for legacy
      ISA devices. Change the ranges property for the PCI2ISA bridge to match
      the kernels behavior, even if the ranges property isn't used for now.
      Signed-off-by: NGerhard Pircher <gerhard_pircher@gmx.net>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      6bb2ae53
    • S
      powerpc/warp: Platform fix for i2c change · 3984114f
      Sean MacLennan 提交于
      A change to the i2c subsystem breaks the warp platform code. The patch
      is cleaner anyway, the old way was a bit crufty.
      
      For those with keen eyes, the gratuitous change in the string from
      PIKA to Warp is just so the logs look a bit nicer. The following two
      lines tend to be printed one after another.
      
        Warp POST OK
        Warp DTM thread running.
      
      Yeah, this will be the third patch to warp.c submitted in this
      release....
      
      Cheers,
         Sean
      
      The i2c_client struct changed, breaking the code that looked for the ad7414
      chip. Use the new of_find_i2c_device_by_node function added in 2.6.29.
      Signed-off-by: NSean MacLennan <smaclennan@pikatech.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      3984114f
    • J
      powerpc: Have git ignore generated files from dtc compile · b810c6ec
      Jon Smirl 提交于
      Have git ignore generated files from dtc compile
      Signed-off-by: NJon Smirl <jonsmirl@gmail.com>
      Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Acked-by: NSean MacLennan <smaclennan@pikatech.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      b810c6ec
    • B
      powerpc/mpic: Fix mapping of "DCR" based MPIC variants · 5a2642f6
      Benjamin Herrenschmidt 提交于
      Commit 31207dab
      "Fix incorrect allocation of interrupt rev-map"
      introduced a regression crashing on boot on machines using
      a "DCR" based MPIC, such as the Cell blades.
      
      The reason is that the irq host data structure is initialized
      much later as a result of that patch, causing our calls to
      mpic_map() do be done before we have a host setup.
      
      Unfortunately, this breaks _mpic_map_dcr() which uses the
      mpic->irqhost to get to the device node.
      
      This fixes it by, instead, passing the device node explicitely
      to mpic_map().
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Acked-by: NAkira Tsukamoto <akirat@rd.scei.sony.co.jp>
      5a2642f6
    • M
      powerpc: Swiotlb breaks pseries · 6f0b1c60
      Michael Ellerman 提交于
      Turning on SWIOTLB selects or enables PPC_NEED_DMA_SYNC_OPS, which means
      we get the non empty versions of dma_sync_* in asm/dma-mapping.h
      
      On my pseries machine the dma_ops have no such routines and we die with
      a null pointer - this patch gets it booting, is there a more elegant way
      to do it?
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      6f0b1c60
  2. 22 6月, 2009 1 次提交
  3. 20 6月, 2009 1 次提交
  4. 19 6月, 2009 2 次提交
    • S
      function-graph: add stack frame test · 71e308a2
      Steven Rostedt 提交于
      In case gcc does something funny with the stack frames, or the return
      from function code, we would like to detect that.
      
      An arch may implement passing of a variable that is unique to the
      function and can be saved on entering a function and can be tested
      when exiting the function. Usually the frame pointer can be used for
      this purpose.
      
      This patch also implements this for x86. Where it passes in the stack
      frame of the parent function, and will test that frame on exit.
      
      There was a case in x86_32 with optimize for size (-Os) where, for a
      few functions, gcc would align the stack frame and place a copy of the
      return address into it. The function graph tracer modified the copy and
      not the actual return address. On return from the funtion, it did not go
      to the tracer hook, but returned to the parent. This broke the function
      graph tracer, because the return of the parent (where gcc did not do
      this funky manipulation) returned to the location that the child function
      was suppose to. This caused strange kernel crashes.
      
      This test detected the problem and pointed out where the issue was.
      
      This modifies the parameters of one of the functions that the arch
      specific code calls, so it includes changes to arch code to accommodate
      the new prototype.
      
      Note, I notice that the parsic arch implements its own push_return_trace.
      This is now a generic function and the ftrace_push_return_trace should be
      used instead. This patch does not touch that code.
      
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      Cc: Helge Deller <deller@gmx.de>
      Cc: Kyle McMartin <kyle@mcmartin.ca>
      Signed-off-by: NSteven Rostedt <rostedt@goodmis.org>
      71e308a2
    • H
      edac: cpc925 MC platform device setup · 8f101a05
      Harry Ciao 提交于
      Fix up the number of cells for the values of CPC925 Memory Controller,
      and setup related platform device during system booting up, against
      which CPC925 Memory Controller EDAC driver would be matched.
      Signed-off-by: NHarry Ciao <qingtao.cao@windriver.com>
      Cc: Doug Thompson <norsk5@yahoo.com>
      Cc: Michael Ellerman <michael@ellerman.id.au>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Kumar Gala <galak@gate.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      8f101a05
  5. 18 6月, 2009 8 次提交
    • P
      perf_counter: powerpc: Add processor back-end for MPC7450 family · 7325927e
      Paul Mackerras 提交于
      This adds support for the performance monitor hardware on the
      MPC7450 family of processors (7450, 7451, 7455, 7447/7457, 7447A,
      7448), used in the later Apple G4 powermacs/powerbooks and other
      machines.  These machines have 6 hardware counters with a unique
      set of events which can be counted on each counter, with some
      events being available on multiple counters.
      
      Raw event codes for these processors are (PMC << 8) + PMCSEL.
      If PMC is non-zero then the event is that selected by the given
      PMCSEL value for that PMC (hardware counter).  If PMC is zero
      then the event selected is one of the low-numbered ones that are
      common to several PMCs.  In this case PMCSEL must be <= 22 and
      the event is what that PMCSEL value would select on PMC1 (but
      it may be placed any other PMC that has the same event for that
      PMCSEL value).
      
      For events that count cycles or occurrences that exceed a threshold,
      the threshold requested can be specified in the 0x3f000 bits of the
      raw event codes.  If the event uses the threshold multiplier bit
      and that bit should be set, that is indicated with the 0x40000 bit
      of the raw event code.
      
      This fills in some of the generic cache events.  Unfortunately there
      are quite a few blank spaces in the table, partly because these
      processors tend to count cache hits rather than cache accesses.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: linuxppc-dev@ozlabs.org
      Cc: benh@kernel.crashing.org
      LKML-Reference: <19000.55631.802122.696927@cargo.ozlabs.ibm.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      7325927e
    • P
      perf_counter: powerpc: Make powerpc perf_counter code safe for 32-bit kernels · 98fb1807
      Paul Mackerras 提交于
      This abstracts a few things in arch/powerpc/kernel/perf_counter.c
      that are specific to 64-bit kernels, and provides definitions for
      32-bit kernels.  In particular,
      
      * Only 64-bit has MMCRA and the bits in it that give information
        about a PMU interrupt (sampled PR, HV, slot number etc.)
      * Only 64-bit has the lppaca and the lppaca->pmcregs_in_use field
      * Use of SDAR is confined to 64-bit for now
      * Only 64-bit has soft/lazy interrupt disable and therefore
        pseudo-NMIs (interrupts that occur while interrupts are soft-disabled)
      * Only 64-bit has PMC7 and PMC8
      * Only 64-bit has the MSR_HV bit.
      
      This also fixes the types used in a couple of places, where we were
      using long types for things that need to be 64-bit.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: linuxppc-dev@ozlabs.org
      Cc: benh@kernel.crashing.org
      LKML-Reference: <19000.55590.634126.876084@cargo.ozlabs.ibm.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      98fb1807
    • P
      perf_counter: powerpc: Change how processor-specific back-ends get selected · 079b3c56
      Paul Mackerras 提交于
      At present, the powerpc generic (processor-independent) perf_counter
      code has list of processor back-end modules, and at initialization,
      it looks at the PVR (processor version register) and has a switch
      statement to select a suitable processor-specific back-end.
      
      This is going to become inconvenient as we add more processor-specific
      back-ends, so this inverts the order: now each back-end checks whether
      it applies to the current processor, and registers itself if so.
      Furthermore, instead of looking at the PVR, back-ends now check the
      cur_cpu_spec->oprofile_cpu_type string and match on that.
      
      Lastly, each back-end now specifies a name for itself so the core can
      print a nice message when a back-end registers itself.
      
      This doesn't provide any support for unregistering back-ends, but that
      wouldn't be hard to do and would allow back-ends to be modules.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: linuxppc-dev@ozlabs.org
      Cc: benh@kernel.crashing.org
      LKML-Reference: <19000.55529.762227.518531@cargo.ozlabs.ibm.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      079b3c56
    • P
      perf_counter: powerpc: Use unsigned long for register and constraint values · 448d64f8
      Paul Mackerras 提交于
      This changes the powerpc perf_counter back-end to use unsigned long
      types for hardware register values and for the value/mask pairs used
      in checking whether a given set of events fit within the hardware
      constraints.  This is in preparation for adding support for the PMU
      on some 32-bit powerpc processors.  On 32-bit processors the hardware
      registers are only 32 bits wide, and the PMU structure is generally
      simpler, so 32 bits should be ample for expressing the hardware
      constraints.  On 64-bit processors, unsigned long is 64 bits wide,
      so using unsigned long vs. u64 (unsigned long long) makes no actual
      difference.
      
      This makes some other very minor changes: adjusting whitespace to line
      things up in initialized structures, and simplifying some code in
      hw_perf_disable().
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: linuxppc-dev@ozlabs.org
      Cc: benh@kernel.crashing.org
      LKML-Reference: <19000.55473.26174.331511@cargo.ozlabs.ibm.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      448d64f8
    • P
      perf_counter: powerpc: Enable use of software counters on 32-bit powerpc · 105988c0
      Paul Mackerras 提交于
      This enables the perf_counter subsystem on 32-bit powerpc.  Since we
      don't have any support for hardware counters on 32-bit powerpc yet,
      only software counters can be used.
      
      Besides selecting HAVE_PERF_COUNTERS for 32-bit powerpc as well as
      64-bit, the main thing this does is add an implementation of
      set_perf_counter_pending().  This needs to arrange for
      perf_counter_do_pending() to be called when interrupts are enabled.
      Rather than add code to local_irq_restore as 64-bit does, the 32-bit
      set_perf_counter_pending() generates an interrupt by setting the
      decrementer to 1 so that a decrementer interrupt will become pending
      in 1 or 2 timebase ticks (if a decrementer interrupt isn't already
      pending).  When interrupts are enabled, timer_interrupt() will be
      called, and some new code in there calls perf_counter_do_pending().
      We use a per-cpu array of flags to indicate whether we need to call
      perf_counter_do_pending() or not.
      
      This introduces a couple of new Kconfig symbols: PPC_HAVE_PMU_SUPPORT,
      which is selected by processor families for which we have hardware PMU
      support (currently only PPC64), and PPC_PERF_CTRS, which enables the
      powerpc-specific perf_counter back-end.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: linuxppc-dev@ozlabs.org
      Cc: benh@kernel.crashing.org
      LKML-Reference: <19000.55404.103840.393470@cargo.ozlabs.ibm.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      105988c0
    • H
      net/ucc_geth: Add SGMII support for UCC GETH driver · fb1001f3
      Haiying Wang 提交于
      -- derived from reverted commit 047584ce
      -- reworked by Grant Likely to play nice with commit:
         "net: Rework ucc_geth driver to use of_mdio infrastructure"
         (0b9da337)
      Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      fb1001f3
    • G
      Revert "net/ucc_geth: Add SGMII support for UEC GETH driver" · f3a32500
      Grant Likely 提交于
      This reverts commit 047584ce.
      
      This patch meshes badly with "net: Rework ucc_geth driver to use
      of_mdio infrastructure" (0b9da337).
      Since most of the patch needs to be reworked, it is clearer to revert
      the patch and then apply the corrected version
      Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      f3a32500
    • M
      Delete pcibios_select_root · a6c14096
      Matthew Wilcox 提交于
      This function was only used by pci_claim_resource(), and the last commit
      deleted that use.
      Signed-off-by: NMatthew Wilcox <willy@linux.intel.com>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      a6c14096
  6. 17 6月, 2009 8 次提交
  7. 16 6月, 2009 8 次提交