1. 04 12月, 2006 1 次提交
    • B
      [POWERPC] Make pci_read_irq_line the default · f90bb153
      Benjamin Herrenschmidt 提交于
      This patch reworks the way IRQs are fixed up on PCI for arch powerpc.
      
      It makes pci_read_irq_line() called by default in the PCI code for
      devices that are probed, and add an optional per-device fixup in
      ppc_md for platforms that really need to correct what they obtain
      from pci_read_irq_line().
      
      It also removes ppc_md.irq_bus_setup which was only used by pSeries
      and should not be needed anymore.
      
      I've also removed the pSeries s7a workaround as it can't work with
      the current interrupt code anyway. I'm trying to get one of these
      machines working so I can test a proper fix for that problem.
      
      I also haven't updated the old-style fixup code from 85xx_cds.c
      because it's actually buggy :) It assigns pci_dev->irq hard coded
      numbers which is no good with the new IRQ mapping code. It should
      at least use irq_create_mapping(NULL, hard_coded_number); and possibly
      also set_irq_type() to set them as level low.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      f90bb153
  2. 25 8月, 2006 1 次提交
  3. 03 7月, 2006 3 次提交
    • B
      [POWERPC] Add new interrupt mapping core and change platforms to use it · 0ebfff14
      Benjamin Herrenschmidt 提交于
      This adds the new irq remapper core and removes the old one.  Because
      there are some fundamental conflicts with the old code, like the value
      of NO_IRQ which I'm now setting to 0 (as per discussions with Linus),
      etc..., this commit also changes the relevant platform and driver code
      over to use the new remapper (so as not to cause difficulties later
      in bisecting).
      
      This patch removes the old pre-parsing of the open firmware interrupt
      tree along with all the bogus assumptions it made to try to renumber
      interrupts according to the platform. This is all to be handled by the
      new code now.
      
      For the pSeries XICS interrupt controller, a single remapper host is
      created for the whole machine regardless of how many interrupt
      presentation and source controllers are found, and it's set to match
      any device node that isn't a 8259.  That works fine on pSeries and
      avoids having to deal with some of the complexities of split source
      controllers vs. presentation controllers in the pSeries device trees.
      
      The powerpc i8259 PIC driver now always requests the legacy interrupt
      range. It also has the feature of being able to match any device node
      (including NULL) if passed no device node as an input. That will help
      porting over platforms with broken device-trees like Pegasos who don't
      have a proper interrupt tree.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      0ebfff14
    • B
      [POWERPC] Use the genirq framework · b9e5b4e6
      Benjamin Herrenschmidt 提交于
      This adapts the generic powerpc interrupt handling code, and all of
      the platforms except for the embedded 6xx machines, to use the new
      genirq framework.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      b9e5b4e6
    • D
      [POWERPC] fix implicit declaration on cell. · 609c9991
      Dave Jones 提交于
      (Only fails with -Werror-implicit-function-declaration, but
       it should still be fixed).
      
      arch/powerpc/platforms/cell/setup.c:145: error: implicit declaration of function 'udbg_init_rtas_console'
      Signed-off-by: NDave Jones <davej@redhat.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      609c9991
  4. 01 7月, 2006 1 次提交
  5. 28 6月, 2006 2 次提交
  6. 21 6月, 2006 2 次提交
  7. 09 6月, 2006 1 次提交
  8. 02 5月, 2006 1 次提交
  9. 28 3月, 2006 1 次提交
  10. 22 3月, 2006 1 次提交
  11. 12 1月, 2006 1 次提交
  12. 09 1月, 2006 6 次提交
    • A
      [PATCH] cell: enable pause(0) in cpu_idle · c902be71
      Arnd Bergmann 提交于
      This patch enables support for pause(0) power management state
      for the Cell Broadband Processor, which is import for power efficient
      operation. The pervasive infrastructure will in the future enable
      us to introduce more functionality specific to the Cell's
      pervasive unit.
      
      From: Maximino Aguilar <maguilar@us.ibm.com>
      Signed-off-by: NArnd Bergmann <arndb@de.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      c902be71
    • D
      [PATCH] powerpc/cell: disable legacy i/o area · d52771fc
      David Woodhouse 提交于
      We currently crash in the fedora installer because the keyboard
      driver tries to access I/O space that is not there on our hardware.
      
      This uses the same solution as powermac by just marking all
      legacy i/o as invalid.
      Signed-off-by: NArnd Bergmann <arndb@de.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      d52771fc
    • A
      [PATCH] spufs: fix local store page refcounting · d88cfffa
      Arnd Bergmann 提交于
      With the new rules for reserved pages, the spufs now
      needs working page reference counting.
      
      I should probably look into converting to vm_insert_page,
      but for now this patch makes spufs work again.
      Signed-off-by: NArnd Bergmann <arndb@de.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      d88cfffa
    • M
      [PATCH] powerpc: Add arch dependent basic infrastructure for Kdump. · cc532915
      Michael Ellerman 提交于
      Implementing the machine_crash_shutdown which will be called by
      crash_kexec (called in case of a panic, sysrq etc.). Disable the
      interrupts, shootdown cpus using debugger IPI and collect regs
      for all CPUs.
      
      elfcorehdr= specifies the location of elf core header stored by
      the crashed kernel. This command line option will be passed by
      the kexec-tools to capture kernel.
      
      savemaxmem= specifies the actual memory size that the first kernel
      has and this value will be used for dumping in the capture kernel.
      This command line option will be passed by the kexec-tools to
      capture kernel.
      Signed-off-by: NHaren Myneni <haren@us.ibm.com>
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      cc532915
    • A
      [PATCH] spufs: cooperative scheduler support · 8b3d6663
      Arnd Bergmann 提交于
      This adds a scheduler for SPUs to make it possible to use
      more logical SPUs than physical ones are present in the
      system.
      
      Currently, there is no support for preempting a running
      SPU thread, they have to leave the SPU by either triggering
      an event on the SPU that causes it to return to the
      owning thread or by sending a signal to it.
      
      This patch also adds operations that enable accessing an SPU
      in either runnable or saved state. We use an RW semaphore
      to protect the state of the SPU from changing underneath
      us, while we are holding it readable. In order to change
      the state, it is acquired writeable and a context save
      or restore is executed before downgrading the semaphore
      to read-only.
      
      From: Mark Nutter <mnutter@us.ibm.com>,
            Uli Weigand <Ulrich.Weigand@de.ibm.com>
      Signed-off-by: NArnd Bergmann <arndb@de.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      8b3d6663
    • M
      [PATCH] powerpc: Merge kexec · 3d1229d6
      Michael Ellerman 提交于
      This patch merges, to some extent, the PPC32 and PPC64 kexec implementations.
      
      We adopt the PPC32 approach of having ppc_md callbacks for the kexec functions.
      The current PPC64 implementation becomes the "default" implementation for PPC64
      which platforms can select if they need no special treatment.
      
      I've added these default callbacks to pseries/maple/cell/powermac, this means
      iSeries no longer supports kexec - but it never worked anyway.
      
      I've renamed PPC32's machine_kexec_simple to default_machine_kexec, inline with
      PPC64. Judging by the comments it might be better named machine_kexec_non_of,
      or something, but at the moment it's the only implementation for PPC32 so it's
      the "default".
      
      Kexec requires machine_shutdown(), which is in machine_kexec.c on PPC32, but we
      already have in setup-common.c on powerpc. All this does is call
      ppc_md.nvram_sync, which only powermac implements, so instead make
      machine_shutdown a ppc_md member and have it call core99_nvram_sync directly
      on powermac.
      
      I've also stuck relocate_kernel.S into misc_32.S for powerpc.
      
      Built for ARCH=ppc, and 32 & 64 bit ARCH=powerpc, with KEXEC=y/n. Booted on
      P5 LPAR and successfully kexec'ed.
      
      Should apply on top of 493f25ef.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      3d1229d6
  13. 01 11月, 2005 2 次提交
  14. 20 10月, 2005 1 次提交
  15. 10 10月, 2005 1 次提交
  16. 28 9月, 2005 1 次提交
  17. 23 6月, 2005 3 次提交
    • A
      [PATCH] ppc64: Add driver for BPA iommu · ae209cf1
      Arnd Bergmann 提交于
      Implementation of software load support for the BE iommu. This is very
      different from other iommu code on ppc64, since we only do a static mapping.
      The mapping is currently hardcoded but should really be read from the
      firmware, but they don't set up the device nodes yet. There is a single
      512MB DMA window for PCI, USB and ethernet at 0x20000000 for our RAM.
      
      The Cell processor can put the I/O page table either in memory like
      the hashed page table (hardware load) or have the operating system
      write the entries into memory mapped CPU registers (software load).
      
      I use the software load mechanism because I know that all I/O page
      table entries for the amount of installed physical memory fit into
      the IO TLB cache. At the point when we get machines with more than
      4GB of installed memory, we can either use hardware I/O page table
      access like the other platforms do or dynamically update the I/O
      TLB entries when a page fault occurs in the I/O subsystem.
      
      The software load can then use the macros that I have implemented
      for the static mapping in order to do the TLB cache updates.
      Signed-off-by: NArnd Bergmann <arndb@de.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      ae209cf1
    • A
      [PATCH] ppc64: Add driver for BPA interrupt controllers · cebf589c
      Arnd Bergmann 提交于
      Add support for the integrated interrupt controller on BPA
      CPUs. There is one of those for each SMT thread.
      
      The mapping of interrupt numbers to HW interrupt sources
      is described in arch/ppc64/kernel/bpa_iic.h.
      
      This version hardcodes the 'Spider' chip as the secondary
      interrupt controller. That is not really generic for the
      architecture, but at the moment it is the only secondary
      PIC that exists.
      
      A little more work will be needed on this as soon as
      we have boards with multiple external interrupt controllers.
      Signed-off-by: NArnd Bergmann <arndb@de.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      cebf589c
    • A
      [PATCH] ppc64: add BPA platform type · fef1c772
      Arnd Bergmann 提交于
      This adds the basic support for running on BPA machines.
      So far, this is only the IBM workstation, and it will
      not run on others without a little more generalization.
      
      It should be possible to configure a kernel for any
      combination of CONFIG_PPC_BPA with any of the other
      multiplatform targets.
      Signed-off-by: NArnd Bergmann <arndb@de.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      fef1c772