1. 28 12月, 2017 4 次提交
  2. 27 12月, 2017 1 次提交
    • F
      net: fec: unmap the xmit buffer that are not transferred by DMA · 178e5f57
      Fugang Duan 提交于
      The enet IP only support 32 bit, it will use swiotlb buffer to do dma
      mapping when xmit buffer DMA memory address is bigger than 4G in i.MX
      platform. After stress suspend/resume test, it will print out:
      
      log:
      [12826.352864] fec 5b040000.ethernet: swiotlb buffer is full (sz: 191 bytes)
      [12826.359676] DMA: Out of SW-IOMMU space for 191 bytes at device 5b040000.ethernet
      [12826.367110] fec 5b040000.ethernet eth0: Tx DMA memory map failed
      
      The issue is that the ready xmit buffers that are dma mapped but DMA still
      don't copy them into fifo, once MAC restart, these DMA buffers are not unmapped.
      So it should check the dma mapping buffer and unmap them.
      Signed-off-by: NFugang Duan <fugang.duan@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      178e5f57
  3. 21 12月, 2017 5 次提交
  4. 20 12月, 2017 20 次提交
  5. 19 12月, 2017 2 次提交
    • B
      tg3: Fix rx hang on MTU change with 5717/5719 · 748a240c
      Brian King 提交于
      This fixes a hang issue seen when changing the MTU size from 1500 MTU
      to 9000 MTU on both 5717 and 5719 chips. In discussion with Broadcom,
      they've indicated that these chipsets have the same phy as the 57766
      chipset, so the same workarounds apply. This has been tested by IBM
      on both Power 8 and Power 9 systems as well as by Broadcom on x86
      hardware and has been confirmed to resolve the hang issue.
      Signed-off-by: NBrian King <brking@linux.vnet.ibm.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      748a240c
    • H
      net: qcom/emac: Change the order of mac up and sgmii open · ac3241d5
      Hemanth Puranik 提交于
      This patch fixes the order of mac_up and sgmii_open for the
      reasons noted below:
      
      - If open takes more time(if the SGMII block is not responding or
        if we want to do some delay based task) in this situation we
        will hit NETDEV watchdog
      - The main reason : We should signal to upper layers that we are
        ready to receive packets "only" when the entire path is initialized
        not the other way around, this is followed in the reset path where
        we do mac_down, sgmii_reset and mac_up. This also makes the driver
        uniform across the reset and open paths.
      - In the future there may be need for delay based tasks to be done in
        sgmii open which will result in NETDEV watchdog
      - As per the documentation the order of init should be sgmii, mac, rings
        and DMA
      Signed-off-by: NHemanth Puranik <hpuranik@codeaurora.org>
      Acked-by: NTimur Tabi <timur@codeaurora.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ac3241d5
  6. 16 12月, 2017 8 次提交