1. 21 6月, 2015 2 次提交
    • T
      clk: samsung: exynos4: add cpu clock configuration data and instantiate cpu clock · 6ae5a0b4
      Thomas Abraham 提交于
      With the addition of the new Samsung specific cpu-clock type, the
      arm clock can be represented as a cpu-clock type. Add the CPU clock
      configuration data and instantiate the CPU clock type for Exynos4210.
      
      Changes by Bartlomiej:
      - fixed issue with wrong dividers being setup by Common Clock Framework
        (by an addition of CLK_RECALC_NEW_RATES clock flag to mout_apll clock,
        without this change cpufreq-dt driver showed ~10 mA larger energy
        consumption when compared to cpufreq-exynos one when "performance"
        cpufreq governor was used on Exynos4210 SoC based Origen board), this
        was probably meant to be workarounded by use of CLK_GET_RATE_NOCACHE
        and CLK_DIVIDER_READ_ONLY clock flags in the original patchset (in
        "[PATCH v12 6/6] clk: samsung: remove unused clock aliases and update
        clock flags") but using these flags is not sufficient to fix the issue
        observed
      - removed Exynos5250 and Exynos5420 support for now
      
      Cc: Tomasz Figa <tomasz.figa@gmail.com>
      Cc: Mike Turquette <mturquette@linaro.org>
      Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
      Signed-off-by: NThomas Abraham <thomas.ab@samsung.com>
      Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
      Signed-off-by: NMichael Turquette <mturquette@baylibre.com>
      6ae5a0b4
    • T
      clk: samsung: add infrastructure to register cpu clocks · ddeac8d9
      Thomas Abraham 提交于
      The CPU clock provider supplies the clock to the CPU clock domain. The
      composition and organization of the CPU clock provider could vary among
      Exynos SoCs. A CPU clock provider can be composed of clock mux, dividers
      and gates. This patch defines a new clock type for CPU clock provider and
      adds infrastructure to register the CPU clock providers for Samsung
      platforms.
      
      Changes by Bartlomiej:
      - fixed issue with setting lower dividers before the parent clock speed
        was lowered (the issue resulted in lockup on Exynos4210 SoC based
        Origen board when "ondemand" cpufreq governor was stress tested)
      - fixed missing spin_unlock on error in exynos_cpuclk_post_rate_change()
        problem by moving cfg_data search outside of the spin locked area
      - removed leftover kfree() in exynos_register_cpu_clock() that could
        result in dereferencing the NULL pointer on error
      - moved spin_lock earlier in exynos_cpuclk_pre_rate_change() to cover
        reading of E4210_SRC_CPU and E4210_DIV_CPU1 registers
      - added missing "last chance" checks to wait_until_divider_stable() and
        wait_until_mux_stable() (needed in case that IRQ handling took long
        time to proceed and resulted in function printing incorrect error
        message about timeout)
      - moved E4210_CPU_DIV[0,1]() macros just before their only users,
        this resulted in moving them from patch #2 to patch #3/6 ("clk:
        samsung: exynos4: add cpu clock configuration data and instantiate
        cpu clock")
      - removed E5250_CPU_DIV[0,1](), E5420_EGL_DIV0() and E5420_KFC_DIV()
        macros for now
      - added my Copyrights to drivers/clk/samsung/clk-cpu.c
      
      Cc: Tomasz Figa <tomasz.figa@gmail.com>
      Cc: Mike Turquette <mturquette@linaro.org>
      Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
      Signed-off-by: NThomas Abraham <thomas.ab@samsung.com>
      Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
      Signed-off-by: NMichael Turquette <mturquette@baylibre.com>
      ddeac8d9
  2. 10 6月, 2015 4 次提交
  3. 05 6月, 2015 1 次提交
  4. 22 5月, 2015 1 次提交
  5. 15 5月, 2015 1 次提交
    • S
      clk: samsung: Silence sparse warnings · f6704f9e
      Stephen Boyd 提交于
      drivers/clk/samsung/clk-exynos5260.c:138:40: warning: Using plain integer as NULL pointer
      drivers/clk/samsung/clk-exynos5260.c:328:40: warning: Using plain integer as NULL pointer
      drivers/clk/samsung/clk-exynos5260.c:392:40: warning: Using plain integer as NULL pointer
      drivers/clk/samsung/clk-exynos5260.c:494:40: warning: Using plain integer as NULL pointer
      drivers/clk/samsung/clk-exynos5260.c:583:40: warning: Using plain integer as NULL pointer
      drivers/clk/samsung/clk-exynos5260.c:644:40: warning: Using plain integer as NULL pointer
      drivers/clk/samsung/clk-exynos5260.c:779:40: warning: Using plain integer as NULL pointer
      drivers/clk/samsung/clk-exynos5260.c:898:40: warning: Using plain integer as NULL pointer
      drivers/clk/samsung/clk-exynos5260.c:962:40: warning: Using plain integer as NULL pointer
      drivers/clk/samsung/clk-exynos5260.c:1018:40: warning: Using plain integer as NULL pointer
      drivers/clk/samsung/clk-exynos5260.c:1165:40: warning: Using plain integer as NULL pointer
      drivers/clk/samsung/clk-exynos5260.c:1373:40: warning: Using plain integer as NULL pointer
      drivers/clk/samsung/clk-exynos5260.c:1829:40: warning: Using plain integer as NULL pointer
      Acked-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
      Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
      f6704f9e
  6. 06 5月, 2015 3 次提交
  7. 05 5月, 2015 1 次提交
  8. 29 4月, 2015 5 次提交
  9. 13 4月, 2015 2 次提交
  10. 31 3月, 2015 2 次提交
  11. 06 2月, 2015 9 次提交
  12. 05 2月, 2015 9 次提交