- 16 9月, 2016 3 次提交
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由 Rob Clark 提交于
Prep work for next patch. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
We'll want to be able to pass in flags, such as asking for explicit fencing, and possibly other things down the road. Fortunately we don't need a full 32b for the pipe-id. So use the upper 16 bits for flags (which could be extended or reduced later if needed, so start adding flags from the high bits). Since anything with the upper bits set would not be a valid pipe-id, an old userspace would not set any of the upper bits, and an old kernel would reject it as an invalid pipe-id. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 16 7月, 2016 3 次提交
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由 Rob Clark 提交于
For some optimizations coming on the userspace side, splitting larger draw or gmem cmds into multiple cmdstream buffers, we need to support much more than the previous small/arbitrary limit. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Before we can add vmap shrinking, we really need to know which vmap'ings are currently being used. So switch to get/put interface. Stubbed put fxns for now. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Be kinder to things that do lots of signal handling (ie. Xorg) Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 05 6月, 2016 2 次提交
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由 Rob Clark 提交于
Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
If submit fails, before fence is created or before submit is added to submit-list, then unitialized fields cause problems in the clean-up path. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 08 5月, 2016 5 次提交
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由 Rob Clark 提交于
Track the pid per submit, so we can print the name of the task which submitted the batch that caused the gpu to hang. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Split up locking and pinning buffers in the submit path. This is needed because we'll want to insert fencing in between the two steps. This makes things end up looking more similar to etnaviv submit code (which was originally modelled on the msm code but has already added 'struct fence' support). Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 30 4月, 2016 1 次提交
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由 Gustavo Padovan 提交于
This function had copies in 3 different files. Unify them in kernel.h. Cc: Joe Perches <joe@perches.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk> Acked-by: Daniel Vetter <daniel.vetter@intel.com> [drm/i915/] Acked-by: Rob Clark <robdclark@gmail.com> [drm/msm/] Acked-by: Lucas Stach <l.stach@pengutronix.de> [drm/etinav/] Acked-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 04 3月, 2016 2 次提交
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由 Rob Clark 提交于
No real need to hold the lock over allocation, and simplifies things slightly if we change the order. Signed-off-by: NRob Clark <robdclark@gmail.com>
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由 Rob Clark 提交于
Existing userspace wouldn't get this far, since getparam ioctl would have failed and it would have bailed out creating a screen/context. But all the same, we shouldn't let evil or confused userspace cause a null ptr deref. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 12 6月, 2015 1 次提交
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由 Rob Clark 提交于
Track the list of in-flight submits. If the gpu hangs, retire up to an including the offending submit, and then re-submit the remainder. This way, for concurrently running piglit tests (for example), one failing test doesn't cause unrelated tests to fail simply because it's submit was queued up after one that triggered a hang. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 02 6月, 2014 1 次提交
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由 Rob Clark 提交于
To ease debugging, add debugfs file which can be cat/tail'd to log submits, along with fence #. If GPU hangs, you can look at 'gpu' debugfs file to find last completed fence and current register state, and compare with logged rd file to narrow down the DRAW_INDX which triggered the GPU hang. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 31 3月, 2014 1 次提交
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由 Rob Clark 提交于
After reading a nice article on LWN[1], I went back and double checked my handling of invalid-input checking. Turns out there were a couple places I had missed. Since the driver is fairly young, and the devices it supports are really only just barely usable for basic stuff (serial console) with an upstream kernel, I think we should fix this now and revert specific parts of this patch later in the unlikely event that a regression is reported. [1] https://lwn.net/Articles/588444/Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 07 2月, 2014 1 次提交
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由 Rob Clark 提交于
Because we use a list_head in the bo to track it's position in a submit, we need to serialize at a higher layer. Otherwise there are problems when multiple contexts are SUBMIT'ing in parallel cmdstreams referencing a shared bo. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 11 9月, 2013 1 次提交
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由 Rob Clark 提交于
Need to check size+offset against bo size (duh!).. now we have a test case to make sure I've done it right: https://github.com/freedreno/msmtest/blob/master/submittest.c Also, use DRM_ERROR() for error case traces, which makes debugging userspace easier when enabling debug traces is too much. Signed-off-by: NRob Clark <robdclark@gmail.com>
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- 25 8月, 2013 1 次提交
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由 Rob Clark 提交于
Add initial support for a3xx 3d core. So far, with hardware that I've seen to date, we can have: + zero, one, or two z180 2d cores + a3xx or a2xx 3d core, which share a common CP (the firmware for the CP seems to implement some different PM4 packet types but the basics of cmdstream submission are the same) Which means that the eventual complete "class" hierarchy, once support for all past and present hw is in place, becomes: + msm_gpu + adreno_gpu + a3xx_gpu + a2xx_gpu + z180_gpu This commit splits out the parts that will eventually be common between a2xx/a3xx into adreno_gpu, and the parts that are even common to z180 into msm_gpu. Note that there is no cmdstream validation required. All memory access from the GPU is via IOMMU/MMU. So as long as you don't map silly things to the GPU, there isn't much damage that the GPU can do. Signed-off-by: NRob Clark <robdclark@gmail.com>
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