Add #cooling-cells for i.MX6/7 SoCs for cpufreq cooling device usage.
Signed-off-by: NAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: NBastian Stender <bst@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Adopt the SPDX license identifier headers to ease license compliance
management.
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

According to the "i.MX 6Solo/6DualLite Applications Processor
Reference Manual" Rev. 3, 09/2017 there is no LCDIF unit on the
i.MX6DL.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

They aren't needed by the etnaviv driver anymore and have been removed
from the binding.
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Remove unneeded label and unit address in order to fix the following
build warnings with W=1:

arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unit_address_vs_reg): Node /soc/aips-bus@2000000/iomuxc-gpr@20e0000/ipu1_csi0_mux@34 has a unit name, but no reg property
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unit_address_vs_reg): Node /soc/aips-bus@2000000/iomuxc-gpr@20e0000/ipu1_csi1_mux@34 has a unit name, but no
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Pass the reg properties for mipi nodes in order to fix the
following build warnings with W=1:

arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unit_address_vs_reg): Node /soc/aips-bus@2100000/mipi@21dc000/port@1/endpoint@0 has a unit name, but no reg property
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unit_address_vs_reg): Node /soc/aips-bus@2100000/mipi@21dc000/port@1/endpoint@1 has a unit name, but no reg property
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unit_address_vs_reg): Node /soc/aips-bus@2100000/mipi@21dc000/port@2/endpoint@0 has a unit name, but no reg property
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unit_address_vs_reg): Node /soc/aips-bus@2100000/mipi@21dc000/port@2/endpoint@1 has a unit name, but no reg property
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unit_address_vs_reg): Node /soc/aips-bus@2100000/mipi@21dc000/port@3/endpoint@0 has a unit name, but no reg property
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unit_address_vs_reg): Node /soc/aips-bus@2100000/mipi@21dc000/port@3/endpoint@1 has a unit name, but no reg property
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unit_address_vs_reg): Node /soc/aips-bus@2100000/mipi@21dc000/port@4/endpoint@0 has a unit name, but no reg property
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unit_address_vs_reg): Node /soc/aips-bus@2100000/mipi@21dc000/port@4/endpoint@1 has a unit name, but no reg property
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using
the following command:

perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*'

Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some
occurrences of uppercase hex.
Signed-off-by: NRob Herring <robh@kernel.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The following build warnings are seen with W=1:

Warning (simple_bus_reg): Node /soc/sram@00900000 simple-bus unit
address format error, expected "900000"
Warning (simple_bus_reg): Node /soc/aips-bus@02000000 simple-bus unit
address format error, expected "2000000"
Warning (simple_bus_reg): Node /soc/aips-bus@02000000/pxp@020f0000
simple-bus unit address format error, expected "20f0000"
(...)

Remove the leading zeroes from unit addresses to fix the warnings.
Signed-off-by: NMarco Franchi <marco.franchi@nxp.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Signed-off-by: NSteve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

This patch adds the device tree graph connecting the input multiplexers
to the IPU CSIs and the MIPI-CSI2 gasket on i.MX6. The MIPI_IPU
multiplexers are added as children of the iomuxc-gpr syscon device node.
On i.MX6Q/D two two-input multiplexers in front of IPU1 CSI0 and IPU2
CSI1 allow to select between CSI0/1 parallel input pads and the MIPI
CSI-2 virtual channels 0/3.
On i.MX6DL/S two five-input multiplexers in front of IPU1 CSI0 and IPU1
CSI1 allow to select between CSI0/1 parallel input pads and any of the
four MIPI CSI-2 virtual channels.

Changes from Steve Longerbeam:
- Removed some dangling/unused endpoints (ipu2_csi0_from_csi2ipu)
- Renamed the mipi virtual channel endpoint labels, from "mipi_csiX_..."
  to "mipi_vcX...".
- Added input endpoint anchors to the video muxes for the connections
  from parallel sensors.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NSteve Longerbeam <steve_longerbeam@mentor.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The IOMUXC General Purpose Register space contains various bitfields
that control video bus multiplexers. Describe them using a mmio-mux
node. The placement of the IPU CSI video mux controls differs between
i.MX6D/Q and i.MX6S/DL.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

GPIO4_11 is on pin 152(MX6DL_PAD_KEY_ROW2) and not on pin
151(MX6DL_PAD_KEY_ROW1).

I found the error while booting a mainline kernel on APF6S SoM and
noticed the following message:

[    2.609337] imx6dl-pinctrl 20e0000.iomuxc: pin MX6DL_PAD_KEY_ROW1
already requested by 20a8000.gpio:105; cannot claim for 20a8000.gpio:107
[    2.621884] imx6dl-pinctrl 20e0000.iomuxc: pin-151 (20a8000.gpio:107)
status -22
[    2.629303] spi_imx 2008000.ecspi: Can't get CS GPIO 107

With this patch, the message is gone and spi_imx driver probes correctly.

Fixes: bb728d66 ("ARM: dts: add gpio-ranges property to iMX GPIO controllers")
Signed-off-by: NSébastien Szymanski <sebastien.szymanski@armadeus.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

To establish a connection between GPIO controllers and pin multiplexor
controller add gpio-ranges properties to all GPIO controllers found
on iMX50, iMX6Q/D, iMX6DL/S, iMX6SL, iMX6SX, iMX6UL and iMX7D/S
SoCs. The change was done after human parsing of output from

% gawk -n '{ sub(/.*__/, ""); if ($1 ~ "^GPIO") print $1, $2/4}' imxXX-pinfunc.h | sort -n
Signed-off-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Table 8 from MX6DL datasheet (IMX6SDLCEC Rev. 5, 06/2015):
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SDLCEC.pdf

states the following:

"LDO Output Set Point (VDD_ARM_CAP) = 1.125 V minimum for operation
up to 396 MHz."

So fix the entry by adding the 25mV margin value as done in the other
entries of the table, which results in 1.15V for 396MHz operation.
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

This adds the device nodes for 2D, 3D and VG GPU cores.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

imx6qdl.dtsi uses compatibles "fsl,imx6q-gpt", "fsl,imx31-gpt".
imx6dl.dtsi uses compatibles "fsl,imx6dl-gpt", "fsl,imx6q-gpt" since
commit

	4e415ed8 (ARM: dts: imx6dl: add imx6dl gpt specific compatible string)

If imx6dl would be compatible with imx6q-gpt it would also have to be
compatible with imx31-gpt which is currently missing.

Based on the above mentioned patch I assume imx6q-gpt and imx6dl-gpt are
not compatible. So imx6q-gpt should be removed as compatible.
Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The i.MX6DL/S GPT has a different programming model from i.MX6Q one.
Add the compatible string "fsl,imx6dl-gpt" for it, and leave
"fsl,imx6q-gpt" there to keep the existing/old kernel happy.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Currently the cpufreq volt/freq table we used is
for LDO enable mode, according to latest datasheet
Rev. 3, 03/2014, the volt/freq table is as below:

LDO enabled(min value):
996MHz: VDDARM: 1.225V, VDDSOC: 1.150V;
792MHz: VDDARM: 1.150V, VDDSOC: 1.150V;
396MHz: VDDARM: 1.050V, VDDSOC: 1.150V;

LDO bypassed(min value):
996MHz: VDDARM: 1.250V, VDDSOC: 1.150V;
792MHz: VDDARM: 1.150V, VDDSOC: 1.150V;
396MHz: VDDARM: 1.050V, VDDSOC: 1.150V;

Adding 25mV to cover board IR drop, for LDO enabled
mode of 996MHz, VDDARM should be 1.250V, so this
patch updates it.
Signed-off-by: NAnson Huang <b20788@freescale.com>
Reviewed-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch adds links to the on-chip SRAM and reset controller nodes
and switches the interrupts. Make the BIT processor interrupt, which exists on
all variants, the first one. The JPEG unit interrupt, which does not exist on
i.MX27 and i.MX5 thus is an optional second interrupt.
Use different compatible strings for i.MX6Q/D and i.MX6S/DL, as they have to
load separate firmware images for some reason.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

On registration I2C bus drivers attemp to get ids from device tree
aliases, add a missing alias for I2C4 found on iMX6 DualLite/Solo.
Signed-off-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Switch to use DT macro for clock ID, so that device tree source is more
readable.
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

add missing i2c4 clock and correct the compatible string to match other
imx6 i2c blocks

Signed-off-by: Iain Paton<ipaton0@gmail.com>
Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

This patch connects IPU and display encoder (HDMI, LVDS, MIPI)
device tree nodes, as well as parallel displays on the DISP0
and DISP1 outputs, using the OF graph bindings described in
Documentation/devicetree/bindings/media/video-interfaces.txt

The IPU ports correspond to the two display interfaces. The
order of endpoints in the ports is arbitrary.

Each encoder with an associated input multiplexer has multiple
input ports in the device tree. The order and reg property of
the ports must correspond to the multiplexer input order.

Since the imx-drm node now only needs to contain links to the
display interfaces, it can be moved to the SoC dtsi level. At
the board level, only connections between the display interface
ports and encoders or panels have to be added.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Extracted from another patch by Fabio Estevam, this adds the DT
configuration for HDMI output on the IMX6 SoCs
Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds cpufreq dts for i.mx6dl to support cpufreq driver.
Signed-off-by: NAnson Huang <b20788@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Make the interrupts node slightly more readable.
Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The ocram on imx6q is 256 KiB while on imx6dl it's 128 KiB.  Let's
have separate node for imx6q and imx6dl.  It also changes imx6q size
0x3f000 to 0x40000 to match the hardware.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NLiu Ying <Ying.Liu@freescale.com>

The imx6q and imx6dl are two pin-to-pin compatible SoCs.  The same board
design can work with either chip plugged into the socket, e.g. sabresd
and sabreauto boards.

We currently define pin groups in imx6q.dtsi and imx6dl.dtsi
respectively because the pad macro names are different between two
chips.  This brings a maintenance burden on having the same label point
to the same pin group defined in two places.

The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs
pad macro names.  Then the pin groups becomes completely common between
imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the
long term maintenance of imx6q/dt pin settings becomes easier.

Unfortunately, the change brings some dramatic diff stat, but it's all
about DTS file, and the ultimate net diff stat is good.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

In the arm2 board, the UART2 works in the dte mode.
So add a pinctrl for both the imx6q{dl} boards.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Wandboard has a sgtl5000 codec.

Add audio support.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

i.MX6DL does not have the second IPU, but the LVDS multiplexers can connect
either LVDS channel of the LDB to IPU1 DI0 or IPU1 DI1.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
[shawn.guo: remove "crtcs" property from imx6qdl.dtsi]
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The i.MX6Q and i.MX6DL are pin compatible, so the pinmux entries
should be in sync. This patch systematically adds the pinmux entries
missing from the imx6q to the imx6dl file.
Some name inconsistencies and whitespace damage is fixed along the
way.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This new pinctrl is used in the imx6dl-sabresd board.
Signed-off-by: NHuang Shijie <b32955@freescale.com>

Add a pinctrl for AUDMUX used on imx6dl-sabresd.
Signed-off-by: NNicolin Chen <b42378@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add a pinctrl for I2C1 used on imx6q/dl-sabresd.
Signed-off-by: NNicolin Chen <b42378@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add two pinctrls for WEIM:
   one for the weim nor, another for the chipselect.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

add the pinctrl item for gpmi-nand.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>