- 11 9月, 2011 3 次提交
-
-
由 Jonas Bonn 提交于
For the initial architecture submission, not all of the DMA ops were implemented. This patch adds the *map_page and *map_sg variants of the DMA mapping ops. This patch is currently of interest mainly to some drivers that haven't been submitted upstream yet. Signed-off-by: NJonas Bonn <jonas@southpole.se>
-
由 Jamie Iles 提交于
The of_device_id tables used for matching should be terminated with empty sentinel values. Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NBarry Song <baohua.song@csr.com>
-
由 Janusz Krzysztofik 提交于
Commit be020f86, "ARM: entry: abort-macro: specify registers to be used for macros", while replacing register numbers with macro parameter names, mismatched the name used for r1. For me, this resulted in user space built for EABI with -march=armv4t -mtune=arm920t -mthumb-interwork -mthumb broken on my OMAP1510 based Amstrad Delta (old ABI and no thumb still worked for me though). Fix this by using correct parameter name fsr instead of mismatched psr, used by callers for another purpose. Signed-off-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 10 9月, 2011 3 次提交
-
-
由 Shyam Iyer 提交于
Commit b03e7495 ("PCI: Set PCI-E Max Payload Size on fabric") introduced a potential NULL pointer dereference in calls to pcie_bus_configure_settings due to attempts to access pci_bus self variables when the self pointer is NULL. To correct this, verify that the self pointer in pci_bus is non-NULL before dereferencing it. Reported-by: NStanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: NShyam Iyer <shyam_iyer@dell.com> Signed-off-by: NJon Mason <mason@myri.com> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 Anton Vorontsov 提交于
commit d5341942 ("PCI: Make the struct pci_dev * argument of pci_fixup_irqs const") did not change argument of pdev_to_cnspci(), and thus introduced the following warnings: CHECK arch/arm/mach-cns3xxx/pcie.c pcie.c:177:60: warning: incorrect type in argument 1 (different modifiers) pcie.c:177:60: expected struct pci_dev *dev pcie.c:177:60: got struct pci_dev const *dev CC arch/arm/mach-cns3xxx/pcie.o pcie.c: In function 'cns3xxx_pcie_map_irq': pcie.c:177: warning: passing argument 1 of 'pdev_to_cnspci' discards qualifiers from pointer target type pcie.c:52: note: expected 'struct pci_dev *' but argument is of type 'const struct pci_dev *' This patch fixes the issue. Signed-off-by: NAnton Vorontsov <cbouatmailru@gmail.com>
-
由 Tommy Lin 提交于
Commit c9d95fbe "ARM: convert PCI defines to variables" deleted cns3xxx' hardware.h, but didn't remove references for it, so do it now. This patch removes lines that refer to hardware.h. Signed-off-by: NTommy Lin <tommy.lin.1101@gmail.com> Signed-off-by: NImre Kaloz <kaloz@openwrt.org> Signed-off-by: NAnton Vorontsov <cbouatmailru@gmail.com>
-
- 07 9月, 2011 6 次提交
-
-
由 Linus Walleij 提交于
The TNET variant of DaVinci compiles some code that it shares with other DaVinci variants, however it has a V6 CPU rather than an ARM926T, thus the hardcoded call to arm926_flush_kern_cache_all() in sleep.S will obviously fail, and we need to build with the v6_flush_kern_cache_all() call instead. This was triggered by manually altering the DaVinci config to build the TNET version. Cc: Dave Martin <dave.martin@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NSekhar Nori <nsekhar@ti.com> Cc: stable@kernel.org
-
由 Sergei Shtylyov 提交于
MDSTAT.STATE occupies bits 0..5 according to all available documentation, so fix the #define MDSTAT_STATE_MASK at last. Using the wrong value seems to have been harmless though... Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
-
由 Rajashekhara, Sudhakar 提交于
DA850/OMAP-L138 EMAC driver uses random mac address instead of a fixed one because the mac address is not stuffed into EMAC platform data. This patch provides a function which reads the mac address stored in SPI flash (registered as MTD device) and populates the EMAC platform data. The function which reads the mac address is registered as a callback which gets called upon addition of MTD device. NOTE: In case the MAC address stored in SPI flash is erased, follow the instructions at [1] to restore it. [1] http://processors.wiki.ti.com/index.php/GSG:_OMAP-L138_DVEVM_Additional_Procedures#Restoring_MAC_address_on_SPI_Flash Modifications in v2: Guarded registering the mtd_notifier only when MTD is enabled. Earlier this was handled using mtd_has_partitions() call, but this has been removed in Linux v3.0. Modifications in v3: a. Guarded da850_evm_m25p80_notify_add() function and da850evm_spi_notifier structure with CONFIG_MTD macros. b. Renamed da850_evm_register_mtd_user() function to da850_evm_setup_mac_addr() and removed the struct mtd_notifier argument to this function. c. Passed the da850evm_spi_notifier structure to register_mtd_user() function. Modifications in v4: Moved the da850_evm_setup_mac_addr() function within the first CONFIG_MTD ifdef construct. Signed-off-by: NRajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com> Cc: stable@kernel.org
-
由 Linus Walleij 提交于
Fighting unfixed U-Boots and other beasts that may the cache in a locked-down state when starting the kernel, we make sure to disable all cache lock-down when initializing the l2x0 so we are in a known state. Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Rabin Vincent <rabin.vincent@stericsson.com> Cc: Adrian Bunk <adrian.bunk@movial.com> Cc: Rob Herring <robherring2@gmail.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reported-by: NJan Rinze <janrinze@gmail.com> Tested-by: NRobert Marklund <robert.marklund@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
由 Linus Walleij 提交于
I was intrigued by the fact that the clock stood still on the Integrator, but it wasn't strange at all, because the timer was set up all wrong and probably has been for a while. With this patch the clock starts ticking again: make the timer periodic (reload), |= on the divisor bit and load the timer before starting it. Cc: stable@kernel.org Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
由 Kevin Hilman 提交于
The suspend/resume _noirq handlers were #ifdef'd out in the !CONFIG_SUSPEND case, but were still assigned to the dev_pm_ops struct. Fix by defining them to NULL in the !CONFIG_SUSPEND case. Reported-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NKevin Hilman <khilman@ti.com>
-
- 05 9月, 2011 2 次提交
-
-
由 Jonas Bonn 提交于
As it was decided not to export struct pt_regs to userspace, struct sigcontext shouldn't be using it either. The pt_regs struct for OpenRISC is kernel internal and the layout of the registers may change in the future. The struct user_regs_struct is what is guaranteed to remain stable, so struct sigcontext may use that instead. This patch removes the usage of struct pt_regs in struct sigcontext and makes according changes in signal.c to get the register layout right. The usp field is removed from the sigcontext structure as this information is already contained in the user_regs_struct. Signed-off-by: NJonas Bonn <jonas@southpole.se> Reviewed-by: NEmilio Cota <cota@braap.org>
-
由 Paul Walmsley 提交于
Add a missing array terminator to omap2430_usbhsotg_addrs[]. Without this terminator, the omap_hwmod resource building code runs off the end of the array, resulting in at least this error -- if not worse behavior: [ 0.578002] musb-omap2430: failed to claim resource 4 [ 0.583465] omap_device: musb-omap2430: build failed (-16) [ 0.589294] Could not build omap_device for musb-omap2430 usb_otg_hs This should have been part of commit 78183f3f ("omap_hwmod: use a null structure record to terminate omap_hwmod_addr_space arrays") but was evidently missed. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
-
- 04 9月, 2011 1 次提交
-
-
由 Mark Rutland 提交于
When ARCH_HAS_HOLES_MEMORYMODEL is selected, pfn_valid calls memblock_is_memory to test validity of a pfn: > memblock_is_memory(pfn << PAGE_SHIFT); On LPAE systems this cuts off the top bits, as the shift occurs before the value is promoted to a phys_addr_t. This patch replaces the shift with a call to __pfn_to_phys (which casts pfn to phys_addr_t before shifting), preventing the loss of significant bits. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 02 9月, 2011 2 次提交
-
-
由 Konrad Rzeszutek Wilk 提交于
We have hit a couple of customer bugs where they would like to use those parameters to run an UP kernel - but both of those options turn of important sources of interrupt information so we end up not being able to boot. The correct way is to pass in 'dom0_max_vcpus=1' on the Xen hypervisor line and the kernel will patch itself to be a UP kernel. Fixes bug: http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=637308 CC: stable@kernel.org Acked-by: NIan Campbell <Ian.Campbell@eu.citrix.com> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
-
由 Igor Mammedov 提交于
If vmalloc page_fault happens inside of interrupt handler with interrupts disabled then on exit path from exception handler when there is no pending interrupts, the following code (arch/x86/xen/xen-asm_32.S:112): cmpw $0x0001, XEN_vcpu_info_pending(%eax) sete XEN_vcpu_info_mask(%eax) will enable interrupts even if they has been previously disabled according to eflags from the bounce frame (arch/x86/xen/xen-asm_32.S:99) testb $X86_EFLAGS_IF>>8, 8+1+ESP_OFFSET(%esp) setz XEN_vcpu_info_mask(%eax) Solution is in setting XEN_vcpu_info_mask only when it should be set according to cmpw $0x0001, XEN_vcpu_info_pending(%eax) but not clearing it if there isn't any pending events. Reproducer for bug is attached to RHBZ 707552 CC: stable@kernel.org Signed-off-by: NIgor Mammedov <imammedo@redhat.com> Acked-by: NJeremy Fitzhardinge <jeremy@goop.org> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
-
- 01 9月, 2011 1 次提交
-
-
由 David Vrabel 提交于
Use the domain's maximum reservation to limit the amount of extra RAM for the memory balloon. This reduces the size of the pages tables and the amount of reserved low memory (which defaults to about 1/32 of the total RAM). On a system with 8 GiB of RAM with the domain limited to 1 GiB the kernel reports: Before: Memory: 627792k/4472000k available After: Memory: 549740k/11132224k available A increase of about 76 MiB (~1.5% of the unused 7 GiB). The reserved low memory is also reduced from 253 MiB to 32 MiB. The total additional usable RAM is 329 MiB. For dom0, this requires at patch to Xen ('x86: use 'dom0_mem' to limit the number of pages for dom0') (c/s 23790) CC: stable@kernel.org Signed-off-by: NDavid Vrabel <david.vrabel@citrix.com> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
-
- 31 8月, 2011 4 次提交
-
-
由 Andrey Vagin 提交于
An event may occur when an mm is already released. I added an event in dequeue_entity() and caught a panic with the following backtrace: [ 434.421110] BUG: unable to handle kernel NULL pointer dereference at 0000000000000050 [ 434.421258] IP: [<ffffffff810464ac>] __get_user_pages_fast+0x9c/0x120 ... [ 434.421258] Call Trace: [ 434.421258] [<ffffffff8101ae81>] copy_from_user_nmi+0x51/0xf0 [ 434.421258] [<ffffffff8109a0d5>] ? sched_clock_local+0x25/0x90 [ 434.421258] [<ffffffff8101b048>] perf_callchain_user+0x128/0x170 [ 434.421258] [<ffffffff811154cd>] ? __perf_event_header__init_id+0xed/0x100 [ 434.421258] [<ffffffff81116690>] perf_prepare_sample+0x200/0x280 [ 434.421258] [<ffffffff81118da8>] __perf_event_overflow+0x1b8/0x290 [ 434.421258] [<ffffffff81065240>] ? tg_shares_up+0x0/0x670 [ 434.421258] [<ffffffff8104fe1a>] ? walk_tg_tree+0x6a/0xb0 [ 434.421258] [<ffffffff81118f44>] perf_swevent_overflow+0xc4/0xf0 [ 434.421258] [<ffffffff81119150>] do_perf_sw_event+0x1e0/0x250 [ 434.421258] [<ffffffff81119204>] perf_tp_event+0x44/0x70 [ 434.421258] [<ffffffff8105701f>] ftrace_profile_sched_block+0xdf/0x110 [ 434.421258] [<ffffffff8106121d>] dequeue_entity+0x2ad/0x2d0 [ 434.421258] [<ffffffff810614ec>] dequeue_task_fair+0x1c/0x60 [ 434.421258] [<ffffffff8105818a>] dequeue_task+0x9a/0xb0 [ 434.421258] [<ffffffff810581e2>] deactivate_task+0x42/0xe0 [ 434.421258] [<ffffffff814bc019>] thread_return+0x191/0x808 [ 434.421258] [<ffffffff81098a44>] ? switch_task_namespaces+0x24/0x60 [ 434.421258] [<ffffffff8106f4c4>] do_exit+0x464/0x910 [ 434.421258] [<ffffffff8106f9c8>] do_group_exit+0x58/0xd0 [ 434.421258] [<ffffffff8106fa57>] sys_exit_group+0x17/0x20 [ 434.421258] [<ffffffff8100b202>] system_call_fastpath+0x16/0x1b Signed-off-by: NAndrey Vagin <avagin@openvz.org> Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl> Cc: stable@kernel.org Link: http://lkml.kernel.org/r/1314693156-24131-1-git-send-email-avagin@openvz.orgSigned-off-by: NIngo Molnar <mingo@elte.hu>
-
由 Chunhe Lan 提交于
In the p1023rds, a physical bus of nor flash is 16 bits width. The bank-width is width (in bytes) of the bus width. So, the value of bank-width of nor flash is not one, and it should be two. Signed-off-by: NChunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Kim Phillips 提交于
corenet based SoCs have SEC4 h/w, so enable the SEC4 driver, caam, and the algorithms it supports, and disable the SEC2/3 driver, talitos. Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Timur Tabi 提交于
Enable the audio drivers in the non-corenet 85xx defconfigs so that audio is enabled on the Freescale P1022DS reference board. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
- 30 8月, 2011 5 次提交
-
-
由 Duncan Sands 提交于
Commit de2d1a52 ("KVM: Fix register corruption in pvclock_scale_delta") introduced a mul instruction that may have only a memory operand; the assembler therefore cannot select the correct size: pvclock.s:229: Error: no instruction mnemonic suffix given and no register operands; can't size instruction In this example the assembler is: #APP mul -48(%rbp) ; shrd $32, %rdx, %rax #NO_APP A simple solution is to use mulq. Signed-off-by: NDuncan Sands <baldrick@free.fr> Signed-off-by: NAvi Kivity <avi@redhat.com>
-
由 David S. Miller 提交于
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
由 Stephen Rothwell 提交于
These were missed in commit f5b94099 "All Arch: remove linkage for sys_nfsservctl system call" due to them having no sys_ prefix (presumably). Cc: NeilBrown <neilb@suse.de> Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-parisc@vger.kernel.org Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au> Acked-by: NJames Bottomley <James.Bottomley@hansenpartnership.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 Kjetil Oftedal 提交于
On Sun4d systems running in SMP mode, IRQ 14 is used for timer interrupts and has a specialized interrupt handler. IPI is currently set to use IRQ 14 as well, which causes it to trigger the timer interrupt handler, and not the IPI interrupt handler. The IPI interrupt is therefore changed to IRQ 13, which is the highest normally handled interrupt. This IRQ is also used for SBUS interrupts, however there is nothing in the IPI/SBUS interrupt handlers that indicate that they will not handle sharing the interrupt. (IRQ 13 is indicated as audio interrupt, which is unlikely to be found in a sun4d system) Signed-off-by: NKjetil Oftedal <oftedal@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
由 Stephen Rothwell 提交于
Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 29 8月, 2011 8 次提交
-
-
由 Magnus Damm 提交于
Add clock control support for sh7372 CMT hardware blocks. No upstream sh7372 boards are making use of CMT3 + CMT4, but the sh7372 hardware happens to come out of reset with all CMT MSTP clocks _enabled_, so to save power we need to implement a fix in software to shut down unused clocks. This patch relies on the recently merged 794d78fe drivers: sh: late disabling of clocks V2 to make sure the unused clocks get disabled as expected. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
-
由 Magnus Damm 提交于
Add clock control support for sh7372 MSIOF hardware blocks. No upstream sh7372 boards are making use of MSIOF0->2, but the sh7372 hardware happens to come out of reset with all MSIOF MSTP clocks _enabled_, so to save power we need to implement a fix in software to shut down unused clocks. This patch relies on the recently merged 794d78fe drivers: sh: late disabling of clocks V2 to make sure the unused clocks get disabled as expected. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
-
由 Kuninori Morimoto 提交于
USB-DMAC1 needs SMSTPCR4/MSTP407 controls, not MSTP214 this patch tested on mackerel board Reported-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
-
由 Kuninori Morimoto 提交于
MAINCKSEL is [29:28], not [27:24] Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
-
由 Magnus Damm 提交于
This patch removes support for the SGX interrupt source in the sh7372 INTCS controller. The SGX hardware block included in sh7372 is already hooked up to the ARM Cortex-A8 core using the INTCA controller, so SGX users are encouraged to make use of that interrupt source instead. Removing support for the SGX interrupt source in INTCS simplifies the sh7372 power management code by allowing us to assume that only INTCA needs to be powered on to operate the SGX hardware. If the INTCS interrupt source would be kept then the kernel would be forced to deal with additional dependencies that does not follow the regular power domain hiearachy. With this patch in place we can safely power down INTCS while the SGX is operating. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
-
由 Yoshihiro Shimoda 提交于
Fix the following build errors: CC arch/sh/kernel/cpu/sh4a/setup-sh7757.o arch/sh/kernel/cpu/sh4a/setup-sh7757.c:681: error: implicit declaration of function ‘DMA_BIT_MASK’ arch/sh/kernel/cpu/sh4a/setup-sh7757.c:681: error: initializer element is not constant arch/sh/kernel/cpu/sh4a/setup-sh7757.c:681: error: (near initialization for ‘usb_ehci_device.dev.coherent_dma_mask’) arch/sh/kernel/cpu/sh4a/setup-sh7757.c:705: error: initializer element is not constant arch/sh/kernel/cpu/sh4a/setup-sh7757.c:705: error: (near initialization for ‘usb_ohci_device.dev.coherent_dma_mask’) make[3]: *** [arch/sh/kernel/cpu/sh4a/setup-sh7757.o] Error 1 Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
-
由 Phil Edworthy 提交于
This adds unaligned memory access support for the following instructions: mov.w @(disp,PC),Rn mov.l @(disp,PC),Rn These instructions are often used on SH2A toolchains. Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
-
由 Phil Edworthy 提交于
This patch just clears the return code for those cases where an unaligned memory access occurs on branch instructions without a delay slot. Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
-
- 28 8月, 2011 5 次提交
-
-
由 Russell King 提交于
For ARMv7 kernels running in the non-secure world, writing to the auxillary control register causes an abort, so we must avoid directly writing the auxillary control register. If the ACR has already been reinitialized by SoC code, don't try to restore it. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
由 Russell King 提交于
Add a dsb after the isb to ensure that the previous writes to the CP15 registers take effect before we enable the MMU. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
由 Russell King 提交于
ARM920 and ARM926 save four registers, not three. Fix the size of the suspend region required. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
由 Russell King 提交于
r1 stores the v:p offset from the CPU invariant resume code, and is expected to be preserved by the CPU specific code. Overwriting it is not a good idea. We've managed to get away with it on sa1100 platforms because most happen to have PHYS_OFFSET == PAGE_OFFSET, but that may not be the case depending on kernel configuration. So fix this latent bug. This fixes xsc3 as well which was saving and restoring this register independently. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
由 Will Deacon 提交于
cpu_v7_reset disables the MMU and then branches to the provided address. On Thumb-2 kernels, we should take care to clear the Thumb Exception enable bit in the System Control Register, otherwise this may wreak havok in the code to which we are branching (for example, an ARM kernel image via kexec). Reviewed-by: NDave Martin <dave.martin@linaro.org> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-