- 27 9月, 2012 1 次提交
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由 Greg Ungerer 提交于
Move the base address defines of the ColdFire 54xx CPU slice timers into the 54xx specific header (m54xxsim.h). They are CPU specific, and belong with the CPU specific defines. Also make them relative to the MBAR peripheral region, making the define the absolute address. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 17 7月, 2012 1 次提交
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由 Greg Ungerer 提交于
Add all the required definitoins to support the ColdFire M54xx SoC PCI hardware unit. These are strait out of the MCF5475 Reference Manual. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 05 3月, 2012 1 次提交
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由 Greg Ungerer 提交于
If we make all UART addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 54xx UART addressing so that: . UARTs are numbered from 0 up . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 15 3月, 2011 3 次提交
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由 Greg Ungerer 提交于
The EDGE Port module of some ColdFire parts using the intc-2 interrupt controller provides support for 7 external interrupts. These interrupts go off-chip (that is they are not for internal peripherals). They need some special handling and have some extra setup registers. Add code to support them. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
The reality is that you do not need the abiltity to configure the clock divider for ColdFire CPUs. It is a fixed ratio on any given ColdFire family member. It is not the same for all ColdFire parts, but it is always the same in a model range. So hard define the divider for each supported ColdFire CPU type and remove the Kconfig option. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
The ColdFire 54xx family shares the same interrupt controller used on the 523x, 527x and 528x ColdFire parts, but it isn't offset relative to the IPSBAR register. The 54xx doesn't have an IPSBAR register. By including the base address of the peripheral registers in the register definitions (MCFICM_INTC0 and MCFICM_INTC1 in this case) we can avoid having to define a fake IPSBAR for the 54xx. And this makes the register address definitions of these more consistent, the majority of the other register address defines include the peripheral base address already. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 05 1月, 2011 5 次提交
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由 Greg Ungerer 提交于
Move the inclusion of the version 4 cache controller registers so that it is with all the other register bit flag definitions. This makes it consistent with the other version core inclusion points, and means we don't need "#ifdef"ery in odd-ball places for these definitions. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
The ColdFire UART base addresses varies between the different ColdFire family members. Instead of keeping the base addresses with the UART definitions keep them with the other addresses definitions for each ColdFire part. The motivation for this move is so that when we add new ColdFire part definitions, they are all in a single file (and we shouldn't normally need to modify the UART definitions in mcfuart.h at all). Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
The instruction timings of the ColdFire 54xx family parts are different to other version 4 parts (or version 2 or 3 parts for that matter too). Move the instruction timing setting into the ColdFire part specific headers, and set the 54xx value appropriately. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
Move the ColdFire CPU names out of setup.c and into their repsective headers. That way when we add new ones we won't need to modify setup.c any more. Add the missing 548x CPU name. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
The ColdFire 547x family of processors is very similar to the ColdFire 548x series. Almost all of the support for them is the same. Make the code supporting the 548x more gneric, so it will be capable of supporting both families. For the most part this is a renaming excerise to make the support code more obviously apply to both families. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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- 21 10月, 2010 1 次提交
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由 Philippe De Muyter 提交于
Add a very basic mmu-less support for coldfire m548x family. This is perhaps also valid for m547x family. The port comprises the serial, tick timer and reboot support. The gpio part compiles but is empty. This gives a functional albeit limited linux for the m548x coldfire family. This has been tested on a Freescale M548xEVB Lite board with a M5484 processor and the default dbug monitor. Signed-off-by: NPhilippe De Muyter <phdm@macqel.be> Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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