1. 08 7月, 2010 1 次提交
  2. 29 6月, 2010 1 次提交
  3. 26 6月, 2010 1 次提交
  4. 24 6月, 2010 1 次提交
  5. 01 6月, 2010 1 次提交
  6. 18 5月, 2010 1 次提交
  7. 04 5月, 2010 1 次提交
    • D
      forcedeth: Kill NAPI config options. · 0a12761b
      David S. Miller 提交于
      All distributions enable it, therefore no significant body of users
      are even testing the driver with it disabled.  And making NAPI
      configurable is heavily discouraged anyways.
      
      I left the MSI-X interrupt enabling thing in an "#if 0" block
      so hopefully someone can debug that and it can get re-enabled.
      Probably it was just one of the NVIDIA chipset MSI erratas that
      we work handle these days in the PCI quirks (see drivers/pci/quirks.c
      and stuff like nvenet_msi_disable()).
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      0a12761b
  8. 13 4月, 2010 1 次提交
  9. 08 4月, 2010 1 次提交
  10. 07 4月, 2010 2 次提交
  11. 04 4月, 2010 1 次提交
    • J
      l2tp: Split pppol2tp patch into separate l2tp and ppp parts · fd558d18
      James Chapman 提交于
      This patch splits the pppol2tp driver into separate L2TP and PPP parts
      to prepare for L2TPv3 support. In L2TPv3, protocols other than PPP can
      be carried, so this split creates a common L2TP core that will handle
      the common L2TP bits which protocol support modules such as PPP will
      use.
      
      Note that the existing pppol2tp module is split into l2tp_core and
      l2tp_ppp by this change.
      
      There are no feature changes here. Internally, however, there are
      significant changes, mostly to handle the separation of PPP-specific
      data from the L2TP session and to provide hooks in the core for
      modules like PPP to access.
      Signed-off-by: NJames Chapman <jchapman@katalix.com>
      Reviewed-by: NRandy Dunlap <randy.dunlap@oracle.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      fd558d18
  12. 02 4月, 2010 2 次提交
  13. 31 3月, 2010 1 次提交
  14. 23 3月, 2010 1 次提交
  15. 19 3月, 2010 1 次提交
  16. 10 3月, 2010 1 次提交
  17. 19 2月, 2010 1 次提交
  18. 18 2月, 2010 1 次提交
  19. 17 2月, 2010 1 次提交
  20. 16 2月, 2010 1 次提交
  21. 13 2月, 2010 1 次提交
  22. 11 2月, 2010 1 次提交
  23. 05 2月, 2010 1 次提交
  24. 04 2月, 2010 1 次提交
    • A
      net: macvtap driver · 20d29d7a
      Arnd Bergmann 提交于
      In order to use macvlan with qemu and other tools that require
      a tap file descriptor, the macvtap driver adds a small backend
      with a character device with the same interface as the tun
      driver, with a minimum set of features.
      
      Macvtap interfaces are created in the same way as macvlan
      interfaces using ip link, but the netif is just used as a
      handle for configuration and accounting, while the data
      goes through the chardev. Each macvtap interface has its
      own character device, simplifying permission management
      significantly over the generic tun/tap driver.
      
      Cc: Patrick McHardy <kaber@trash.net>
      Cc: Stephen Hemminger <shemminger@linux-foundation.org>
      Cc: David S. Miller" <davem@davemloft.net>
      Cc: "Michael S. Tsirkin" <mst@redhat.com>
      Cc: Herbert Xu <herbert@gondor.apana.org.au>
      Cc: Or Gerlitz <ogerlitz@voltaire.com>
      Cc: netdev@vger.kernel.org
      Cc: bridge@lists.linux-foundation.org
      Cc: linux-kernel@vger.kernel.org
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      20d29d7a
  25. 29 1月, 2010 1 次提交
  26. 16 1月, 2010 1 次提交
  27. 11 1月, 2010 1 次提交
  28. 22 12月, 2009 1 次提交
  29. 17 12月, 2009 1 次提交
    • D
      NET: Add Ethernet driver for Octeon MGMT devices. · d6aa60a1
      David Daney 提交于
      The Octeon MGMT Ethernet ports are present in some members of the
      Octeon SOC family (cn52XX and cn56XX have them).
      
      The mdio bus connected to the MGMT PHYs is shared with the main
      octeon-ethernet driver, we force it to be loaded first by calling
      octeon_mdiobus_force_mod_depencency.  The platform devices for the
      MGMT Ethernet ports are added in
      arch/mips/cavium-octeon/octeon-platform.c, and the register
      definitions for the ports live in arch/mips/include/asm/octeon/ along
      with their ilk.
      
      Although it currently is the only driver in drivers/net/octeon, the
      directory was created looking forward to the day that octeon-ethernet
      will move there from its current home in drivers/staging.
      Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
      Acked-by: NDavid S. Miller <davem@davemloft.net>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      d6aa60a1
  30. 11 12月, 2009 1 次提交
  31. 21 11月, 2009 1 次提交
  32. 17 11月, 2009 1 次提交
  33. 15 10月, 2009 3 次提交
  34. 14 10月, 2009 1 次提交
  35. 13 10月, 2009 1 次提交
  36. 01 10月, 2009 1 次提交